TW200517948A - Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms - Google Patents

Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms

Info

Publication number
TW200517948A
TW200517948A TW093128809A TW93128809A TW200517948A TW 200517948 A TW200517948 A TW 200517948A TW 093128809 A TW093128809 A TW 093128809A TW 93128809 A TW93128809 A TW 93128809A TW 200517948 A TW200517948 A TW 200517948A
Authority
TW
Taiwan
Prior art keywords
cryptographic
instruction
block cipher
cryptographic algorithms
configurable block
Prior art date
Application number
TW093128809A
Other languages
Chinese (zh)
Other versions
TWI274280B (en
Inventor
Thomas A Crispin
G Glenn Henry
Tery Parks
Original Assignee
Macronix Int Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/800,938 external-priority patent/US7900055B2/en
Application filed by Macronix Int Co Ltd filed Critical Macronix Int Co Ltd
Publication of TW200517948A publication Critical patent/TW200517948A/en
Application granted granted Critical
Publication of TWI274280B publication Critical patent/TWI274280B/en

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  • Storage Device Security (AREA)
  • Multi Processors (AREA)

Abstract

The present invention provides an apparatus and method for performing cryptographic operation on a plurality of input data blocks within a processor. In one embodiment, an apparatus for performing cryptographic operations is provided. The apparatus includes a cryptographic instruction and execution logic. The cryptographic instruction is received by a computing device as part of an instruction flow executing on the computing device. The cryptographic instruction prescribes one of the cryptographic operations, and also prescribes that an intermediate result be generated. The execution logic is operatively coupled to the cryptographic instruction. The execution logic executes the one of the cryptographic operations, and generates the intermediate result.
TW93128809A 2003-09-29 2004-09-23 Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms TWI274280B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US50697803P 2003-09-29 2003-09-29
US10/800,938 US7900055B2 (en) 2003-04-18 2004-03-15 Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms

Publications (2)

Publication Number Publication Date
TW200517948A true TW200517948A (en) 2005-06-01
TWI274280B TWI274280B (en) 2007-02-21

Family

ID=34798740

Family Applications (1)

Application Number Title Priority Date Filing Date
TW93128809A TWI274280B (en) 2003-09-29 2004-09-23 Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms

Country Status (2)

Country Link
CN (1) CN100463392C (en)
TW (1) TWI274280B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI576717B (en) * 2016-07-26 2017-04-01 Dimensional biometric identification system and method

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5404030B2 (en) * 2008-12-26 2014-01-29 デジタルア−ツ株式会社 Electronic file transmission method
CN102169465B (en) * 2010-02-26 2013-08-21 银灿科技股份有限公司 Data encryption device for storage media
CN102624637B (en) * 2011-01-27 2016-02-24 阿里巴巴集团控股有限公司 Quote Notification Method and device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000076119A1 (en) * 1999-06-08 2000-12-14 General Instrument Corporation Cryptographic processing system
US6983374B2 (en) * 2000-02-14 2006-01-03 Kabushiki Kaisha Toshiba Tamper resistant microprocessor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI576717B (en) * 2016-07-26 2017-04-01 Dimensional biometric identification system and method

Also Published As

Publication number Publication date
TWI274280B (en) 2007-02-21
CN100463392C (en) 2009-02-18
CN1607763A (en) 2005-04-20

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