200426245 玖、發明說明： 【發明所屬之技術領域】 本發明係有關一種低成本及可大量製作矽奈米線之方 法，尤指一種以無電鍍沉積形成催化金屬微粒層，並經高 溫製程而於該矽基板上成長矽奈米線之方法。 【先前技術】 在已習知技術上m線可藉由多種方法與技術來 製作，包括雷射賴法（ablation)、弧光放電法以及化學氣 相沉積法（CVD)等。200426245 发明 Description of the invention: [Technical field to which the invention belongs] The present invention relates to a low-cost and method for mass-producing silicon nanowires, especially a method for forming a layer of catalytic metal particles by electroless deposition, and applying a high-temperature process to the Method for growing silicon nanowire on the silicon substrate. [Prior art] In the known technology, m-rays can be produced by a variety of methods and techniques, including laser ablation, arc discharge, and chemical vapor deposition (CVD).
雷射濺蝕法與弧光放電法係利用加熱的矽靶所蒸發的 矽原子形成氣相的矽奈米線，並在反應腔壁或另一電極沉 積。而CVD沉積法，則是以散佈於基板中的催化劑金屬 微粒作為奈米線生長_源，將錢化合物切微粒粉末 經高溫熱裂解後，沉積在催化劑金屬微粒根基底部，氣化 後的石夕源不斷的往催化劑底部沉積，且碎原子慢慢由催化The laser sputtering method and the arc discharge method use the silicon atoms evaporated from the heated silicon target to form a silicon nanowire in the gas phase and deposit on the reaction chamber wall or another electrode. The CVD deposition method uses the catalyst metal particles dispersed in the substrate as the source of nanowires. After the high-temperature thermal cracking of the powder of the fine particles of the compound, the particles are deposited on the bottom of the catalyst metal particles. Xi continued to deposit on the bottom of the catalyst, and the broken atoms slowly slowly catalyzed by
U粒表面析出將金屬微粒往上推，直到矽源申斷或催化劑 失去活性後即停止生長。 由於催化劑金屬微粒的大小，會直接關係到矽奈米線 成長、、泉位方向及其他製程技術之應用，因此催化劑金 屬微粒之特性對於矽奈米線成長及應用十分重要。習用的 催化劑金屬微粒之製備方式主要有：金屬賊、蒸鑛及使 用化學氣相沉積等方式，其優點係催化物金屬微粒與基板 具有較佳的附著，且可較精確的控制金屬層厚度與微粒大 小。但上述這些方法在催化金屬微粒沉積於矽基板製作上 5 200426245 須使用真空系統’以真空設備成本而言，反應腔體愈大其 所須化費的成本就愈高’同時抽真空所需的時間相對增 加，因此，目前真空系統在成本與良率考量下通常以單片 沉積方式進行，而難以在批次成長之量產方式中控制其良 率’這將會造成製造成本昂貴且無法批次大量成長等難以 克服的缺點。故而前述之石夕奈米線成長方法仍有加以改進 之必要。 【發明内容】 、本發明之主要目的，在於解決上述的問題而提供一種 鲁 低成本及可大里製作石夕奈米線之方法，其主要係以無電鍍 法在矽基板上沉積出一層含催化金屬微粒之金屬層，而於 问酿下使催化金屬微粒與該石夕基板之石夕原子形成熔融液態 之夕化物a金’透過固態一液態，固態，簡 稱SLS)化學合成製程機制以藉由溫度梯度之變化，促使 矽-矽鍵因觸媒效應重新組合排列而堆疊成矽奈米線，進 而可達到製程容易、成本低廉以及可整批大量製造等功效 為達别述之目的，本發明之矽奈米線之成長方法，其 係包括下列步驟： a·敏化處理： "周配破化劑溶液，並取用一石夕基板以對該石夕基 板進行敏化處理； b·活化處理： 凋配活化劑溶液，以對敏化處理之矽基板進行活化 6 200426245 處理； c·無電鍍沉積： 調配一無電鍍反應溶液，並對活化處理後之矽基板進 行無電鍍沉積，以於該矽基板上沈積形成含有催化金屬微 粒之金屬層； d ·高溫製程： 將經無電鍍鎳處理後之矽基板施以高溫製程，使催化 金屬微粒與矽基板之矽原子形成熔融液態之矽化物合金， 再藉由溫度梯度之變化合成矽奈米線。 本發明之上述及其他目的與優點，不難從下述所選用 貫施例之詳細說明與附圖中，獲得深入了解。 當然，本發明在某些另件上，或另件之安排上容許有 所不同，但所選用之實施例，則於本說明書中，予以詳細 說明’並於附圖中展示其構造。 【實施方式】 凊麥閱第1圖至第6圖，圖中所示者為本發明所選用 之較佳實施，此僅供說明之用，在專利中請上並不受此種 結構之限制。 明考第1圖，本實施例之低成本及可大量製作矽奈米 線之方法’其係包括下列步驟： a·敏化處理： 0.1莫耳濃度與0.Κ2莫耳濃度的鹽酸以1:1之比⑷ 合，而後置入一化學反應槽31中使用磁石攪拌器授; 200426245 10〜15分鐘調製而成；接下來取用一矽基板1 〇裝載於鐵 氟龍晶舟4 1上，如第2圖所示，浸入敏化劑溶液2中進 行敏化處理20〜30分鐘。 b·活化處理： 調配一活化劑溶液5，其係由〇·〇〇ι〜0.003莫耳濃度 的氯化鈀溶液與0.05〜0.09莫耳濃度的鹽酸以ι:1之比例 混合’再置入化學反應槽3 2中使用磁石攪拌器攪拌 10〜15分鐘調製而成；接下來將敏化處理後之石夕基板1 〇 裝載於鐵氟龍晶舟4 1上，如第3圖所示，浸入活化劑溶 液5中進行活化處理5〜1 〇分鐘。 c ·無電鍍沉積： 調配一無電鍍反應溶液6，該無電鍍反應溶液6之調 配，係由硫酸鎳溶液0.5〜〇·7莫耳濃度、次磷酸鈉溶液 0.2〜0.4莫耳濃度、琥珀酸納溶液〇·4〜〇·5莫耳濃度、才宜 檬酸溶液0.08〜0.12莫耳濃度、醋酸鉛溶液5微莫耳濃度 與醋酸鈉溶液0·2〜0.6莫耳濃度以混合比例為1:1:1:1:1:1 之方式加入可升溫式化學反應槽3 3中使用磁石攪拌器攪 摔10〜15分鐘，再加入硫酸進行溶劑之酸驗值(帅周配 ，使無電鍍反應溶液6在室溫下之ρΗ值為4〜6 ;接下以 無電鑛反應溶液6對該㈣Q進行無電鍍沉積，其係 將無反應溶液6加溫至75〜85aC，再把經活化處理 後之矽基板1 0裝載於鐵氟龍晶舟4 1±，如第4圖所示 ’浸泡在無電鍍反應溶液6中進行催化金屬微粒沉積卜 H)分鐘，而於_基板i 〇表面沈積形成含有催化金屬微 200426245 粒之金屬層。 d·高溫製程： 其係將經無電鍍鎳處理後之矽基板10裝載於石英晶 舟4 2上，緊接著把該石英晶舟4 2置入高溫爐7，如第 5圖所示，並採用高溫爐管7 1來提供真空高溫環境，其 係將高溫爐7升溫至90〜100 T持續30分鐘排除矽基板 1 0上之殘留水氣與有機物，接著將高溫爐以每分鐘升溫 15 °C之方式逐次升溫至950〜960 DC，而後持續於此一溫 度30〜60分鐘，使催化金屬微粒與矽原子在高溫下於基板 界面處形成熔融液態之矽化物合金，由於矽化物合金之熔 點低於基板，而可在較低溫下熔融成液態，透過固態-液 態-固態（SLS)製程機制藉由溫度梯度之變化，促使矽-矽鍵 因觸媒效應重新組合排列而堆疊成矽奈米線1 1，其成長 結構係如第6圖所示。 本發明係採用無電鍍之方式來進行催化劑金屬微粒沉 積之製備，無電鍍法具有均一性良好的鍍層，其孔隙度比 電鍍法鍍層還要小，且不需要電鍍設備包含玻璃、陶瓷及 塑膠等非導體，經過適當的前處理後，便可以施行無電鍍 法，具有製程容易、生產與設備成本低廉之優點。 除此之外，本發明成長矽奈米線之合成機制，係借助 熟知之固態-液態-固態（SLS)化學合成製程，此製程已詳述 於下列之參考刊物中：H.F· Yan，Y.J· Xing，Q丄· Hang，D.P· Yu，Y.P. Wang，J. Xu，Ζ·Η. Xi，S.Q. Feng，“Growth of amorphous silicon nanowires via a solid—liquid—solid 200426245 mechanism’’，Chemical Physics Letters 323，ρρ· 224-228 (2000);D.P. Yu, Y.J. Xing , Q.L. Hang , H.F. Yan , J. Xu , Z.H. Xi ，S.Q. Feng，“Controlled growth of oriented amorphous silicon nanowires via a solid-liquid-solid (SLS) mechanism”，Physica，E 9，pp. 305-309 (2001);本發明於高 溫爐7中係採用高溫爐管來提供真空高溫環境，使催化金 屬微粒與矽基板表面之矽原子在高溫下於金屬/矽基板界 面處形成矽化物合金，由於矽化物合金之熔點低於矽基 板，可在較低溫下熔融成液態，透過固態-液態-固態（SLS) 製程機制藉由溫度梯度之變化，促使矽-矽鍵因觸媒效應 重新組合排列而堆疊成矽奈米線；與先前已習知之技術電 弧放電、雷射濺蝕（ablation)法及CVD沉積法相較，本發 明之矽奈米線方式具有製程容易、材料與設備成本低廉以 及可整批大量製作等優點，在光電半導體產業發展上極具 可利用性。 由上述實施例結果顯示，本發明矽奈米線之成長方 法，的確具有製程容易、設備成本低廉及可批次大量製作 等優點。雖然本發明已有較佳實施例揭露如上，然其並非 用以限定本發明，任何熟習此技藝者，在不脫離本發明之 精神和範圍内，當可作各種之更動與潤飾，故本發明之保 護範圍當視後附之申請專利範圍所界定者為準。 由以上詳細說明，可使熟知本項技藝者明瞭本發明的 確可達成前述目的，實已符合專利法之規定，爰提出專利 申請。 200426245 【圖式簡單說明】 第1圖係本發明矽奈米線成長法之製作流程圖 第2圖係本發明之矽基板表面敏化處理之示意圖 第3圖係本發明之矽基板表面活化處理之示意圖 第4圖係本發明之矽基板進行無電鍍處理之示意圖 第5圖係本發明於高溫爐中進行矽奈米線製作之示意圖 第6圖係本發明經高溫催化成長矽奈米線之示意圖 【圖號說明】 (本發明部分） 矽奈米線1 1 化學反應槽3 1、3 2 鐵氟龍晶舟4 1 〉舌化劑溶液5 高溫爐7 $夕基板1 〇 敏化劑溶液2 可升溫式化學反應槽3 3 石英晶舟4 2 無電鍍反應溶液6 高溫爐管7 1 aThe precipitation of U particles pushes the metal particles up until the source of silicon is depleted or the catalyst is deactivated, and then it stops growing. Because the size of the catalyst metal particles is directly related to the growth of silicon nanowires, spring direction, and other process technology applications, the characteristics of catalyst metal particles are very important for the growth and application of silicon nanowires. The preparation methods of conventional catalyst metal particles are mainly: metal thief, steam ore and chemical vapor deposition. The advantages are that the catalyst metal particles have better adhesion to the substrate, and the thickness of the metal layer can be controlled more accurately. Particle size. However, the above methods require the use of a vacuum system in the production of catalytic metal particles deposited on a silicon substrate. 5 200426245 In terms of the cost of vacuum equipment, the larger the reaction chamber, the higher the cost. The time is relatively increased. Therefore, under the consideration of cost and yield, the current vacuum system is usually carried out in a single wafer deposition method, and it is difficult to control the yield in the batch production method of mass production. This will cause expensive manufacturing costs and cannot be approved. Insurmountable shortcomings such as secondary growth. Therefore, it is still necessary to improve the above-mentioned method of growing nishi-nami rice noodles. [Summary of the invention] The main purpose of the present invention is to solve the above problems and provide a low-cost and large-scale method for making shixi nanowires. The method is mainly to deposit a layer containing a catalyst on a silicon substrate by electroless plating. The metal layer of the metal particles, and the catalytic metal particles and the stone atoms of the stone substrate are formed into a molten liquid compound (a gold) through a solid-liquid, solid-state (abbreviated as SLS) chemical synthesis process mechanism under The change in temperature gradient causes silicon-silicon bonds to be stacked into silicon nanowires due to the recombination and arrangement of the catalyst effect, which can achieve the effects of easy process, low cost, and batch production in large quantities. The method for growing silicon nanowires includes the following steps: a. Sensitization treatment: " Combine a degrading agent solution, and take a Shixi substrate to sensitize the Shixi substrate; b. Activation Treatment: Wither the activator solution to activate the sensitized silicon substrate 6 200426245 treatment; c. Electroless deposition: prepare an electroless plating reaction solution, and The treated silicon substrate is electrolessly deposited to deposit a metal layer containing catalytic metal particles on the silicon substrate; d. High temperature process: The silicon substrate treated with electroless nickel is subjected to a high temperature process to make the catalytic metal particles Form a molten liquid silicide alloy with the silicon atoms of the silicon substrate, and then synthesize silicon nanowires by changing the temperature gradient. The above and other objects and advantages of the present invention can be easily understood from the detailed description and accompanying drawings of selected embodiments below. Of course, the present invention allows some differences in the arrangement or arrangement of other parts, but the selected embodiment is explained in detail in this specification and its structure is shown in the drawings. [Embodiment] Please see Figures 1 to 6 of the figure. The one shown in the figure is the preferred implementation of the present invention. This is for illustration purposes only. Please do not limit this structure in the patent. . Figure 1 shows the method of low cost and large-scale production of silicon nanowires in this embodiment. The method includes the following steps: a. Sensitization treatment: 0.1 mole concentration and 0. 2 mole concentration of hydrochloric acid to 1 : 1 ratio is combined, and then placed in a chemical reaction tank 31 using a magnetic stirrer; 200426245 10 to 15 minutes to prepare; Next, a silicon substrate 10 is loaded on the Teflon crystal boat 41 As shown in FIG. 2, the sensitizer solution 2 is immersed in the sensitizer solution 2 for 20 to 30 minutes. b · Activation treatment: An activator solution 5 is prepared, which is composed of a palladium chloride solution with a concentration of 0.0000 to 0.003 moles and hydrochloric acid with a concentration of 0.05 to 0.09 moles in a ratio of ι: 1 and then placed The chemical reaction tank 32 is prepared by stirring with a magnetic stirrer for 10 to 15 minutes. Next, the sensitized Shixi substrate 10 is loaded on the Teflon crystal boat 41, as shown in FIG. 3, Immerse in the activator solution 5 for 5 to 10 minutes. c. Electroless plating deposition: An electroless plating reaction solution 6 is prepared. The electroless plating reaction solution 6 is prepared from a nickel sulfate solution of 0.5 to 0.7 mole concentration, a sodium hypophosphite solution of 0.2 to 0.4 mole concentration, and succinic acid. Sodium solution 0.4 ~ 0.5 Molar concentration, citric acid solution 0.08 ~ 0.12 Molar concentration, lead acetate solution 5 micro Molar concentration and sodium acetate solution 0.2 ~ 0.6 Molar concentration in a mixing ratio of 1: Add 1: 1: 1: 1: 1 to the chemical reaction tank 3 that can be heated up. Use a magnetic stirrer to stir for 10 ~ 15 minutes, and then add sulfuric acid to perform the acid test of the solvent. The ρΗ value of solution 6 at room temperature is 4 ~ 6; then the electroless deposit reaction solution 6 is used to electrolessly deposit the ㈣Q, which is to heat the non-reactive solution 6 to 75 ~ 85aC, and then activate the The silicon substrate 10 is loaded on a Teflon crystal boat 4 1 ±, as shown in FIG. 4 'soaked in the electroless plating reaction solution 6 for catalytic metal particle deposition (H) minutes, and is formed on the surface of the substrate i 〇 Metal layer containing 200426245 particles of catalytic metal. d. High-temperature process: The silicon substrate 10 treated with electroless nickel is loaded on a quartz boat 4 2, and then the quartz boat 4 2 is placed in a high-temperature furnace 7, as shown in FIG. 5, and The high temperature furnace tube 71 is used to provide a vacuum high temperature environment. The high temperature furnace 7 is heated to 90 ~ 100 T for 30 minutes to remove residual moisture and organic matter on the silicon substrate 10, and then the high temperature furnace is heated at 15 ° per minute. The C method successively heats up to 950 to 960 DC, and then continues at this temperature for 30 to 60 minutes, so that the catalytic metal particles and silicon atoms form a molten liquid silicide alloy at the substrate interface at high temperature. Due to the melting point of the silicide alloy It is lower than the substrate, and can be melted into a liquid at a lower temperature. Through the solid-liquid-solid (SLS) process mechanism, the silicon-silicon bonds are reorganized and arranged into silicon nanometers due to the catalyst effect. The growth structure of line 11 is shown in Figure 6. The invention uses electroless plating to prepare catalyst metal particles. The electroless plating method has a uniform coating layer, its porosity is smaller than that of the electroplating method, and it does not require electroplating equipment including glass, ceramics and plastics. Non-conductors can be electrolessly plated after proper pretreatment, which has the advantages of easy manufacturing process and low production and equipment costs. In addition, the synthesis mechanism of the growing silicon nanowires of the present invention is based on the well-known solid-liquid-solid (SLS) chemical synthesis process, which has been described in the following reference publications: HF · Yan, YJ · Xing, Q 丄 · Hang, DP · Yu, YP Wang, J. Xu, Z · Η. Xi, SQ Feng, "Growth of amorphous silicon nanowires via a solid-liquid-solid 200426245 mechanism '', Chemical Physics Letters 323, ρρ · 224-228 (2000); DP Yu, YJ Xing, QL Hang, HF Yan, J. Xu, ZH Xi, SQ Feng, "Controlled growth of oriented amorphous silicon nanowires via a solid-liquid-solid (SLS) mechanism ", Physica, E 9, pp. 305-309 (2001); the present invention uses a high temperature furnace tube in a high temperature furnace 7 to provide a vacuum high temperature environment, so that the catalytic metal particles and silicon atoms on the surface of the silicon substrate A silicide alloy is formed at the silicon substrate interface. Because the melting point of the silicide alloy is lower than that of the silicon substrate, it can be melted into a liquid at a lower temperature. Through the solid-liquid-solid (SLS) process mechanism, the temperature gradient is used to promote The silicon-silicon bonds are stacked into silicon nanowires due to the rearrangement of the catalyst effect. Compared with the arc discharge, laser ablation, and CVD deposition methods that have been previously known, the silicon nanowire method of the present invention It has the advantages of easy manufacturing process, low cost of materials and equipment, and can be produced in large batches. It is extremely useful in the development of the optoelectronic semiconductor industry. The results of the above examples show that the method for growing silicon nanowires of the present invention does have a manufacturing process. Easy, low-cost equipment, and can be produced in large batches. Although the preferred embodiments of the present invention have been disclosed above, it is not intended to limit the present invention. Any person skilled in the art will not depart from the spirit and scope of the present invention. In addition, as various modifications and retouching can be made, the scope of protection of the present invention shall be determined by the scope of the attached patent application. From the above detailed description, those skilled in the art can understand that the present invention can indeed achieve the foregoing The purpose is actually in accordance with the provisions of the Patent Law, and I have filed a patent application. 200426245 [Simplified illustration of the figure] Figure 1 shows the composition of the silicon nanowire of the present invention. Long process flow chart. Figure 2 is a schematic diagram of the surface sensitization treatment of the silicon substrate of the present invention. Figure 3 is a schematic diagram of the surface activation treatment of the silicon substrate of the present invention. Figure 4 is a schematic view of the electroless plating process of the silicon substrate of the present invention. Fig. 5 is a schematic diagram of the production of silicon nanowires in a high-temperature furnace according to the present invention. Fig. 6 is a schematic diagram of the silicon nanowires grown by high-temperature catalytic growth according to the present invention. [Illustration of the drawing number] (part of the present invention) Silicon nanowires 1 1 Chemical reaction tank 3 1, 3 2 Teflon crystal boat 4 1〉 Tongue solution 5 High-temperature furnace 7 $ evening substrate 1 〇 Sensitizer solution 2 Temperature-rising chemical reaction tank 3 3 Quartz crystal boat 4 2 No plating reaction Solution 6 High temperature furnace tube 7 1 a