TW200425430A - Flip chip package and method of forming - Google Patents
Flip chip package and method of forming Download PDFInfo
- Publication number
- TW200425430A TW200425430A TW92112946A TW92112946A TW200425430A TW 200425430 A TW200425430 A TW 200425430A TW 92112946 A TW92112946 A TW 92112946A TW 92112946 A TW92112946 A TW 92112946A TW 200425430 A TW200425430 A TW 200425430A
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- wafer
- cavity
- flip
- metal shell
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
200425430 五、發明說明(l) 【發明所屬之技術領域】 本發明是有關於一籀狀株 法,且特別是有關私種封衣件Package )及其製造方 r f 1 . u 有關於一種以介電液為散埶媒介之霜曰穴 (flip chip )封裝侏爲甘制也+ ~狀…炼”之覆晶式 7我仵及其製造方法。 【先前技術】 在科技日新月 電子產品,已成為 者電子產品邁向輕 也相對地開發出許 晶式封裝件。為了 設計將是重要的一 異的世代,利用積 現代人曰常生活中 薄短小之設計的潮 多高密度之半導體 維持覆晶式封裝件 環。 體電路元件所組成的 不可或缺的工具。隨 流’半導體封裝技術 封裝的形式,例如覆 的良好運作,其散熱200425430 V. Description of the invention (l) [Technical field to which the invention belongs] The present invention relates to a hoe-shaped plant method, and in particular, to a private-type wrapper package) and its manufacturer rf 1. U relates to a medium The electro-hydraulic is a flip chip of the loose medium (flip chip), the package is made of +7, and the method of flip-chip type 7 is a method and its manufacturing method. [Previous technology] In the science and technology of the new moon electronics, Has become a relatively lightweight electronic product and developed a crystal-like package. In order to design a different generation, it is important to use modern and high-density semiconductors in the daily life of high-density semiconductors. Flip-chip package ring. An indispensable tool for the body circuit components. With the flow of the semiconductor packaging technology packaging, such as the good operation of the cover, its heat dissipation
凊參照第1圖,其繪示乃傳統之覆晶式封裝件的剖面 圖。在第1圖中,覆晶式封裝件i 〇 〇包括基板i 〇 2、晶片 〇4、散熱片106、支撐物112及數個錫球114。其中,基板凊 Refer to FIG. 1, which shows a cross-sectional view of a conventional flip-chip package. In FIG. 1, the flip-chip package i 〇 〇 includes a substrate i 〇 2, a wafer 〇 4, a heat sink 106, a support 112, and a plurality of solder balls 114. Among them, the substrate
上〇2具有相對之一基板上表面1〇2a及一基板下表面1〇21), 而晶片1 04具有相對之一晶片主動表面j 〇4a及一晶片背面 l〇4b。晶片1 04係以晶片主動表面1〇4a覆晶接合於基板上 表面102a ’並電性連接至基板1〇2。錫球114係配置於基板 下表面102b上,用以供封裝件1〇〇與外界電路電性連接。 另外,支撐物1 1 2係為環形結構,其環繞固定於晶片 :04之侧面外之部分的基板上表面1 〇 2a上,用以撐高散熱 片106,使得散熱片106與晶片背面i〇4b導熱性連接。當 然,散熱片1 06可以藉由一黏著劑黏貼於晶片背面1 〇4b及The upper surface 02 has an upper surface of the substrate 102a and the lower surface 1021 of the substrate, and the wafer 104 has an opposite active surface of the wafer 104a and a back surface 104b of the wafer. The wafer 104 is bonded to the upper surface 102a 'of the substrate with the active surface 104a of the wafer and is electrically connected to the substrate 102. The solder balls 114 are arranged on the lower surface 102b of the substrate for the package 100 to be electrically connected to external circuits. In addition, the support 1 1 2 is a ring structure, which is fixed around the substrate upper surface 1 02a outside the side surface of the wafer: 04 to support the heat sink 106 so that the heat sink 106 and the back of the wafer i. 4b Thermally conductive connection. Of course, the heat sink 106 can be attached to the back of the chip 104b with an adhesive and
TW 325F(日月光).ptd 第6頁 200425430TW 325F (Sun and Moonlight) .ptd Page 6 200425430
五、發明說明(2) 支撐部112之上表而μ ^ ^ 衣面上。散熱 听產生的熱量逸散至外界中 良好運作。 片1 0 6之作用在於將晶片i 〇 4 以維持封覆晶式裝件1 0 0的 需要〉主意的县 告 良時,散熱片106及曰田片背熱面片/〇6與晶片背面1〇4b接觸不 晶片所產生的= =間隙,導致 外界中,大大地降低4埶;;有效地經由散熱片106逸散至 運作其鉅。 .......’影響覆晶式封裝件1 0 0的 【發明内容】 有鑑於此,本蘇明沾g 件及其製造方*,i利用不是在;供—種覆晶式封裝 熱傳相變化來逸散Γ片:Πί,數之介電液的 轨内之牴严Ή:: 產的熱量至外界,並以-金屬 7V又円之循Ϊ衣通路作為介雪、、衣 局;電液之熱傳相變化之循環流動,使 ί于本發明之覆晶式封裝件 .,^ f件了从達到良好的散熱效果及運作 性能。 根據本發明的目的,提 括基板、晶片、金屬殼及介 上表面及一基板下表面,晶 及一晶片背面。晶片係以晶 表面,並電性連接至基板。 凹穴之開口面向基板上表面 片,且基板係封住凹穴之開 凹穴卡,並與部分之基板上 出一種覆晶式封裝件,至少包 電液。基板具有相對之一基板 片具有相對之一晶片主動表面 片主動表面覆晶接合於基板上 金屬殼具有凹穴,金屬殼係以 與基板黏接,凹穴係納入該晶 口。介電液係填充於金屬殼之 表面、晶片背面及晶片之側面V. Description of the invention (2) The upper surface of the support portion 112 and the upper surface of the surface. Heat dissipation The heat generated by the hearing is dissipated to the outside world and works well. The function of the sheet 106 is to maintain the wafer i 〇4 to maintain the need to cover the crystal package 100. When the idea of the county is good, the heat sink 106 and the wafer sheet are hot back sheet / 〇6 and the back of the wafer. The 10 = b gap generated by contact with the wafer does not cause a significant decrease of 4 外界 in the outside world; it is effectively dissipated through the heat sink 106 to operate its giant. ....... 'Affects [Fundamental Content of Chip-on-Package Package 1 0 0] In view of this, Ben Suming and its manufacturer *, i use is not in place; for a kind of chip-on-package The heat transfer phase changes to dissipate the Γ sheet: Πί, the number of dielectric fluids in the rails is strict :: The heat generated by the outside to the outside, and -Metal 7V in turn through the clothing path as the clothing, clothing The circulation flow of the heat transfer phase of the electro-hydraulic changes makes the flip-chip package of the present invention achieve a good heat dissipation effect and operating performance. According to the purpose of the present invention, a substrate, a wafer, a metal shell, an upper surface and a lower surface of a substrate, and a crystal and a back surface of a wafer are included. The chip has a crystal surface and is electrically connected to the substrate. The opening of the cavity faces the upper surface sheet of the substrate, and the substrate is an opening cavity card that seals the cavity, and a flip-chip package is formed with a part of the substrate, at least an electro-hydraulic package. The substrate has one opposite substrate. The wafer has one opposite active surface of the wafer. The active surface of the wafer is bonded to the substrate. The metal shell has a cavity. The metal shell is bonded to the substrate. The cavity is incorporated into the crystal port. The dielectric liquid is filled on the surface of the metal shell, the back of the wafer and the side of the wafer
200425430 五、發明說明(3) 接觸,介電液係於金屬殼中 根據本發明的再一目的 造方法。首先,提供一基板 面及一基板下表面。接著, 表面及一晶片背面之晶片, 接合於基板上表面,使得晶 供一翻轉後之金屬殼,金屬 朝上。接著,填充一介電液 之基板及晶片與翻轉後之金 封裝件’晶片係被納入於凹 α。接著,翻正倒立之覆晶 之基板上表面、晶片背面及 金屬殼中為熱傳相變化之循 根據本發明的另一目的 括基板、晶片、金屬殼及介 上表面及一基板下表面,晶 及一晶片背面,晶片係以晶 表面,並電性連接至基板。 以凹穴的開口面向基板上表 晶片’且基板係封住凹穴的 扳、數個側板及一中空管, 以形成凹穴,並與基板黏接 相對之兩側板,並分隔凹穴 及數個直立通道,傾斜上部 為熱傳相變化之循環流動。 ’提出一種覆晶式封裝件的製 ’基板具有相對之一基板上表 提供一具有相對之一晶片主動 並將晶片以晶片主動表面覆晶 片與基板電性連接。然後,& 殼具有一凹穴:,凹穴之開口係 於凹穴中。然後’固定翻轉後 屬殼’以形成一倒立之覆晶式 穴中,基板係封住凹穴之開 式封裝件’使得介電液與部分 晶片之側面接觸’介電液係於 環流動。 ' ’提出一種覆晶式封裳件,包 電液。基板具有相對之—基寺反 片具有相對之一晶片主動i面 片主動表面覆晶接合於基板上 金屬殼具有一凹穴,金屬殼係 面與基板黏接’使得凹穴納入 開口。金屬殼包括一傾斜頂 此些側板係均與傾斜頂板連接 。中空管係貫穿此些側板中之 為一傾斜上部通道、一容置室 通道係位於傾斜頂板及中空管200425430 V. Description of the invention (3) Contact, the dielectric fluid is in a metal shell. A method according to still another object of the present invention. First, a substrate surface and a substrate lower surface are provided. Next, the surface and a wafer on the back of the wafer are bonded to the upper surface of the substrate, so that the crystal is provided with a metal shell after the flip, with the metal facing up. Next, the substrate and wafer filled with a dielectric liquid and the gold package 'wafer after the flip are incorporated into the recess α. Then, the upper surface of the flip-chip substrate, the back surface of the wafer, and the metal shell are inverted for heat transfer phase change. According to another object of the present invention, the substrate, the wafer, the metal shell, the upper surface and the lower surface of the substrate The back of a wafer and a wafer. The wafer is on the surface of the wafer and is electrically connected to the substrate. The opening of the cavity faces the surface wafer on the substrate, and the substrate is a plate that seals the cavity, several side plates, and a hollow tube to form a cavity, and is bonded to the opposite side plates of the substrate, and separates the cavity and There are several upright channels, and the inclined upper part is the cyclic flow of heat transfer phase change. ‘Propose a flip-chip package manufacturing method’ The substrate has an opposite substrate on the surface. Provide a wafer with an opposite substrate active and electrically connect the wafer to the substrate with the active surface of the wafer. The & shell then has a cavity: the opening of the cavity is tied into the cavity. Then "fix the flip shell" to form an inverted flip-chip cavity, and the substrate is an open package that seals the cavity so that the dielectric liquid is in contact with part of the side of the wafer. The dielectric liquid flows in a ring. '' Propose a flip-chip closure, including electro-hydraulic. The substrate has the opposite-the Jisi film has the opposite one. The active surface of the wafer is flip-chip bonded to the substrate. The metal shell has a cavity, and the metal shell system is bonded to the substrate 'so that the cavity is incorporated into the opening. The metal shell includes a slanted roof. These side panels are connected to the slanted roof. The hollow tube system runs through these side plates as an inclined upper channel and an accommodation chamber. The channel system is located on the inclined top plate and the hollow tube.
200425430 五、發明說明(4) 之間。容置室係位於中空管、此些側板及基板上表面之 曰1 ’並用以容納晶片。此些直立通道係位於部分之側板及 . 中空管之間,用以連通傾斜上部通道及容置室。其中,傾 斜上部通道、容置室、此些直立通道係形成一循環通路。 个電液係填充於金屬殼之凹穴中,並與部分之基板上表 面、晶片背面及晶片之側面接觸,介電液係可於此循環通 路作熱傳相變化之循環流動。 為讓本發明之上述目的、特徵、和優點能更明顯易 董’下文特舉一較佳實施例,並配合所附圖式,作詳細説· 明如下: 【實施方式】 實施例一 請參照第2圖,其繪示乃依本發明之實施例一之覆晶 式封裝件(flip chip package)的剖面圖。在第2圖中, 覆晶式封裝件20 0至少包括基板2 02、晶片2 04、數個錫球 214、金屬殼230及介電液240。基板202具有相對之基板上 表面2 0 2a、基板下表面2〇2b及數個基板側面2〇2c,基板侧 面202c係連接基板上表面2〇2a及基板不表面2〇2b。晶片 義 2 04具有相對之晶片主動表面2〇4a、晶片背面2〇4b及數個 晶片側面204 c,晶片側面20 4c係連接晶片主動表面2 04a及 f片背面204b。其中,晶片2 04係以晶片主動表面2 〇4a覆 晶接合於基板上表面2〇2a,並電性連接至基板2〇2。錫球 2:14係配置於基板下表面2〇21)上,用以供覆晶式封裝件2〇()200425430 V. Description of Invention (4). The accommodating chamber is located at 1 'on the upper surface of the hollow tube, these side plates, and the substrate, and is used to accommodate the wafer. These upright channels are located between the side plates of the part and the. Hollow tubes, and are used to communicate with the inclined upper channels and the accommodation chamber. Among them, the inclined upper passage, the accommodation chamber, and these upright passages form a circulation passage. Each electro-hydraulic system is filled in the cavity of the metal shell, and is in contact with a part of the surface on the substrate, the back of the wafer, and the side of the wafer. The dielectric fluid can circulate in this circulation path for heat transfer phase change. In order to make the above-mentioned objects, features, and advantages of the present invention more obvious, a preferred embodiment is given below, and in accordance with the accompanying drawings, the detailed description and explanation are as follows: [Embodiment] Please refer to the first embodiment FIG. 2 is a cross-sectional view of a flip chip package according to the first embodiment of the present invention. In FIG. 2, the flip-chip package 200 includes at least a substrate 202, a wafer 204, a plurality of solder balls 214, a metal shell 230, and a dielectric liquid 240. The substrate 202 has a substrate upper surface 202a, a substrate lower surface 202b, and a plurality of substrate side surfaces 202c. The substrate side surface 202c connects the substrate upper surface 202a and the substrate non-surface 202b. The wafer Y2 04 has the opposite active surface of the wafer 204a, the back surface of the wafer 204b, and several wafer side surfaces 204c. The wafer side 204c is connected to the wafer active surface 204a and the f-back surface 204b. Among them, the wafer 204 is bonded to the upper surface of the substrate 202a with the wafer active surface 204a and is electrically connected to the substrate 202. The solder ball 2:14 is arranged on the lower surface of the substrate (2021) for the chip-on-chip package 20 ()
200425430 五、發明說明(5) 舆外界電路電性連接。 金屬殼2 3 0具有傾斜頂板232、數個側板2 34及中空管 236 ’此些側板2 34係與傾斜頂板232連接以形成一凹穴 238 °凹穴23 8的開口係與傾斜頂板2 32相對,且中空管236 (系貫穿此些側板2 3 4之相對之兩側板,如第3圖所示。其 中’第3圖繪示乃第2圖之金屬殼的立體圖,而中空管236 之截面例如是方形,且中空管236之貫通孔237係可與外界 相通,使得外界空氣可以流通於貫通孔2 3 7中。需要注意200425430 V. Description of the invention (5) Electrical connection of the external circuit. The metal shell 2 3 0 has an inclined top plate 232, several side plates 2 34, and a hollow tube 236. These side plates 2 34 are connected to the inclined top plate 232 to form a cavity 238 ° the cavity 23 8 opening system and the inclined top plate 2 32 is opposite, and the hollow tube 236 (is the two opposite sides of these side plates 2 3 4, as shown in Figure 3. Among them, 'Figure 3 shows a perspective view of the metal shell of Figure 2, and the hollow The cross section of the tube 236 is, for example, square, and the through hole 237 of the hollow tube 236 can communicate with the outside world, so that outside air can circulate in the through hole 2 37. It should be noted that
的是’只要沿著yz平面進行第3圖之金屬殼23 0的剖面動 作’再由X之反方向看過去,即可呈現第2圖之金屬殼2 30 的面貌。 在第2圖及第3圖中,中空管236係可分隔凹穴238為傾 斜上部通道242、容置室244及數個直立通道246。傾斜上It is “as long as the cross-sectional movement of the metal shell 23 0 in FIG. 3 is performed along the yz plane” and viewed from the opposite direction of X, the appearance of the metal shell 2 30 in FIG. 2 can be presented. In Figs. 2 and 3, the hollow tube 236 is a partitionable cavity 238, which is an inclined upper passage 242, an accommodation chamber 244, and a plurality of upright passages 246. Tilt up
4通道2 4 2係位於傾斜頂板2 3 2及中空管2 3 6之間,容置室 」44係位於中空管236及凹穴2 38的開口之間,直立通道246 係位於部分之側板2 34及中空管2 3 6之間,用以連通傾斜上 邛通道242及容置室244。其中,傾斜上部通道242、容置 室244、直立通道246係形成一循環通路。由於基板202之 基板上表面202a的面積小於或等於金屬殼230之凹穴238的 開口大小’此些側板234將對應地與此些基板側面2〇2c黏 接’使得金屬殼23 0係以凹穴238的開口朝向基板上表面 :〇2a之方式與基板2〇2黏接。因此,基板2〇2及晶片2〇4係 被納入於容置室244中,且基板2〇2係封住凹穴2 38的開 其中此些侧板234可以對應地藉由防水性黏著劑與The 4 channel 2 4 2 is located between the inclined roof 2 3 2 and the hollow tube 2 3 6. The accommodating chamber 44 is located between the hollow tube 236 and the opening of the cavity 2 38. The upright channel 246 is located in part. The side plate 2 34 and the hollow tube 2 3 6 are used to communicate with the inclined upper channel 242 and the accommodation chamber 244. Among them, the inclined upper passage 242, the accommodation chamber 244, and the upright passage 246 form a circulation passage. Since the area of the upper surface 202a of the substrate 202 is smaller than or equal to the opening size of the recesses 238 of the metal shell 230, 'these side plates 234 will correspondingly adhere to the side surfaces 202c of these substrates', so that the metal shell 230 is recessed. The opening of the cavity 238 faces the upper surface of the substrate: 〇2a and is adhered to the substrate 202. Therefore, the substrate 200 and the wafer 204 are included in the accommodating chamber 244, and the substrate 200 is sealed to the recess 2 38. The side plates 234 can be correspondingly protected by a waterproof adhesive. versus
TW ]25F(曰月光).ptd 07Q 第10頁 200425430 玉、發明說明(6) =些基板侧面2G2c黏接,而防水性黏著劑例如是防水性樹 八^電液240係填充於容置室244中,介電液—係與部 :之ίΪ上表面2〇2a、晶片背面2〇4b及晶片側面2〇4c接 獨,;I電液240係於金屬殼2 30令以傾斜上部通道242、容 ί二2:!·、直立通道246所形成之循環通路作熱傳相變化之 循壞〜動。此時,介電液24 0之液面係高於晶片背面。介 :液24 0之特性在於不導電’可以避免封〇〇 生短路現象》 當晶片204的溫度高於介電液24〇的溫度時,部分之介 電液24 0將吸收晶片202所產生的熱量而 夜蒸氣。因此可以帶走晶片202所產生的熱量,而降低晶 片2 04的溫度。當介電液蒸氣經由直立通道246上升到傾斜 上部通道242中並碰觸到傾斜頂板23 2及中空管2 36時,由 ,傾斜頂板2 32外及貫通孔2 37中之空氣的溫度比介電液蒗 乳的溫度還低,部分之介電液蒸氣將釋出熱量給外界空 氣,並凝結成介電液。由於傾斜上部通道242傾斜的關 係,所凝結之介電液將因重力關係而順著傾斜上部通道 142及直立通道246流回容置室244中,完成介電液24〇之熱 ί相變~化的循環。所以,介電液24〇係可於傾斜上部通道 乙42、谷置室244、直立通道246所形成之循環通路作埶傳 在介電液240的熱傳相變化的循環下,由於介電液的 熱傳效果尚於傳統之散熱片i 〇 6的熱傳效果,使得晶片2 〇 4TW] 25F (Yueguang) .ptd 07Q Page 10 200425430 Jade and invention description (6) = 2G2c bonding on the side of some substrates, and the waterproof adhesive is, for example, a waterproof tree. In 244, the dielectric fluid-system and part: the upper surface 202a, the back surface 204b, and the side surface 204c of the wafer are connected; the electro-hydraulic 240 is connected to the metal shell 2 30 to tilt the upper channel 242. , Rong Er 2: 2: ·, the circulation path formed by the upright channel 246 is used to change the phase of the heat transfer phase ~ moving. At this time, the liquid level of the dielectric liquid 240 is higher than the back surface of the wafer. Dielectric: The characteristic of liquid 240 is that it is non-conductive, which can avoid the phenomenon of short circuit. When the temperature of wafer 204 is higher than the temperature of dielectric liquid 240, some dielectric liquid 240 will absorb the generated by wafer 202. Heat and night vapor. Therefore, the heat generated by the wafer 202 can be taken away, and the temperature of the wafer 204 can be reduced. When the dielectric liquid vapor rises through the upright channel 246 into the inclined upper channel 242 and touches the inclined top plate 23 2 and the hollow tube 2 36, the temperature ratio of the air in the outside of the inclined top plate 2 32 and the through hole 2 37 The temperature of the dielectric fluid is still low, and some of the dielectric fluid vapor will release heat to the outside air and condense into a dielectric fluid. Due to the inclined relationship of the inclined upper channel 242, the condensed dielectric liquid will flow back to the containing chamber 244 along the inclined upper channel 142 and the upright channel 246 due to the relationship of gravity, completing the thermal phase change of the dielectric liquid 24. Cycle. Therefore, the dielectric fluid 24 can pass through the circulation path formed by the inclined upper channel B42, the valley chamber 244, and the upright channel 246 under the circulation of the heat transfer phase change of the dielectric liquid 240. The heat transfer effect is still lower than that of the conventional heat sink i 〇6, which makes the wafer 2 〇 4
麵 025F(曰月光).ptd m025F (Yueyue) .ptd m
第11頁 200425430 五、發明說明(7) 所產生的熱量將很快地可以經由 而祜浼捋5々k田 ^ β田;丨電液240之熱傳相變化 而被逸政至外界,使得覆晶式封 ^ 敦熱效果,以維持高品質的運作狀態。 1良好的 實施例二 h ΐ Ϊ照第4圖,L示75依本發明之實施例二之霜曰 式封裝件的剖面圖。在第4圖中, 覆曰曰 例-之覆晶式封穿件20 0不覆曰曰式封裝件400與實施 、可表仵ζ υ ϋ不同之處在於,霜曰彳 f具有㈣之基板上及==件_ 的開口 i t板上表面40 2a的面積大於金屬殼2 30之凹穴238 臭板與金屬殼230組合時,側板234之底端係與 ί Θ臭板上# 接,使得金屬殼2 30係以凹穴238的開口 m 2a之方式與基板4 02黏接。因此,晶片 穴2 38的開…ί至2:4:二基板上表面4〇2“封住凹 β h # Μ 中此些側板2 34之底端可以對應地藉由 7η 者背”基板上表面40 2a黏接,而防水性黏著劑例 如疋防水性樹脂。 > :參照第5圖’其繪示乃依照本發明之實施例一及實 5:例一之覆曰曰式封装件之製造方法的流程圖。言青同時參考 2〜4圖/首σ先’在步驟502中,首先,提供一基板202或 '02。接著,提供一晶片204,並設置晶片2 04於基板2 0 2或 4〇2上。日日片m以晶片主動表面2()4 &覆晶接合於基板上表 面2心或4心’並電性連接至基板2G2或40 2。 200425430 五、發明說明(8) 然後,進入步驟506,提供一翻轉後之金屬殼230,金 屬殼230具有一凹穴238,凹穴238之開口係朝上。其中, 金屬殼2 3 0之結構如第2圖及第3圖所示,在此不再贅述。 接著’進入步驟508中,填充介電液240於翻轉後之金屬殼 ::30之凹穴238中。然後,進入步驟510中,固定翻轉後之 基板2 0 2及晶片2 0 4與翻轉後之金屬殼2 3 0,並形成一倒立 之覆晶式封裝件2 0 0或4 0 0。例如,以一防水性黏著劑黏接 基板側面20 2 c及側板234或基板上表面4〇2c及側板2 34,使 澤金屬殼230與基板20 2或40 2黏接。其中,當基板上表面 ::0 2 a小於或等於金屬殼2 3 0之凹口 2 3 8之開口大小時,基板 2 0 2及晶片2 0 4係被納入於凹穴2 3 8中,基板2 0 2係封住凹穴 38的開口,當基板上表面4〇2a大於金屬殼230之凹口 238 之開口大小時,晶片2 0 4係被納入於凹穴2 3 8中,基板上表 面402c係封住凹穴238的開口。接著,進入步驟512中,翻 正此倒立之覆晶式封裝件2 〇 〇或4 〇 〇,使得介電液2 4 〇盥曰 片背面204b、晶片側面2〇4c及部分之基板上表面2〇2a或 △:0 2a接觸。傾斜上部通道242、容置室244、直立通道246 係形成一循環通路,且介電液24 〇係可於此循環通路作熱 傳相變化之循環流動。 然熟悉此技藝者亦可以明瞭本發明之技術並不侷限於 此,例如,傾斜頂板232、數個側板234及中空管23 6可以、 疋一體成型之結構,金屬殼230之材質為銅、鐵及其他高 導熱性物質。此外,基於中空管23 6與頂板23 2形成傾同 邹通道242的前提下,中空管236的截面可以是任何形狀。Page 11 200425430 V. Description of the invention (7) The heat generated will quickly pass through 5 祜 浼 捋 k fields ^ β fields; the heat transfer phase of the electro-hydraulic 240 is changed to the outside world, so that Flip-Chip Sealing ^ Damp effect to maintain high quality operation. 1 A good embodiment 2 h ΐ Ϊ According to FIG. 4, L shows a cross-sectional view of a frosted package of 75 according to the second embodiment of the present invention. In FIG. 4, the example of the cover-type sealing and sealing member 20 0 and the cover-type package 400 is different from the implementation and can be expressed as 仵 ζ υ ϋ. The frost 彳 f has a substrate of ㈣. The area of the upper surface 40 2a of the it board is larger than the recess 238 of the metal shell 2 30. When the odor board and the metal shell 230 are combined, the bottom end of the side board 234 is connected to ί odor board #, so that The metal shell 2 30 is adhered to the substrate 402 with the opening m 2a of the recess 238. Therefore, the opening of the wafer cavity 2 38 is up to 2: 4: the upper surface of the two substrates 402 "seals the recess β h # Μ. The bottom ends of these side plates 2 34 can be correspondingly backed by the 7η person" substrate. The surface 40 2a is adhered, and a water-resistant adhesive such as a water-resistant resin. >: Referring to FIG. 5 ', the drawing is a flow chart of a method for manufacturing a package in accordance with the first embodiment and the fifth embodiment of the present invention. Yan Qing refers to 2 to 4 pictures / first σ first 'at step 502. First, a substrate 202 or '02 is provided. Next, a wafer 204 is provided, and the wafer 204 is set on the substrate 202 or 402. The day-to-day chip m is bonded to the substrate 2G or 4C with the active surface 2 () 4 & flip chip of the wafer and is electrically connected to the substrate 2G2 or 402. 200425430 V. Description of the invention (8) Then, step 506 is provided to provide a metal case 230 after being turned over. The metal case 230 has a recess 238, and the opening of the recess 238 faces upward. The structure of the metal shell 230 is as shown in FIG. 2 and FIG. 3, and is not repeated here. Then, the method proceeds to step 508, and the dielectric liquid 240 is filled in the recess 238 of the metal case :: 30 after the inversion. Then, in step 510, the flipped substrate 202 and the wafer 204 and the flipped metal shell 230 are fixed, and an inverted flip-chip package 200 or 400 is formed. For example, the side surface of the substrate 20 2 c and the side plate 234 or the top surface of the substrate 402 c and the side plate 2 34 are adhered with a waterproof adhesive, so that the metal case 230 is adhered to the substrate 20 2 or 40 2. Among them, when the upper surface of the substrate: 0 2 a is less than or equal to the opening size of the notch 2 3 8 of the metal shell 2 3 0, the substrate 2 0 2 and the wafer 2 0 4 are included in the cavity 2 3 8. The substrate 2 0 2 seals the opening of the cavity 38. When the upper surface 40 2 a of the substrate is larger than the opening size of the notch 238 of the metal shell 230, the wafer 2 0 4 is included in the cavity 2 3 8. The surface 402c seals the opening of the recess 238. Next, in step 512, the inverted flip-chip package 2000 or 400 is inverted, so that the dielectric liquid 240 is on the back surface 204b of the wafer, the side surface 204c of the wafer, and the upper surface 2 of the substrate 2 〇2a or △: 0 2a. The inclined upper channel 242, the accommodating chamber 244, and the upright channel 246 form a circulation path, and the dielectric fluid 240 can perform a cyclic flow in which the heat transfer phase changes. However, those skilled in the art can also understand that the technology of the present invention is not limited to this. For example, the inclined top plate 232, a number of side plates 234, and the hollow tube 23 6 can be integrally formed. The material of the metal shell 230 is copper, Iron and other highly thermally conductive substances. In addition, based on the premise that the hollow tube 23 6 and the top plate 23 2 form the same Zou channel 242, the cross section of the hollow tube 236 may be any shape.
200425430 五、發明說明(9) J電液240例如是低介電係數液體及冷卻液pc — 72,而冷卻 夜F C - 7 2之沸點大致上為5 6 · 6 C。當然,本發明亦可以省 咯中空管246的設計,依然可以讓覆晶式封裝件2〇0及4〇〇 達到散熱的效果。 本發明上述實施例所揭露之覆晶式封裝件及其製造方 ^#^利用不導電及低介電係數之介電液的熱傳相變化而 ^所產生的熱量至外界’並以金屬殼内之循環通路 =為;丨電液之熱傳相變化之循環流動,使 件可t達到良好的散熱效果及運作性能。& m 妙νϋ:述’雖然本發明已以一較佳實施例揭露如上, 以ί 發明,任何熟習此技藝者,在不脫離 本:日=2 内,當可作各種之更動與潤飾,因此 ’、遵範圍當視後附之申請專利範圍所界定者為 平。200425430 V. Description of the invention (9) J electro-hydraulic 240 is, for example, a low-dielectric constant liquid and a cooling liquid pc — 72, and the boiling point of the cooling night F C-7 2 is approximately 5 6 · 6 C. Of course, the present invention can also save the design of the hollow tube 246, and still allow the flip-chip packages 2000 and 400 to achieve the effect of heat dissipation. The flip-chip package and its manufacturing method disclosed in the above embodiments of the present invention ^ # ^ use the heat transfer phase change of the non-conductive and low dielectric constant dielectric fluid ^ generated heat to the outside 'and the metal shell The internal circulation path = is; 丨 The circulating flow of the heat transfer phase of the electro-hydraulic changes, so that the part can achieve a good heat dissipation effect and operating performance. & m 妙 νϋ: described 'Although the present invention has been disclosed as above with a preferred embodiment, to invent, anyone skilled in this art will not depart from this: Day = 2, when various changes and retouching can be made, Therefore, the scope of 'and compliance' shall be regarded as flat as defined by the scope of the attached patent application.
面圖。 之覆晶式封裝件 200425430 圖式簡單說明 【圖式簡單說明】Face view. Flip-chip package 200425430 Simple illustration of the drawing [Simplified illustration of the drawing]
第1圖繪示乃傳統之覆晶式封I 第2圖繪示乃依照本發明之會:牛的剖 員%例 的剖面圖。 第3圖繪示乃第2圖之金屬殼的立體u 第4圖繪示乃依照本發明之眘价y -圖。 〜貝她例二夕 的剖面圖。 復日日式封裳 第5圖繪示乃依照本發明之實施例一 晶式封裝件之製造方法的流程圖。 實施例 件 之覆Fig. 1 shows a conventional flip-chip type seal I. Fig. 2 shows a cross-sectional view of the example of the cattle's cross-section, according to the meeting of the present invention. Figure 3 shows the three-dimensional u of the metal shell in Figure 2. Figure 4 shows the prudent y-graph according to the invention. ~ Beta case cross-sectional view. Figure 5 shows a flowchart of a method for manufacturing a crystal package according to the first embodiment of the present invention. Example Cover
圖式標號說明 100、2 0 0、40 0 :覆晶式封裝件 102、2 0 2、4 0 2 ··基板 102a、202a、402a :基板上表面 102b、2 0 2b、40 2b :基板下表面 1 0 4 、2 0 4 :晶片 104a、2 04a :晶片主動表面 104b 、 204b :晶片背面 1 0 6 :散熱片 11 2 :支撐物 11 4、2 1 4 :錫球 2 0 2 c :基板側面 2 0 4c :晶片侧面Explanation of reference numerals 100, 2 0, 4 0 0: flip-chip package 102, 2 0 2, 4 0 2 · substrates 102a, 202a, 402a: upper surface of the substrate 102b, 2 0 2b, 40 2b: under the substrate Surfaces 104, 204: wafers 104a, 204a: wafer active surfaces 104b, 204b: wafer back surface 106: heat sink 11 2: support 11 4, 2 1 4: solder balls 2 0 2c: substrate Side 2 0 4c: Side of wafer
200425430 圖式簡單說明 230 金屬殼 232 頂板 234 側板 236 中空管 237 貫通孔 238 凹穴 240 介電液 242 傾斜上部通道 244 容置室 246 直立通道 ❿ TW 025F(日月光).ptd 第16頁200425430 Brief description of drawings 230 Metal shell 232 Top plate 234 Side plate 236 Hollow tube 237 Through hole 238 Recess 240 Dielectric liquid 242 Inclined upper channel 244 Receiving room 246 Upright channel ❿ TW 025F (sunlight) .ptd page 16
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW92112946A TWI234855B (en) | 2003-05-13 | 2003-05-13 | Flip chip package and method of forming |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW92112946A TWI234855B (en) | 2003-05-13 | 2003-05-13 | Flip chip package and method of forming |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200425430A true TW200425430A (en) | 2004-11-16 |
TWI234855B TWI234855B (en) | 2005-06-21 |
Family
ID=36597965
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW92112946A TWI234855B (en) | 2003-05-13 | 2003-05-13 | Flip chip package and method of forming |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI234855B (en) |
-
2003
- 2003-05-13 TW TW92112946A patent/TWI234855B/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
TWI234855B (en) | 2005-06-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10816275B2 (en) | Semiconductor device assembly with vapor chamber | |
US20230395463A1 (en) | Methods of manufacturing stacked semiconductor die assemblies with high efficiency thermal paths | |
US11594469B2 (en) | Semiconductor device and method of manufacture | |
US5880524A (en) | Heat pipe lid for electronic packages | |
TWI672775B (en) | Semiconductor device assembly with through-mold cooling channel | |
US11832419B2 (en) | Full package vapor chamber with IHS | |
US9837396B2 (en) | Stacked semiconductor die assemblies with high efficiency thermal paths and associated methods | |
TWI357135B (en) | Chip package structure and manufacturing method th | |
US8970029B2 (en) | Thermally enhanced heat spreader for flip chip packaging | |
US7433188B2 (en) | Electronic package with direct cooling of active electronic components | |
KR20190076661A (en) | Electronic device and method of manufacturing an electronic device | |
JP6550140B2 (en) | Semiconductor device assembly with underfill receiving cavity | |
JPH079956B2 (en) | Heat sink for integrated circuit board | |
JP2017525150A (en) | Stacked semiconductor die assembly and associated system having high efficiency thermal path | |
TW200531242A (en) | Multi package module with heat spreader | |
TWI231977B (en) | Multi-chips package | |
CN116825730A (en) | Semiconductor package | |
US20230075909A1 (en) | Electronic apparatus, semiconductor package module and manufacturing method thereof | |
TW200425430A (en) | Flip chip package and method of forming | |
JPS6084848A (en) | Semiconductor device | |
JPS58218148A (en) | Cooling device for electronic part | |
TWI248667B (en) | Semiconductor package having heat pipes | |
US20230307316A1 (en) | Semiconductor package with vapor chamber lid | |
TWI395306B (en) | Heat-dissipating modularized structure of a semiconductor package and method of forming the same | |
TWI236751B (en) | Semiconductor package with internal heat pipe |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |