TW200419671A - Method for polymer removal after an etching process - Google Patents
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- TW200419671A TW200419671A TW92107255A TW92107255A TW200419671A TW 200419671 A TW200419671 A TW 200419671A TW 92107255 A TW92107255 A TW 92107255A TW 92107255 A TW92107255 A TW 92107255A TW 200419671 A TW200419671 A TW 200419671A
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200419671200419671
登JlJ哲屬之枯術領域 H本發明是有關於一種半導體元件的製作方法,且特別 是關於一種在蝕刻製程後移除高分子的方法。 先前技術 記憶元件(memory device)通常包括形成於一第一介 電層上的一第一閘極,而第一介電層係形成於—半導體美 底上。就快閃記憶體lash mem〇ry )而言,第一閘極就是 洋置閘極(float ing gate),、第一介電層則是隧穿氧化層^ (tunnel ing oxide)。一個快閃記憶元件還包括形成於浮 置閘極上的一控制閘極(contr〇l gate)與位於浮置閘極盥 控制閘極之間的第二介電層。 /、 而在記憶元件的製程中,閘極是藉由沉積、圖案化與 蝕刻所製得。然而,蝕刻製程常導致不希望產生的聚合材 料沿著被蝕刻的閘極側壁形成。這些聚合材料將造成某此 缺點’譬如隨機單一位元資料保持失敗(rand〇[n single bit data retention failure) 〇 在傳統的半導體製程中,在蝕刻製程後通常需接續一 道β /糸步驟。傳統清潔步驟之一是由ψ e r n e r κ e Γ n所研發 的RCA清潔方法。這種RCA清潔是一種兩步驟(two-step)製 程’包括標準清潔l(Standard Clean 1,又稱SC-1)與標 準清潔2(Standard Clean 2,又稱SC-2)。在標準清潔1 中,SC-1溶液通常是以1 : 1 : 5至1 : 2 ·· 7之間混合的氫氧 4匕錢(ammoni um hydroxide)、過氧 4匕氮(hydrogen peroxide)以及去離子水(deionized water)。標準清潔2The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for removing a polymer after an etching process. Prior art memory devices generally include a first gate formed on a first dielectric layer, and the first dielectric layer is formed on a semiconductor substrate. In terms of flash memory (flash memory), the first gate is a floating ing gate, and the first dielectric layer is a tunneling oxide ^. A flash memory device further includes a control gate formed on the floating gate and a second dielectric layer between the control gate of the floating gate and the control gate. /, In the memory device manufacturing process, the gate is made by deposition, patterning, and etching. However, the etching process often results in the formation of undesired polymeric materials along the gate sidewalls being etched. These polymeric materials will cause some of these disadvantages, such as random single bit data retention failure. In traditional semiconductor processes, a β / 糸 step is usually required after the etching process. One of the traditional cleaning steps is the RCA cleaning method developed by ψ e r n e r κ e Γ n. This RCA cleaning is a two-step process, which includes Standard Clean 1 (also known as SC-1) and Standard Clean 2 (also known as SC-2). In standard cleaning 1, the SC-1 solution is usually ammoni um hydroxide, hydrogen peroxide, and hydrogen peroxide, which are mixed between 1: 1: 5 to 1: 2 ·· 7, and Deionized water. Standard cleaning 2
10312twf.ptd 第6頁 200419671 五、發明說明(2) 則使用含氫氣酸(117(11'〇(:111〇1^〇&(^(1)、過氧化氫以及去 離子水的化合物(compos iti on)。除了 RCA蝕刻以外,其他 傳統的清潔溶液都使用含有硫酸(s u 1 f u r i c a c i d )與過氧 化氫的混合物(mixture)來去除有機金屬雜質 (impurity) 〇 然而,儘管上述這些傳統溶液可有效去除各種污染物 (contaminant),但是這些溶液同樣會蝕刻隧穿氧化層, 而降低隧穿氧化層的完整度(integrity)。這種非預期的 隨穿氧化層劣化將損害記憶元件的可靠度(reliabiHty) 與長期效能(long-term performance)。 發明内客 因此,本發明提出一種製造半導體元件的方法 提供一晶圓基底。然後,於晶圓基底上提供一絕緣體 (々insulator),再於絕緣體上沉積一第一矽層。之後,於 第一矽層上形成一介電材質層,再於介電 、 第二石夕層。接著,☆第二石夕層上提供一光阻;:㈡: 32阻層,,蝕刻未被光阻層覆蓋的第二石夕層、 "電材質層、帛-硬層與絕緣體。之後將光阻層曰 二 =子水與臭氧氣體(。zone gas)的混合物至少清潔第再 本發明又提出一種製造半導體元件的 一介電材質層,再於介電材質層上沉積一 矽層上提供一光阻層,再圖案化與定義光 刻未被光阻層覆蓋的矽層與介電材質層。 方法,包括提供 矽層。接著,於 阻層。然後,蝕 之後將光阻層去10312twf.ptd Page 6 200419671 V. Description of the invention (2) A hydrogen-containing acid (117 (11′〇 (: 111〇1 ^ 〇 & (^ (1), hydrogen peroxide, and deionized water compounds ( compos iti on). Except for RCA etching, other traditional cleaning solutions use a mixture containing sulfuric acid (su 1 furicacid) and hydrogen peroxide to remove organometallic impurities. However, although these conventional solutions can Effectively remove various contaminants, but these solutions will also etch the tunneling oxide layer and reduce the integrity of the tunneling oxide layer. This undesired degradation with the tunneling oxide layer will damage the reliability of the memory device (ReliabiHty) and long-term performance. The inventor therefore proposes a method of manufacturing a semiconductor device to provide a wafer substrate. Then, an insulator is provided on the wafer substrate, and then A first silicon layer is deposited on the insulator. Then, a dielectric material layer is formed on the first silicon layer, and then a dielectric and a second stone layer are formed. Then, the second stone A photoresist is provided on the layer; ㈡: 32 layer, which etches the second stone layer that is not covered by the photoresist layer, " electrical material layer, 帛 -hard layer and insulator. Then the photoresist layer is referred to as two = The mixture of sub-water and ozone gas (.zone gas) is at least clean. The present invention also proposes a dielectric material layer for manufacturing semiconductor elements, and then depositing a silicon layer on the dielectric material layer to provide a photoresist layer. Re-patterning and defining the silicon layer and the dielectric material layer that are not covered by the photoresist layer. The method includes providing a silicon layer. Next, the resist layer. Then, the photoresist layer is removed after etching.
200419671 五、發明說明(3) 除,再以去離子水與臭轰^ 本發明再提出一種製2半:2合物進行清潔。 -晶圓基底。然後,於晶以:的方法,包括提供 緣體上沉積一矽層。之後,於矽it 緣體,再於絕 再於介電材質層上提供_光/上形成—介電材質層, 層。然後,敍刻未被光阻 “ ^圖案化與定義光阻 光阻層去除’#以去離子;;絕緣體。之後將 層。 /、六虱軋體的混合物清潔矽 本發明的其他附加特徵 並且在某種程度上來說,顯^可經由^後内容中提出, 本發明的特徵與優點。並且,、經由^ ^ 2實施例獲悉 具善指^妹内容而獲得並睁 的申請專利範圍中 此外,前叶士 ^瞭本發明的特徵與優點。 用來作f ^ # X明之概要以及後續的較佳實施例均係 用來與解釋,而非用以限定本發明。 2讓本發明之上述和其他…特徵、和優點能更明 說明如下下文特舉較佳實施例,並配合所附圖 <,作詳細 實施方4 一明參考以下所提詳細的本發明較佳實施例,且以附圖 j月之。無論如何只要是在圖示中是 一編號,則代 表同一部件。 法 t發明提出一種去除形成在閘極表面的高分子的方 第1 -3圖係依照本發明之一較佳實施例之製造步驟剖 面圖。請參照第1圖,本發明之較佳實施例首先是定義一 200419671 五、發明說明(4) 絕緣 晶圓基底1 0。然後於晶圓基底1 〇上形成一絕緣體2 〇。 體20可以是由氧化物所組成,也可能是一隧穿氧化層 (tunneling oxide)。隨後,進行一清潔絕緣層2〇表面的 步驟,以去除不想有的污染物(contaminant)。然後,於 絕緣體2 0上提供一第一閘極層3 〇,如多晶矽。第一閘極層 3 0可採用傳統的製程如化學氣相沉積製程 (chemica 卜 vapor depositi〇n,簡稱 CVD)沉積於絕緣體 上。之後,於第一閘極層3〇上提供一介電材質層4〇。 於一實施例中,在介電材質層4〇上再沉積一光阻声 丄繪不):然•’利用一傳統的微影製程圖案化並定“ ”二之後,“圖案化並定義過的光阻層作為軍幕,^ 一乾式蝕刻,以形成包括絕緣體2〇與第一仃 半導體結構。然而,在乾式鈕 層30的數個 所存在的有機化合物能因為姓刻氣體中 的副產物(b"roduct)。接著,:;3::壁::預期外 一清潔步驟1以去除預期外且不想要^產:特別進行 這些副產物可經由如下之氧化過程被。而且, 〇3 + CxHy—〇2 + CzHa(〇H)b 或 本發明使m:c”2〇+cA〇 ⑷xtrue) Λ除二物與臭氧(DI,^ 个方味田丨』屋物,係脾200419671 V. Description of the invention (3) Divide it with deionized water and odor bombardment ^ The present invention also proposes a method for preparing 2 halves: 2 compounds for cleaning. -Wafer substrate. Then, Yu Jing's method includes providing a silicon layer on the edge body. After that, it is provided on the silicon edge body, and then is provided on the dielectric material layer_light / formation-dielectric material layer, layer. Then, the photoresist is not patterned and the photoresist layer is removed to remove ions; the insulator. The layer is then removed. / The mixture of six lice rolls cleans other additional features of the invention and To a certain extent, it can be mentioned in the following content, the features and advantages of the present invention. And, through the ^ ^ 2 embodiment, the content of the patent application obtained and learned through the ^ ^ sister in addition to the scope of the patent application The former Ye Shi ^ the characteristics and advantages of the present invention. The outline of f ^ # X 明 and subsequent preferred embodiments are used for explanation and not to limit the present invention. 2 Let the above of the present invention And other features and advantages can be more clearly described below with reference to preferred embodiments, and in conjunction with the accompanying drawings < for detailed implementation. 4 Reference will be made to the preferred embodiments of the present invention detailed below, and In the attached drawings, anyway, as long as it is a number in the diagram, it represents the same component. Method t invention proposes a method for removing the polymer formed on the gate surface. Figures 1-3 are according to one of the present invention. Manufacturing steps of the preferred embodiment Sectional view. Please refer to FIG. 1. The preferred embodiment of the present invention first defines a 200419671. V. Description of the Invention (4) Insulating wafer substrate 10. Then an insulator 2 is formed on the wafer substrate 10. 20 may be composed of an oxide or a tunneling oxide. Subsequently, a step of cleaning the surface of the insulating layer 20 is performed to remove unwanted contaminants. Then, the insulator is applied to the insulator. A first gate layer 30 is provided on 20, such as polycrystalline silicon. The first gate layer 30 may be deposited on the insulator using a conventional process such as a chemical vapor deposition process (chemica vapor deposition, abbreviated as CVD). Thereafter, a dielectric material layer 40 is provided on the first gate layer 30. In one embodiment, a photoresistive sound layer is not deposited on the dielectric material layer 40): then • 'Using a After the traditional lithography process is patterned and determined, the patterned and defined photoresist layer is used as a military curtain, and a dry etching is performed to form a semiconductor structure including an insulator 20 and a first semiconductor. However, the presence of several organic compounds in the dry button layer 30 can be due to by-products (b " roduct) in the gas. Next,:; 3 :: wall :: expected a cleaning step 1 to remove unexpected and unwanted production: specifically performed These by-products can be processed through the following oxidation process. Moreover, 〇3 + CxHy—〇2 + CzHa (〇H) b or the present invention makes m: c "2〇 + cA〇 ⑷xtrue) Λ except two substances and ozone (DI, ^ Fang Wei Tian 丨" house, the spleen
構浸入蘊藏有臭氧氣體的去離土底1〇與形成於其上之結 法可去除副產物, 水中。因此,本發明 此外,請m良的清潔製程。 弟2圖’可在介電材質層40上提供_The structure is immersed in the ozone-removing soil bottom 10 and the structure formed thereon to remove by-products and water. Therefore, the present invention also requires a good cleaning process. Brother 2 'can be provided on the dielectric material layer 40_
200419671 五、發明說明(5) 一閘50二:後,在第二閘極層5〇上提供一光阻層6〇。 ^ ^ μ T,Ζ照第3圖’利用—傳統的微影製程圖案化 二ΐ I,且二60。之後,以圖案化並定義過的光阻層60作 …、,進仃一乾式蝕刻,以形成包括絕緣體2 0、第一閘 極層30、介電材質層40與第二閘極層5〇的數個半導體結 構。每一半導體結構代表一個記憶胞(memory cell)。在 本實施例中,第一閘極層30是一浮置閘極(fioating gate)、第二閘極層50是一控制閘極(c〇ntr〇l gate)以及 絕緣體20是一隧穿氧化層(tunneHng 〇xide)。在蝕刻製 程中使用的各種氣體包括有氟化碳(carb〇n f lu〇ride)或 氯化碳(carbon chloride)有機化合物。所以,在乾式蝕 刻期間會在沿著浮置閘極30、控制閘極5〇或兩者側壁形成 不想要的副產物70 ’如高分子(p〇iymer)。接著,剝掉與 去除光阻層6 0。 隨後’特別進行一清潔步驟,用以去除不想要的副產 物7 0。而且,高分子7 0可經由下列之氧化過程被去除: 03 + CxHy —02+CzHa(0H)b 或 03 + CxHy ->C02 + H20 + CaHb0 於一實施例,使用去離子水與臭氧(D I -03 )的混合物來去除 高分子7 0,且其係將基底1 0與形成於其上之結構浸入蘊藏 有臭氧氣體的去離子水中。因此,本發明之方法可去除高 分子70,以獲得較傳統清潔製程優良的清潔程序。 第4圖所示係使用一習知標準SC -2清潔處理和依照本 發明4較佳實施例的清潔方法之高分子去除能力(removal200419671 V. Description of the invention (5) A gate 50: After that, a photoresist layer 60 is provided on the second gate layer 50. ^ ^ μ, Z, according to Fig. 3, ‘Utilization—Traditional lithography process patterning ΐI, and 且 60. After that, the patterned and defined photoresist layer 60 is used as a dry etching to form an insulator 20, a first gate layer 30, a dielectric material layer 40, and a second gate layer 50. Of several semiconductor structures. Each semiconductor structure represents a memory cell. In this embodiment, the first gate layer 30 is a floating gate, the second gate layer 50 is a control gate, and the insulator 20 is a tunnel oxidation. Layer (tunneHng oxide). Various gases used in the etching process include carbofluoride or carbon chloride organic compounds. Therefore, during the dry etching, an unwanted by-product 70 'such as a polymer (poiymer) is formed along the side wall of the floating gate 30, the control gate 50, or both. Then, the photoresist layer 60 is peeled and removed. This is followed by a special cleaning step to remove unwanted by-products 70. Moreover, the polymer 70 can be removed through the following oxidation process: 03 + CxHy —02 + CzHa (0H) b or 03 + CxHy-> C02 + H20 + CaHb0 In one embodiment, deionized water and ozone ( DI -03) to remove polymer 70, and it immerses substrate 10 and the structure formed on it into deionized water containing ozone gas. Therefore, the method of the present invention can remove the macromolecules 70 to obtain a cleaning procedure superior to the conventional cleaning process. Figure 4 shows the removal of the polymer using a conventional standard SC-2 cleaning process and a cleaning method according to the preferred embodiment 4 of the present invention.
10312twf.ptd 第10頁 200419671 五、發明說明(6) capabi 1 ity)的比較曲線圖。高分子去除能力是以三種參 數(parameter)之數值作為估計值:缺陷數(defec1: count)、缺陷密度(defec1: density)與總凹陷數(am〇⑽七 of total pi ts)。這三個參數數值較高者代表其具有較言 的缺陷度(level )。請參照第4圖,本發明的DI —〇3處理Π 不同溫度下比使用習知Sc-2溶液之清潔處理顯示較優良10312twf.ptd Page 10 200419671 V. Description of the invention (6) Comparison chart of capabi 1 ity). The polymer removal capability is based on the values of three parameters: the number of defects (defec1: count), the density of defects (defec1: density), and the total number of depressions (am0⑽ of total pi ts). The higher of these three parameters indicates that it has a higher level of defect. Please refer to FIG. 4. The DI-〇3 treatment of the present invention shows better performance at different temperatures than the cleaning treatment using the conventional Sc-2 solution.
高分子去除能力。此外,如選擇性地將本發明與傳 H 製程如SC-1與SC-2處理相結合也應可增進清潔的有效=’糸 (effectiveness)。 旺 之後,可接續進行傳統的半導體製 元件及其他半導體結構。 Λ疋成—把相 雖然本發明已以較佳實施例揭露如上,块立 限定本發明,任何熟習此技藝者, :發明 和範圍内,當可作各種之更動與濁飾 2 ;之精和 範圍當視後附之申請專利範圍所界 本^月之保言衰Polymer removal capability. In addition, if the present invention is selectively combined with a H-transmission process such as SC-1 and SC-2 treatment, the cleaning effectiveness should also be improved. After that, conventional semiconductor components and other semiconductor structures can be continued. Λ 疋 成 —Although the present invention has been disclosed in the preferred embodiment as described above, the present invention is limited in its own right. Anyone skilled in this art can: within the scope of the invention and various modifications and turbid decorations 2; The scope of this patent is limited by the scope of the attached patent application.
200419671 圖式簡單說明 第1圖至第3圖係依照本發明之一較佳實施例之製造步 驟剖面圖;以及 第4圖係使用標準SC-2清潔處理和依照本發明之較佳 實施例的清潔方法之高分子去除能力的比較曲線圖。 圖式標示說明 10 ·晶圓基底 20 :絕 緣 體 30 ^ 50 : 閘 極 層 40 :介 電 材 質 層 60 :光 阻 層 70 ••副 產 物200419671 Schematic illustrations Figures 1 to 3 are cross-sectional views of manufacturing steps according to a preferred embodiment of the present invention; and Figure 4 is a standard SC-2 cleaning process and according to the preferred embodiment of the present invention Comparison curve of polymer removal ability of cleaning methods. Graphical description 10 · Wafer substrate 20: Insulator 30 ^ 50: Gate layer 40: Dielectric material layer 60: Photoresist layer 70 •• By-products
10312twf.ptd 第12頁10312twf.ptd Page 12
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