TW200411961A - The integrating technique of baw resonator and IC - Google Patents

Abstract

The rapid growth of wireless products has led to an explosion in innovative design and device approaches in the radio frequency (RF) and microwave fields. The upcoming needs for exploring microwave components include, miniaturization, possibility of chip integration, and possibility of operating at high frequencies, low insertion loss than traditional solid state, semiconductor or mechanical device opens the opportunities for bulk acoustic wave resonators based on piezoelectric thin film. Methods for integrating film bulk acoustic wave resonator (FBAR) structure with standard CMOS process by post fabrication are brought up in this patent. The resonator has a piezoelectric thin film of ZnO, AlN, or other material sandwiched a pair of electrode films and supported by an insulative or a semiconductive film. By taking the SiO2 layer or passivation layer as supporting layer of FBAR and there are three new methods for integrating the FBAR on CMOS chip explored in this patent.

Description

200411961

The present invention relates to the technology of thin film bulk acoustic integration into a single chip. Wave resonance system and CMOS standard integrated circuit manufacturing process. Thin film bulk acoustic wave it is crying # ^ Mechanical-electrical energy conversion: The working principle is to use the resonance of piezoelectric materials (usually 2 P white dagger, 3rd order to the single station in the original formation of a single frequency of mechanical use), piezoelectricity every 14th, vibration frequency due to weak signal characteristics, less voltage signals at both ends to move: Its piezoelectric effect characteristic, = thin film bulk acoustic wave filter, will have a function that can make a specific special 6 2 ΐ meter type assembled, so that it has the function of measuring function = function = or cut off the energy efficiency in other frequency regions. It has a strong development of controlling the receiving frequency and transmitting frequency = Μ ^^ σ. The high-frequency microwave components are currently under development. The chip design of the RF Front End part is developed at the current stage of communication technology. Focus. Among the passive components of communication, the duplexer occupies a large area and needs to be implemented by off chip. Currently, the duplexer

Band Pass Filter is a surface acoustic wave filter (SAW FUter). However, as the communication frequency increases, the distance between the finger electrodes is limited by the line width. At high frequencies, it will encounter a bottleneck. If the I ^ ayer SAW method is used to increase the wave speed of the diamond film to solve this problem, it will increase the cost and still have a large area. The thin-film bulk acoustic wave filter has the advantages of an acoustic wave filter, and its filtering principle is determined by the film.

Page 7 200411961 V. Description of the invention (2) Thick, non-line width, so it is easier to reach high-frequency applications, and because of the principle of vertical resonance of bulk acoustic waves, the design area of the component can be reduced. In addition, thin-film bulk acoustic wave components have the following Advantages: Low insertion loss, small size, high withstand power, high frequency, integration compatibility and other "high-performance, low-power" functions are bound to replace surface acoustic wave components and microwave dielectric ceramic components. At present, the film bulk acoustic wave duplexer products of Agi lent Company have been mass-produced in the market, but no related technology patent integrated in the integrated circuit manufacturing process has been seen. The present invention proposes to integrate the thin film bulk acoustic wave resonator and the CMOS standard manufacturing process into a single This invention enables passive components such as resonators and filters to complete the system's analog design at the beginning of IC design, reducing the complexity of system integration, and being integrated on the chip for high-frequency applications in communication systems. At this time, the overall characteristics will not be affected by parasitic effects caused by wire bonding or bonding. It has an important impact on the integration of active and passive components and the single chip of the system. An object of the present invention is to provide a technology for integrating a thin-film bulk acoustic wave resonator and an integrated circuit into a single chip. The present invention has three different integration techniques. The preferred embodiments of the present invention are described in detail below with reference to the drawings. Refer to the first figure, which is a cross-sectional structure of a integrated circuit wafer with a CMOS standard process. Refer to the second figure, which is a cross-sectional structure diagram of a integrated circuit wafer that is completed with a CMOS standard process in the first integration method of the present invention.

Page 8 200411961 V. Description of the invention (3) Refer to the third figure according to the CMOS standard, which is the three-dimensional junction of the integrated circuit chip completed in the first process of the present invention; refer to the fourth figure in the second method. Integration into a single product: κ Xi knot, vibrator, and CMOS standard process: The younger brother-a kind of process embodiment diagram. Among them, a first layer of metal n-from the opening above the road completed by the CMOS standard process, and the chip 1, the gold used in the etching of the integrated CMOS standard process, and this metal layer can be a variety of fossils The layer 12 is used as a support for the junction. ^ This metal I is the second electrode of the oxygen resonator. The lower electrode + the upper electrode / the sequential growth of the thin film bulk acoustic wave / the lower electrode required for the m-r electrode. The genus sieve is a thunder ray is 4 4 and the genus genus 23 ′ is a piezoelectric thin film layer 22. * The material of the medium-voltage thin-film layer is second-class rhenium material, and more suitable materials such as ρζτ, Zη0,. Among them, A1N and ⑽S processes have the highest compatibility, followed by nO. In terms of material selection of the electrode layer, it is necessary to have good etching selectivity with the material of the sacrificial layer, and the choice of the material of the lower electrode metal layer is also good or bad. The growth characteristics of the piezoelectric thin film layer above it. Through the dry etching method, the etching window hole 31 reserved in the CMOS standard process is etched to the second layer of metal 13 counted from above, and then the metal layer is etched by wet etching through the etching hole 31 丨 3 This metal layer serves as a structure layer. The structure is suspended by the suspended cavity structure 32, which serves as an acoustic wave barrier layer, and completes the first thin-film bulk acoustic resonator integrated with a standard process.

200411961 V. Description of the invention (4) Refer to the fifth figure, which is a cross-sectional structure diagram of the integrated circuit wafer completed by the CMOS standard process in the second integration method of the present invention. Refer to the sixth figure, which is a diagram illustrating a second process embodiment of integrating a thin film bulk acoustic wave resonator and a CMOS standard process integrated circuit into a single chip. It includes ... a integrated circuit wafer 1 completed in a CMOS standard process, a protective layer 14 in the KCM0s standard process, and a lower electrode metal layer 23 for the lower electrode of the thin-film bulk acoustic wave resonator. The thin film layer 22, the upper electrode metal layer 21, and define a pattern thereof. The main materials of the protective layer 14 of the CMOS standard process are silica and silicon nitride. The materials of the electrode layer and the piezoelectric layer are the same as those in the first process embodiment, and the considerations of material selection are the same. " Through the dry etching, the etching window hole 31 reserved in the CM0S standard process is etched to the first layer of metal counting from the upper side 丨 丨 through the etching hole 3 丨, the metal layer is etched in a wet ^ etching method 丨丨 The structure is suspended due to the suspended cavity structure 32 > The thin-film bulk acoustic wave resonator integrated with the second CMOS standard process is used as the acoustic cavity blocking layer for the suspended cavity structure.

The first "process implementation method and the second process implementation method are on the process steps: ^ 'Only the first process implementation method uses a CMOS standard process in which a silicon dioxide layer between metal layers is used as a structure of a thin-film bulk acoustic wave resonator. The second implementation method uses the uppermost circuit in the CMOS standard process ^ repeated 1 as the support structure layer. The difference between the two is that the support structure characteristics are not different from each other and the electrode pattern and pressure are defined during growth. The electrical pattern is also different, and the process steps of the latter are one step more than the latter. They can be applied to different

Page 10 200411961 V. Description of the invention (5) The design of the same process integration. Refer to the seventh figure 'for the integration of the film bulk sound and the ancient j-body circuit into a military-chip; = the product of the standard process. Including package-integrated circuit completed with CMOS standard process, the metal layer is partially defined as an etching mask, apricot, v # ^ The topmost siliconized layer is 12 to the required thickness, and is etched in a dioxygen etch method. The lower electrode of the oxygen 3-wave resonator requires the lower electrode gold layer Π Ϊ′ίΓ 22, the upper electrode metal layer 21, and defines its pattern. The τ 4 m layer will be processed by CMOS standard through dry etching; the remaining ... engraved window hole 31 'the second over-etched hole counted from the top to the top 31' etched metal layer by wet etching] Liyang cavity structure 32 Suspended, this 殓 empties ... The first process implementation method and the third process implementation method are similar to each other. The difference is that the top person is used = near the mask, through the dry name column. Di w: " The meaning of the metal layer is needed for the design of the integrated filter. Degree to match = As mentioned above, when it is known that the thin-film body integration technology invented in this case has originality, novelty, and industrial benefits. II. Page 11 200411961 V. Description of the invention (6) The invention application that conforms to the specific embodiment of the invention The scope of the patent covers the protection of the CMOS system by the need for a lower electrode and defining its pattern of oxidation time and nitrogen privacy, which is etched and floated by dry etching to the top of the upper etching method. This is a standard manufacturing requirement for suspended CMOS. However, what is described above and described by Gan Feida Card is only one of the better aspects of the present invention. Second, the scope of implementation of the present invention is determined. That is to say, the equal brutality made by Ben Liganwei. Contains: 7 yttrium yttrium and modification, all of which are the main materials of the protective layer 14 of the standard process completed by the professionals who have completed the approved process of the present invention. The consideration for the selection of the two materials; the material of the same electrical layer is the second layer of metal 13 that is reserved in the CMOS standard process and the engraved window hole 31, and the layer of metal 13 are etched through etching The hole 31 uses the metal layer 13 'to make the structure be a sound wave blocking layer due to the suspended cavity structure, and completes the second type of integrated thin film bulk acoustic resonator. ^ 目 mesh: ϊ ΐ implementation method and the second process implementation method and metal 上 in the process steps. CM0S standard manufacturing process, the metal layer selection layer "lithium oxide layer as the thin film bulk acoustic resonance 11 The structural support of the protection room is based on the same circuit in the CM0S standard process as the supporting structure layer. The difference between the two is that the supporting structure characteristics are different, and the electrode pattern and the piezoelectric pattern that define the growth are different There are more steps in the process than those of the latter. They can be applied to the integrated design of clothing and clothing. Page 12

I 200411961

After reading the seventh figure, it is a third embodiment of the process for integrating the thin-film bulk acoustic wave resonator and the CMOS standard circuit into a single-chip. The local definition of the product that is completed by the standard process of CMOS body is the etching mask siliconized layer 12 to the required thickness. Below the required two electrodes of the two acoustic resonators 22 'the upper electrode metal layer 21, and is determined to pass through the dry type The etching will leave the etching window hole 31 left in the CMOS standard, and etch to the silver engraved hole 31, and the wet etching of the floating cavity structure 32 will generate a suspension. In this way, the third integrated circuit with the CMOS standard is completed. On the wafer 1, a thin film body electrode metal layer 23 is sequentially grown on the dioxide oxide layer 12 by a dry etching method, and the pattern of the thin film layer is defined. '' The second layer of metal 13 from the top of the integrated circuit wafer completed by the manufacturing process, and the penetrating metal layer 13 are used to make the structure due to the suspended cavity structure as the acoustic barrier layer. The only difference between the implementation of a process is that Li Jun's need to carve out the filter design through the dry name. To sum up, when we know that this integration technology already has the original method of complying with the invention patent element method and the third process implementation, Locally defined control of the film bulk acoustic creation, novelty, and industry created by the silicon dioxide support case. Only the above-mentioned method is similar in structure, and the metal layer is the thickness of the masking layer to match the availability and advancement of the wave component and integrated circuit, which is one of the best for this creation.

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Page 14 200411961 Brief description of the diagram 1 Cross-section structure of integrated circuit wafer completed by CMOS standard process 11 First layer of metal counting from above the integrated circuit 12 Silicon dioxide layer from the first layer counting from above the integrated circuit 13 Second layer of metal counting from above the body circuit 14 Circuit protection layer above the integrated circuit 1 5 Active circuit area above the integrated circuit 16 Base material of the integrated circuit 2 Cross-section structure of the thin film bulk acoustic resonator completed by the manufacturing process 2 1 Electrode metal layer on thin film bulk acoustic resonator 22 Piezoelectric material layer of thin film bulk acoustic resonator 2 3 Electrode metal layer under thin film bulk acoustic resonator 3 Etching process of thin film bulk acoustic resonator 31 Etching of thin film bulk acoustic resonator Window hole 32 Structure for suspending thin-film bulk acoustic wave resonator. Schematic illustration of suspended cavity structure. Figure 1 is a cross-sectional structure diagram of a integrated circuit chip with CMOS standard manufacturing process. Figure 2. Integrated structure with CMOS standard manufacturing process in the first integration method. Cross-section structure diagram of circuit chip Figure 3 Three-dimensional structure diagram of integrated circuit wafer completed by CMOS standard process in the first integration method The integrated circuit of the integrated circuit of the sonic resonator and the CMOS standard process is shown in the first process embodiment of a single chip. Figure 5 Cross-sectional structure of the integrated circuit chip completed by the CMOS standard process in the second integration method

Page 15 200411961 Schematic illustration Figure 6 Integrated circuit of thin film bulk acoustic wave resonator and CMOS standard manufacturing process Second embodiment of a single chip Figure 7 Integrated circuit of thin film bulk acoustic wave resonator and CMOS standard manufacturing process Illustration of a third process embodiment integrated into a single chip

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Claims (1)

200411961 VI. Scope of patent application1. A novel invention that incorporates CMOS, GaAs, and B ^ CM〇 ^ '= & a novel invention that incorporates thin-film bulk acoustic wave elements and s-wafer manufacturing processes. This-## ^ ^? BlCM〇S # Similar standard processes. The method of making a thin-film bulk acoustic wave resonator with a surnamed person- ^ quasi-coating process includes the following steps: The circuit is related to the early-wafer technology. A. Provide a semiconductor substrate; B .; C: 0j = A standard process is formed on the substrate-a thin film bulk acoustic resonator section II 1 ',, ° structure, which includes a lower electrode region, a support layer structure region and a structure suspension cavity region. C · Use the mask to define the resonance area; and • Spear] I sacrifice the sacrifice layer so that the resonance part is suspended on the substrate by the support of the body; E • Grow the lower electrode layer and pressure on the support layer Electrical layer and upper electrode layer. The method for manufacturing a thin-film bulk acoustic wave resonator using a CMOS standard manufacturing process as described in the second item of the scope of the patent application, wherein the structure suspension cavity region is to use a metal layer to define a region to be suspended, and to levitate the structure by touching. 4. The method for manufacturing a thin-film bulk acoustic wave resonator using a CMOS standard process as described in item 3 of the scope of patent application, wherein the metal layer covers the metal layers used in various CMOS standard processes. 5. The method of manufacturing a thin film bulk acoustic wave resonator using a CMOS standard process as described in item 2 of the scope of the patent application, wherein the upper and lower electrode layers of the thin film bulk acoustic wave resonator cover various metal materials and must be used for the sacrificial layer structure There is a good choice of etching between metal materials. 200411961 Sixth, the scope of patent application--" 1--6 · The method of manufacturing a bulk acoustic wave resonator using a CMOS standard process as described in item 2 of the scope of patent application, in which the piezoelectric acoustic of a thin film bulk acoustic resonator, It covers a variety of piezoelectric materials, but it must have good etching selectivity with the metal layer material used for the sacrificial layer structure. 7 · —A thin-film bulk acoustic wave resonator manufactured using a CMOS standard process σ A potential method, which includes a lower electrode layer region and a structural suspension cavity region definition method, and a post-process growth piezoelectric layer and electrode layer region and an aftercut method. 8. According to the method described in item 7 of the scope of the patent application, the method for growing the lower electrode is to use the uppermost metal in the CMOS standard process as a thin film bulk acoustic wave. "The lower electrode metal layer defines the area and is etched by wet etching. The metal layer is the adhesion layer between the x-state electrode layer and the silicon dioxide layer. The metal is on top of it: the electrode layer. "乂 抆 Power down 9 · As described in the method of patent application No. 8 after coating, after the etching The lower electrode region grows a thin-film bulk acoustic resonator under which electricity is applied to the electrode metal layer. τ and below I 0 · As in the method described in item 7 of the scope of the patent application, the piezoelectric layer material is grown chemically by sputtering, and the piezoelectric layer region of the bulk acoustic wave resonator is etched. I produced the thin film II. As the method described in the scope of the patent application, the material of the piezoelectric layer contains all materials with piezoelectric characteristics, and the growth method is because this piezoelectric material does not have different manufacturing methods. Coverage. The method described in claim 7 of the patent scope, grows by coating. The defined area of the electrode metal layer on the thin-film bulk acoustic resonator. 13. The method described in item 7 of the scope of patent application, in the CMOS standard process 200411961 6. Scope of patent application ~ · The uppermost metal and thin film bulk acoustic wave oscillator ^ The upper electrode electrode layer is an etch mask to cover the meaning area. Through the silver engraved hole, the second layer from the top of the oxide layer is engraved. Metal is the metal layer in the area defined by the structural suspension cavity. The silicon dioxide layer between the structural suspension cavity and the thin bulk acoustic wave resonator and the lower electrode is the supporting layer structure of the thin film bulk acoustic wave resonator. 1 4 · According to the method described in item 7 of the scope of patent application, the metal of the structure suspension cavity defined area is etched by wet etching to form the structure into a suspension structure, and the thin film bulk acoustic resonator of the first process method is completed. 15 · A second manufacturing method for manufacturing a thin-film bulk acoustic wave resonator using a CMOS standard manufacturing process, including a method for defining a structural suspension cavity region and post-process growth, a piezoelectric layer and an electrode region, and a engraving method. 16. The method according to item 15 of the scope of patent application, which uses the topmost protective layer in the CMOS standard process as the supporting layer structure of the thin-film bulk acoustic wave resonator. 17. The method described in item 15 of the scope of the patent application, growing a thin film bulk acoustic wave resonator electrode layer, a piezoelectric layer, and an upper electrode electrode layer on the topmost protective layer in the CMOS standard process. 1 8. According to the method described in item 15 of the scope of patent application, the uppermost metal in the CMOS standard process is used as the metal layer in the area defined by the structural suspension cavity, and the metal in the area defined by the structural suspension cavity is etched in a wet manner. The structure is formed into a suspension structure, and the thin film bulk acoustic resonator of the second manufacturing method is completed. ^ 9. / A third method for making thin-film bulk acoustic wave resonators using a CMOS standard process, including the method of defining the uppermost metal layer as a mask and the structure of the suspended air, moon, and space area and the post-process growth of the piezoelectric layer And electrode area and etching methodZero 200411961 6. Apply for a patent scope of 20, as described in item 19 of the scope of patent application, use the uppermost metal in the CMOS standard process as the etching mask to define the area, perform dry etching, and etch the silicon dioxide layer in the CMOS standard process to The required thickness is used as the supporting layer structure of the thin-film bulk acoustic resonator. 21. According to the method described in item 19 of the scope of patent application, the electrode layer, piezoelectric layer and upper electrode layer of the thin film bulk acoustic wave resonator are grown on the supporting layer structure of the thin film bulk acoustic wave resonator after etching. 22. According to the method described in item 19 of the scope of patent application, the uppermost layer of metal and thin film bulk acoustic resonator in the CMOS standard process is used as the etching mask to define the area of the electrode electrode layer, and the silicon dioxide layer is etched by dry etching. The second layer of metal counting from above is the metal layer of the area defined by the structural suspension cavity. 23. According to the method described in item 9 of the scope of the patent application, the metal in the defined area of the structure suspension cavity is etched by wet etching to form the structure into a suspension structure, and the thin film bulk acoustic resonator of the third process method is completed. M. As described in item 2 of the scope of the patent application, a filter composed of the thin-film bulk acoustic wave resonator proposed in this patent is also covered by this patent. 25 · As described in item 2 of the scope of patent application, other processes similar to the standard process of ⑽⑽, such as BiCMOS, GaAs, etc., are all models covered by this patent.