TR23376A - PAYPLAYN MEMORY STRUEKTUERUE - Google Patents

PAYPLAYN MEMORY STRUEKTUERUE

Info

Publication number
TR23376A
TR23376A TR384/88A TR38488A TR23376A TR 23376 A TR23376 A TR 23376A TR 384/88 A TR384/88 A TR 384/88A TR 38488 A TR38488 A TR 38488A TR 23376 A TR23376 A TR 23376A
Authority
TR
Turkey
Prior art keywords
struektuerue
payplayn
memory
payplayn memory
memory struektuerue
Prior art date
Application number
TR384/88A
Other languages
Turkish (tr)
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of TR23376A publication Critical patent/TR23376A/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1039Read-write modes for single port memories, i.e. having either a random port or a serial port using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/12Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Advance Control (AREA)
  • Image Processing (AREA)
TR384/88A 1987-06-02 1988-06-01 PAYPLAYN MEMORY STRUEKTUERUE TR23376A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US5694087A 1987-06-02 1987-06-02

Publications (1)

Publication Number Publication Date
TR23376A true TR23376A (en) 1989-12-28

Family

ID=22007502

Family Applications (1)

Application Number Title Priority Date Filing Date
TR384/88A TR23376A (en) 1987-06-02 1988-06-01 PAYPLAYN MEMORY STRUEKTUERUE

Country Status (7)

Country Link
EP (1) EP0315671A1 (en)
JP (1) JPH02500697A (en)
KR (1) KR890702208A (en)
ES (1) ES2007233A6 (en)
IL (1) IL86196A0 (en)
TR (1) TR23376A (en)
WO (1) WO1988009995A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5093809A (en) * 1989-04-21 1992-03-03 Siemens Aktiengesellschaft Static memory having pipeline registers
WO1990013090A1 (en) * 1989-04-21 1990-11-01 The Secretary Of State For Defence In Her Britannic Majesty's Government Of The United Kingdom Of Great Britain And Northern Ireland Apparatus for pipelining a storage system
US5410670A (en) * 1993-06-02 1995-04-25 Microunity Systems Engineering, Inc. Accessing system that reduces access times due to transmission delays and I/O access circuitry in a burst mode random access memory
JP4084428B2 (en) * 1996-02-02 2008-04-30 富士通株式会社 Semiconductor memory device
DE60035630T2 (en) * 1999-02-11 2008-02-07 International Business Machines Corporation Hierarchical advance charge in semiconductor memory arrangements
US6799290B1 (en) * 2000-02-25 2004-09-28 Infineon Technologies North America Corp Data path calibration and testing mode using a data bus for semiconductor memories

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1461245A (en) * 1973-01-28 1977-01-13 Hawker Siddeley Dynamics Ltd Reliability of random access memory systems
US4296469A (en) * 1978-11-17 1981-10-20 Motorola, Inc. Execution unit for data processor using segmented bus structure
US4334309A (en) * 1980-06-30 1982-06-08 International Business Machines Corporation Error correcting code system
US4823324A (en) * 1985-09-23 1989-04-18 Ncr Corporation Page mode operation of main system memory in a medium scale computer

Also Published As

Publication number Publication date
IL86196A0 (en) 1988-11-15
KR890702208A (en) 1989-12-23
EP0315671A1 (en) 1989-05-17
ES2007233A6 (en) 1989-06-01
WO1988009995A1 (en) 1988-12-15
JPH02500697A (en) 1990-03-08

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