IL86196A0 - Pipeline memory structure - Google Patents

Pipeline memory structure

Info

Publication number
IL86196A0
IL86196A0 IL86196A IL8619688A IL86196A0 IL 86196 A0 IL86196 A0 IL 86196A0 IL 86196 A IL86196 A IL 86196A IL 8619688 A IL8619688 A IL 8619688A IL 86196 A0 IL86196 A0 IL 86196A0
Authority
IL
Israel
Prior art keywords
memory structure
pipeline memory
pipeline
memory
Prior art date
Application number
IL86196A
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of IL86196A0 publication Critical patent/IL86196A0/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1039—Read-write modes for single port memories, i.e. having either a random port or a serial port using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Image Processing (AREA)
  • Advance Control (AREA)
IL86196A 1987-06-02 1988-04-27 Pipeline memory structure IL86196A0 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US5694087A 1987-06-02 1987-06-02

Publications (1)

Publication Number Publication Date
IL86196A0 true IL86196A0 (en) 1988-11-15

Family

ID=22007502

Family Applications (1)

Application Number Title Priority Date Filing Date
IL86196A IL86196A0 (en) 1987-06-02 1988-04-27 Pipeline memory structure

Country Status (7)

Country Link
EP (1) EP0315671A1 (en)
JP (1) JPH02500697A (en)
KR (1) KR890702208A (en)
ES (1) ES2007233A6 (en)
IL (1) IL86196A0 (en)
TR (1) TR23376A (en)
WO (1) WO1988009995A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04504772A (en) * 1989-04-21 1992-08-20 イギリス国 Device for pipeline transmission of storage systems
US5093809A (en) * 1989-04-21 1992-03-03 Siemens Aktiengesellschaft Static memory having pipeline registers
US5410670A (en) * 1993-06-02 1995-04-25 Microunity Systems Engineering, Inc. Accessing system that reduces access times due to transmission delays and I/O access circuitry in a burst mode random access memory
JP4084428B2 (en) 1996-02-02 2008-04-30 富士通株式会社 Semiconductor memory device
EP1028427B1 (en) * 1999-02-11 2007-07-25 Infineon Technologies North America Corp. Hierarchical prefetch for semiconductor memories
US6799290B1 (en) * 2000-02-25 2004-09-28 Infineon Technologies North America Corp Data path calibration and testing mode using a data bus for semiconductor memories

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1461245A (en) * 1973-01-28 1977-01-13 Hawker Siddeley Dynamics Ltd Reliability of random access memory systems
US4296469A (en) * 1978-11-17 1981-10-20 Motorola, Inc. Execution unit for data processor using segmented bus structure
US4334309A (en) * 1980-06-30 1982-06-08 International Business Machines Corporation Error correcting code system
US4823324A (en) * 1985-09-23 1989-04-18 Ncr Corporation Page mode operation of main system memory in a medium scale computer

Also Published As

Publication number Publication date
KR890702208A (en) 1989-12-23
ES2007233A6 (en) 1989-06-01
TR23376A (en) 1989-12-28
WO1988009995A1 (en) 1988-12-15
JPH02500697A (en) 1990-03-08
EP0315671A1 (en) 1989-05-17

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