TH79043A - Equalizer of the channel adjustment. - Google Patents

Abstract

The DC60 in a VSB modulated signal processing receiver that carries television news. High definition broadcasting terrestrial bundled together with various packets Of that data, the incoming signal is converted to digital signal (19), demodulated (22) and equalized by equalization. Tuning channel receiver (34). The equalized signal is processed by the network in the The decoder is incorporated into the Reed-Solomon FEC fault detection and correction network (44). The step size of the equalizer filter coefficient is adjusted in such a way that During the adaptation process as a function of the packet error rate, the local microcontroller (60) monitors the packet error rate at the machine. Detects Reed-Solomon errors and will instruct the equalizer to adjust the size of the coefficients step. Stay in the way of reducing packet error rates. In a VSB modulated signal processing receiver that contains television news. With high definition terrestrial broadcasts incorporated by various packets of data, the incoming signals are converted to digital signals (19), demoded (22) and Equalize by equalizer Tuning channel receiver (34). The equalized signal is processed by the network in the The decoder is incorporated into the Reed-Solomon FEC fault detection and correction network (44). The step size of the equalizer filter coefficient is adjusted in such a way that During the adaptation process as a function of the packet error rate, the local microcontroller (60) monitors the packet error rate at the machine. Detects Reed-Solomon errors and will instruct the equalizer to adjust the size of the coefficients step. Stay in the way of reducing packet error rates.

Claims (9)

Disclaimers (all) that will not appear on the advertisement page: 1. In a system intended for processing an incoming signal that has a stream that displays an image that It consists of a modulated signal containing various packets. Of the information contained therein Processing method The signal consists of the following steps: - Demodulation of the incoming signal to produce a modulated signal - an equalization in a way that adapts to the well being. Such modulation by using the value of The step of the coefficient of the initial filter circuit to produce an equalized signal - an error detection to such an equalized signal to detect. Package error surfaces in the said equalized signal - Adjustment of the step coefficient of the aforementioned filter circuit during the process. This equalizes in a way that is a function of the detected packet errors, and - if the volume of packet errors is increased after such manipulations are performed properly. At least one (1) of the step value of the filter circuit coefficient is modified to match the Of the step coefficient of the initial filter, or (2) the modification of the step coefficient of the filter adjusted in a straight direction. Skip with the direction of such refinement 2. A method consistent with claim 1, where the incoming signal is a Vestigial Sideband (VSB) modulated signal containing high-definition video signal information. Presented by a group of mutant symbols where It has a data frame format that is made up of sequential data frames. 3. Methods consistent with claim 1, the aforementioned error detection procedure consists of detecting Reed-Solomon errors and correcting the equalized signal. . 4.In a system intended for processing the incoming signal that has a stream of information displayed, which It consists of a modulated signal containing various packets. Of the information contained therein Equalization method The signal consists of the following steps: (a) Initializing the equalizer to the default coefficient step size (b) Packet error quantification (c). Maintaining the original step size if the amount of packet errors obtained. Is not greater than the predetermined level (d) reduction of the step size of the coefficient If the packet error load that is retrieved exceeds the predetermined level (e), check whether the package error load has been increased. After reducing the size Of the step of the coefficient into steps (d) and (f). Returning to the step size of the coefficient that is the default if the margin of error Of the packet was added after reducing the step size of the coefficient in step (d). 5. Methods consistent with claim 4, where the aforementioned validation procedure consists of quantifying packet errors with Performance of the Reed-Solomon FEC detector. 6. Methods consistent with claim 1, characterized by the process of assembly, including The following steps: (a) quantifying the packet error (b) modifying the step size of the equalizer coefficient in one direction if the quantity of The errors of the retrieved packets. Predefined level exceeded (c) To check whether the packet's error load has been increased. After modification The magnitude of the step coefficients in the steps (b) and (d) modifies the step size of the coefficient in the second direction. As opposed to the first direction, if the packet error quantity was increased after the step size modification of the coefficients in step (b). 7. Methods consistent with claim 4, which are supplemented by the introduction of predetermined rules. It is used for the larger or smaller of the step size of the coefficient if the amount of error. Of the package has not changed The predefined rules are designed according to the system requirements. 8. An additional feature compliant with claim 1 is surface flaw detection. Contains the detection of data errors from various packets of data using the network. Detect and correct errors 9. The method is consistent with claim 1, whereby such adjustment of the value of the step of The coefficient of the initial filter circuit in such a way that it is a function of the packet error that was Such detection will occur if the number of detected packet errors is greater than the achieved level. Predetermined