JP2000023055A - Digital television receiver having adaptive filter circuit for suppression of same ntsc channel interference - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a coding method for a flow including a symbol of the fixed length in a fixed time by securing coincidence between the selected symbol coding result value and the synchronous data with no error and generating the symbol coding result that is selected to be coincident with the 2nd linear combination result at least in a selected time. SOLUTION: If a symbol synchronizer/equalizer 16 suppresses the DC bias component included in its input signal, the DC bias component has a normal level and a pilot carrier appears at the real part of a base band signal which is transmitted from a complex demodulator 14 via detection. The ideal symbol decoding result value that is transmitted from a memory of a controller 28 is fed back while a data synchronous detection circuit 18 restores the data area synchronous information F and the data segment synchronous information S. As a result, the execution errors caused from the symbol decoding results which are post-coded from a post-coding comb filter.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital television apparatus such as a high definition television (HDTV) used for terrestrial broadcasting in the United States according to the Television Development Subcommittee (ATSC) standard. The present invention relates to a digital television receiver device having a filter circuit suitable for preventing co-channel interference generated from an analog television signal according to the standards of the National Television System Committee (NTSC).

[0002]

2. Description of the Related Art Television Development Subcommittee (ATSC)
Is a 6-MHz bandwidth television channel used in the United States National Television Subcommittee (NTSC) primarily for analog television aerial signals in the digital television standard released on September 16, 1995. In FIG. 1, a vestigial sideband (VSB) signal for digital television (DTV) signal transmission is specified. The spectrum of the vestigial sideband (VSB) DTV signal is designed such that the spectrum of the same channel interferes with the NTSC analog TV signal. This is an even multiple where the luminance and chrominance component energies of the NTSC co-channel interference analog TV signal are mostly low.
The pilot carrier and the DTV are at an odd multiple of a 1/4 horizontal scan line ratio of the NTSC analog TV signal, which falls between even multiples of a 1/4 horizontal scan line ratio of the V signal.
It is determined that the main amplitude modulation sideband frequency of the signal is located. The video carrier of the NTSC analog TV signal is TV
1.25M offset value from the lower frequency limit of the channel
Hz. The carrier of the DTV signal is a DTV of about 309,877.6 KHz obtained from the lower limit frequency of the TV channel.
This is an offset value obtained by multiplying the horizontal scanning line ratio of the NTSC analog TV signal by 59.78 times to arrange the carrier signal. Therefore, the carrier of the DTV signal is about 2,69012 obtained from the intermediate frequency of the TV channel.
2.4 Hz.

The exact code ratio that has appeared in the digital television standard is a value multiplied by (684/286) times, which results in a 4.5 MHz audio carrier offset value from the video carrier of the NTSC analog TV signal. Where NT
The number of horizontal scanning lines / codes of the SC analog TV signal is 684, and a 4.5 MHz audio carrier offset from the video carrier included in the NTSC analog TV signal by multiplying the horizontal scanning line ratio factor of 286 of the NTSC analog TV signal. Get the value. The code rate is 10.762238 Meg / s, which is 5.38 from the DTV carrier signal.
It can be included in the VSB signal extended by 1119 MHz. That is, the VSB signal can be limited from a lower limit frequency of the TV channel to a band extended by 5.690997 MHz.

Generally, digital HDT in the United States
The ATSC standard for V-signal terrestrial broadcasting is capable of transmitting all two high definition TV formats with a ratio of 16: 9. The first HDTV display format is 1920 samples /
It uses scan lines and 1080 activated horizontal scan lines / 30 Hz frame format with a 2: 1 jump area. Second
The HDTV display format uses 1280 luminance samples / scan lines and sequentially scanned TV video / 60 Hz frame format. The ATSC standard is NTSC analog T
Four Ts with normal resolution when compared to the V signal
The transmission method uses a DTV display format rather than an HDTV display format in which V signals are transmitted in parallel.

[0005] A DTV transmitted from a terrestrial broadcast in the United States by vestigial sideband amplitude modulation has a continuous data area including 313 continuous data segments. The data area is considered to be a module-2 in which an odd-numbered data area and an even-numbered data area constituting a data frame are continuously counted. The frame ratio is 20.6
6 frames / sec. Each data segment is activated during 77.3 microseconds. Therefore, if the code ratio is 10.78 MHz, it becomes 832 code / data segments. Each data segment has four sets of synchronous codes having + S, -S, -S, and + S continuously on one line. The value of + S is the level below the maximum positive data deviation, and the value of -S is the level above the maximum audio data deviation. The initial line of each data area includes a synchronous code set area for coding an experimental signal for channel equalization and multipath processing prevention. The experimental signal consists of 511 pseudo-noise sequential samples (PN sequential) followed by three 63-PN sequential samples. This experimental signal is transmitted according to the initial logic rule of the first line of the data area counted as an odd number and the first logic rule of the first line of the data area counted as an even number. It is the complement.

[0006] Data in a data line is trellised using twelve inserted trellis codes.
is) coded, each of which is a 2/3 ratio trellis code that does not encode one bit. The inserted trellis code is provided as part of an error correction measure for correcting a sudden situation caused by a noise source such as an exposed automobile ignition device, and is provided by a Reed-Solomon coating. is there. The Reed-Solomon coating result value is coded and transmitted with an 8-level (3 bits / code) one-dimensional alignment code for aerial transmission, and this transmission is identified as a trellis coating procedure. This is done without code precoding. The Reed-Solomon coding result value is coded into a 16-level (4 bits / code) one-dimensional alignment code for transmission of a cable TV broadcast, and is transmitted without precoding. Vestigial sideband (VSB) signals have these unique transmissions, but their amplitudes vary with the modulation ratio.

The specific carrier is replaced by a pilot carrier having a fixed amplitude according to the modulation ratio described above. This fixed-amplitude pilot carrier is generated by shifting the DC component when modulating the voltage applied to the balanced modulator, which supplies the VSB signal in response to the filter and produces a VSB signal in response. . If the eight levels of the 4-bit code coding are -7,-
If the pilot carrier has a normal value of 5, -3, -1, +1, +3, +5, +7, the pilot carrier has a normal value of 1.25. The normal value of + S is +5, and the normal value of -S is -5.

In the prior art field of DVT, it is required to determine whether or not to use a code precoder in a DTV broadcast at the time of transmission. This code precoder performs a code generation circuit and performs precode filtering on a code. Such a decision of the broadcaster depends on co-channel interference regardless of the requirements of the NTSC broadcaster. The code precoder is a code that was accidentally captured by a respective DTV receiver with a comb filter that was used prior to the use of a data slicer inside the code decoder circuit to prevent interference with co-channel interfering NTSC signals. Complements post-coding. Code precoding is not used on the data line where the code synchronization set of the data line or the synchronization data of the data area is transmitted.

Although co-channel interference is removed at a distance from the NTSC broadcasting station, it is most likely to occur when certain ionospheric conditions are formed or in a high temperature summer when there is a high possibility of co-channel interference. However, such interference does not occur without the same channel generated from the NTSC broadcasting station. If NTSC interference is localized only within its broadcast area, HDTV broadcasting can use a code precoder to manage HDV signals more easily than NTSC interference. Also in this case, the comb filter can be used as a code postcoder for performing perfectly matched filtering in the DTV receiver. If the elimination or possibility of NTSC signal interference is rare, trellis
s) Flat TV noise, which causes code value errors in the decoder, will be reduced and DTV broadcasting will stop using a code precoder, thereby eliminating the need for a code postcoder in each DTV receiver. Would. Unless the broadcasting station is aware of such a situation, the co-channel interference of the NTSC signal is a obstacle requirement for a part of the broadcasting reception area, causing a leakage of the cable broadcasting and causing an intermediate frequency image failure unsuitable for the NTSC receiver. Have to use magnetic tape for digital TV recordings with analog TV recording results,
Alternatively, there may be another essential problem of the abnormal state.

[0010] The current ATSC DTV standard does not allow transmission schemes using code precoding. It is determined that the blocking of the co-channel interference analog TV signal should be performed in a trellis decoding process after data slicing related to code decoding. This process omits whether or not precoding should be performed during transmission. Unfortunately, co-channel interference analog TV signals cause errors in the data slicing process, which places more burden on error correction decoding procedures, trellis decoding, and Reed-Solomon decoding. These errors limit the extent of the broadcast area and result in revenue savings for commercial DTV broadcasts. Therefore, although the ATSC DTV standard does not currently permit code precoding during DTV transmission, it is preferable to provide co-channel interference analog TV signal protection prior to data slicing.

In general, the meaning of a linear combination is adjusted depending on whether it can be applied by a classical mathematical expression or a modular mathematical expression. Modular combinations applied to linear combinations are processed in modular equations. This document describes the flow of digital codes through differential delay, the linear combination of differentially delayed sections, and the type of coding that records the post-coding illustrations of codes used in the prior art of HDTV receivers. In this document, it is defined as "first type code recording." The digital code flow through the modular combination itself with the delayed result value of the modular combination and the type of coding that records the precoding examples used in the prior art of HDTV transmitters are also described herein. It is defined as "second type code recording."

It can be seen that the problem of co-channel interference derived from the analog TV signal has been solved by installing an appropriate filter circuit inside the receiver from the problem of radio interference of the receiver in the past. If the signal does not exceed the active area of the system channel, it is possible to prevent co-channel interference by interrupting signal transmission during DTV modulation, and to consider the performance of the system as a signal superposition problem. A filter circuit inside the receiver is applied to select a digital signal derived from co-channel interference by the analog TV signal, and is used to reduce the correlation of the analog TV signal in order to sufficiently reduce the energy of the previously mentioned system channel. Leverage correlation properties.

Looking at co-channel interference derived from analog TV signals, it enters the system channel between the DTV transmitter and the DTV receiver. The use or non-use of code precoding in a DTV transmitter has no effect on co-channel interference derived from analog TV signals. In a DTV receiver, if the system channel can be captured because the co-channel interference is not as wide as across the end of the receiver, this can be due to data with a comb filter to reduce the energy of the upper energy spectral element of the co-channel interference. This is preferable to a slicing circuit. Therefore, errors occurring during data slicing can be reduced. DTV broadcasters must tune the carrier frequency exactly, which is 310 KHz, which is close to the TV channel allocation lower limit frequency. Therefore, this carrier frequency is the optimal offset value of the frequency obtained from the video carrier of the co-channel NTSC analog TV signal which is close to interference. The optimal offset value of this carrier frequency is exactly N
This corresponds to 59.75 times the horizontal scanning line frequency (f _H ) of the TSC analog TV signal.

The result of co-channel interference contained in the demodulated DTV signal includes a bit at 59.75 times the horizontal scan line frequency (f _H ) of the NTSC analog TV signal, and the co-channel interference with the digital HDTV carrier. generated by heterodyne between the video carrier of the analog TV signal, a bit when the 287.75 times f _H generated by heterodyne between chrominance subcarrier of the digital HDTV carrier and co-channel interference analog TV signals there, these bits are the fifth bit close to the harmonics of when the 59.75-fold f _H. The result value is generated by the heterodyne between audio carriers of the digital HDTV carrier and co-channel interference analog TV signals, but encompasses bit closer to 345.75 times f _H, 59 of the bit f _H. 6 for 75 times
This is a bit near the third harmonic. The harmonic relationship of these bits is a correctly designed single comb filter that integrates a small number of codes with differential equal delay. DTV
The use of the NTSC elimination comb filter prior to data slicing inside the receiver is to perform the first type of code recording and to correct the code by data slicing.

The data slicing operation by the first type of code recording in the DTV receiver performs a non-destructive quantification process of the code obtained as a result of the first type of code recording. This is because the coding level is designed to match the code level. The quantification is based on the analog TV remaining after the filtering associated with the first type of code recording.
Identified as co-channels that interfere with the signal results, but to a lesser extent than the steps between code symbol levels. This is a kind of phenomenon capture in which a fine signal is consumed in the quantification process to obtain an excellent signal gain.

As far as data transmission is concerned, the flow of digital data codes is over the entire length of the system channel. When the second type of code recording is processed with code precoding in a DTV transmitter, the additional combination of differentially delayed data code streams does not boost the transmission power or interfere with the analog TV signal. Is made based on the modular principle, which increases the average inner code distance to suppress more. Instead,
The basic mechanism for suppressing the interference of analog TV signals is that the attenuator and the DTV signal face each other,
The result of the analog TV signal contained in the comb filter response, provided by the intercept comb filtering on the V receiver side and suppressed by the effect of quantification inside the data slicer, is immediately transmitted through the comb filter. You.

[0017] The order of progress of the first and second types of code recording process is such that the coding scheme for the code stream does not reduce the signal transmission, so that signal transmission through the system channel in such a situation. Has no effect separately. The order of progress of the first and second types of code recording processing is such that co-channel interference does not occur between the first type of code recording and continuous data slicing while the second type of code is recorded. It does not separately affect the receiving power of the digital receiver for preventing the analog TV signal. Such views are general matters on which the invention is based.

In digital receivers, such as digital TV receivers, co-channel interference with multi-level codes is prevented by using a first comb filter to reduce the energy of co-channel interference prior to data slicing. Is done. The first comb filter is a series of 2N-level codes, each with a code at a point with a specified length of time, which series of 2N-level codes tends to result in co-channel interfering analog TV signals, Responding to these results of co-channel interference analog TV signals should be prevented.

Additionally, the first comb filter performs a first type of code recording process of inserting an error into a decoding result of a code generated by data slicing. To delay a series of 2N-level codes, assuming that the first comb filter delays a series of 2N-level codes with only a predetermined number of codes:
The series of 2N-level codes are linearly combined and the series of 2N-level codes are delayed to combine the response results of the first comb filter in a first linear manner. This response with the (4N-1) -level code is applied to the first data slicer.

In the present invention, the first type of code recording procedure performed before data slicing by the first data slicer can be regarded as a pre-recording procedure. The second comb filter performs a second type of code recording procedure after data slicing,
A post-coding procedure is performed to compensate for the first type of code recording procedure to generate a corrected code decoding result. The first type of code recording procedure records the flow of codes input through differential delay and the first linear combination of differentially delayed sections. The second type of code recording procedure records the partially filtered code decoding result recovered by the first data slicer. A second type of code recording procedure is used as a second linear combination of the partially filtered code decoding results recovered by the first data slicer and processed with modular equations. One of the first and second linear combinations is (-), and the other is (+).
The result of the second linear combination is a post-coding of the code decoding result.

[0021] The post-coding is performed following cut-off comb filtering, and data slicing has a fundamental problem to properly drive the post-coding. One of the problems is that once an error occurs in the partially filtered code decoding result value, the error is delayed and fed back, and the error continues while the code decoding result value is post-coded. appear. Another problem lies in how to set the initial condition in the delayed feedback circuit and how to set the initial condition in the delayed feedback circuit in which an error has occurred once.

Such a problem occurs when the second type of recording is used for post-coding because the feedback used for such recording continuously accumulates over time. When the second type of recording is performed during precoding and the first type of recording is performed during postcoding, the first type of recording immediately responds to the initial condition response of the second type of recording. Give a time difference to shut off. No initial conditions for accumulation are considered. When a first type of recording is performed while precoding is performed and a second type of recording is performed while postcoding is performed, an error caused by an uncorrected initial condition for accumulation in the second type of recording. Will continue to take effect during the postcoding. In this way, errors that occur up to the final decoding result cause system errors that are not temporary errors,
Generally, such persistent errors are not self-diagnostics.

[0023]

SUMMARY OF THE INVENTION Accordingly, the present invention has been made to solve the above-mentioned problems of the prior art, and has as its object to solve a 2N-level flow having a code of a fixed length within a fixed time. It is to provide a code decoding method.

At this time, a series of 2N-level codes produces the result of the co-channel interference analog TV signal and is susceptible to this result. N at this time is a positive integer. The method uses a series of 2N-bits to produce a comb filter response with (4N-1) levels of precoded codes from the result of the co-channel interference analog TV signal, which is blocked if any. Generating a code decoding result selected from the step including the step of intercept comb filtering the level code. The step of blocking comb filtering comprises a series of 2N-level codes with a predetermined number of code sections to generate a series of delayed 2N-level codes.
Including a sub-step of delaying the level code, said series of 2
The N-level code is linearly combined with the delayed series of 2N-level codes, and the first linear combination result is obtained by one of the addition and subtraction processes, as described in (4).
N-1) Comb filter response with precoded code at level.

In order to generate a precoded code decoding result, there is a step of data slicing the response of the comb filter having the (4N-1) level precoded code. There is the step of data slicing the response of the delay selected comb filter. A selected code decoding result having a predetermined number of code sections is delayed to generate a delayed selected code decoding result, and a delayed selected code decoding is generated to generate a second linear combination result. There is the step of linearly combining the precoded code decoding results with the results. The linear combination performed to generate the result of the second linear combination may involve reciprocal processing of addition and subtraction from one used in the sub-step of the linear combination performed to generate the result of the first linear combination. Made through modular formulas. Determining a code decoding time point indicating synchronization data occurring in the series of 2N-level codes;
When the code decoding of the synchronization data is described in the series of 2N-level codes, the synchronization data is reproduced without error, and when the code coding of the synchronization data is described in the series of 2N-level codes, When the code coincides with the synchronization data without error and the code coding of the synchronization data is not described in the series of 2N-level codes, in order to match the result of the second linear combination in a minimum selection interval,
There is the step of generating a selected code decoding result.

Another method of the present invention is a combination of circuits. As described below, the circuit is a digital TV.
Included in receiver. The combination includes a digital TV signal detector to support a series of 2N-level codes with each code section for a certain period of time. The flow is susceptible to the consequences of co-channel interference analog TV signals. The combination includes first and second delay devices that exhibit a predetermined first number of delays in the code section.
The combination includes first and second linear combiners, one of which is an adder and the other is a subtractor, and the second linear combiner operates according to a modulo-2N equation. The first delay device is coupled to respond to the delayed stream of the first 2N-level code in response to the stream of 2N-codes, whereby the first delay of the differentially delayed stream of the 2N-level code is first. Generate pairs. The first linear combiner is coupled to linearly combine the differentially delayed first pair of the 2N-level codes, which is the first and second linear combiners of the first linear combiner. Received as each input signal. In response to these input signals, the first linear combiner uses the first stream of (4N-1) level codes as its output signal. The first data slicers are transmitted as respective output signals from the first linear combiner (4N
-1) Included in the combination to decode the first stream of level codes to generate a first precoded code decoding result. The second linear combiner, which receives and linearly combines the respective first and second input signals, thereby transmitting the respective output signals, includes the first precoded as the respective first input signals. Concatenated to receive the code decoding result. The second
A delay device delays each input signal to generate the second input signal of the second linear combiner.

Further, the combination includes a data synchronization circuit for determining when a code is used for data synchronization appearing in the series of 2N-level codes, and a code synchronization for the series of 2N-level codes. If a code is used, it includes a circuit for generating an ideal code decoding result. In the combination, a first multiplexer having a large number of inputs transmits respective output signals to the second delay device as respective input signals, and uses the ideal code decoding result as its own first input signal, The output signal of the second linear combination is received and used as another input signal. The first multiplexer includes the series of 2N
A condition is established for reproducing the own output signal as the own first input signal only when the code is used for data synchronization in the level code. Alternatively, a condition is formed in which the first multiplexer uses the output signal of the second linear combiner as a first post-coded code decoding result in a minimum selection interval.

[0028]

In order to achieve the above object, a code decoding method according to the present invention is a method for code decoding a series of 2N-level codes each having a code section of a fixed time length. And the series of 2N
The level code flow is likely to be accompanied by an artifact component of the co-channel interference analog TV signal, wherein N is a positive integer and the method of generating a selected code decoding result comprises:
The artifact component of the V signal is suppressed (4N-
1) comb filtering the series of 2N-level codes to generate a comb filter response having a level of pre-coded codes, wherein the series of 2N-level codes is converted to a predetermined number of codes. A sub-step of generating a series of delayed 2N-level codes by delaying the code section, and adding or subtracting the series of 2N-level codes and the delayed series of 2N-level codes. (4N-1)
Generating a first linear combination result value in response to the comb filter having a level precoded code; and generating a precoded code decoding result value. Data slicing the response of the comb filter having the (4N-1) level pre-coded code to generate a code selected result value with a delay. Delaying the selected code decoding result value by a predetermined number of times; and selecting the delayed and selected code decoding result value and the precoded code to generate a second linear combination result value. Linearly combining decoding result values, and said linearly combining,
Any of the addition and subtraction processes used in the sub-step of linearly combining the series of 2N-level codes and the delayed series of 2N-level codes to generate the first linear combination result value. The addition and subtraction processes according to the opposite logic are performed by a modulo calculation method, and a code coding indicating synchronization data is performed in the series.
Determining when to occur in the N-level code; and wherein the code coding indicative of the synchronization data comprises
Regenerating the synchronization data without error when it occurs in the N-level code; and selecting the code without error when the code coding indicating the synchronization data occurs in the series of 2N-level codes. A decoding result value coincides with the synchronization data, and code coding not indicating the synchronization data is performed by the series of 2N codes.
Generating the selected code decoding result to coincide with the second linear combination result for at least a selected time when generated with a level code.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 shows a digital TV signal receiver used for recovering data in which an error has been corrected. The data at this time is suitable for recording a digital video cassette record, or MPEG-2 decoding and display in a TV set. Although the DTV signal receiver of FIG. 1 is shown to receive a TV broadcast signal from the receiving antenna 8,
Alternatively, signals can be received from a cable network. The TV broadcast signal is input to the terminal 10 of the device. In general, the end 10 of the device comprises a radio frequency amplifier and a first detector for converting the radio frequency TV signal into an intermediate frequency TV signal, and transmits the vestigial sideband DTV signal to the intermediate frequency amplifier chain 12. The DTV receiver preferably performs multiplex conversion in an intermediate frequency amplifier chain 12 including an intermediate frequency amplifier in order to amplify the DTV signal converted to the ultrahigh frequency band by the first detector, and further to the VHF band. An intermediate frequency amplifier is provided for amplifying the converted DTV signal. If demodulation is performed on the baseband in the digital sector, the IF amplifier chain 12 converts the amplified DTV signal to a third intermediate frequency band close to the baseband.
A detector is provided.

Preferably, a surface acoustic wave (SAW) filter was used in the intermediate frequency amplifier for the UHF band to achieve channel select response and remove adjacent channels. The surface acoustic wave filter cuts off the VSB DTV signal and the cut-off carrier frequency of the pilot carrier very quickly above 5.38 MHz, which is a fixed amplitude of frequency. Thus, the surface acoustic wave filter blocks any co-channel frequency modulated acoustic carrier that interferes with the analog TV signal. Blocking any co-channel FV acoustic carrier, which interferes with the analog TV signal in the intermediate frequency amplifier chain 12, reduces residual interference due to data slicing of these baseband codes during code decoding. In order to prevent this in advance and to recover the code of the baseband, the residual of the carrier generated when the final intermediate frequency signal is detected is cut off. While code decoding is taking place, it may be preferable to pre-empt residue interference due to data slicing of these baseband codes rather than block comb filtering prior to data slicing.

The final intermediate frequency output signal of the intermediate frequency amplifier chain 12 is transmitted to the complex demodulator 14,
At this time, the complex demodulator 14 demodulates the residual sideband amplitude modulated DTV signal in the final intermediate frequency band in order to recover the real part and the imaginary part of the baseband signal. Demodulation is performed in the digital sector after analog-to-digital conversion of the final intermediate frequency band in the few megacycles region, which is published in the United States on December 26, 1995, and in patent application no. Reference was made to the embodiment set forth at 449, "Digital VSB Detector with HDTV and Phase Tracking Device".

Alternatively, the demodulation can be performed in the analog department, but the result in this case is generally for analog-to-digital conversion to make subsequent procedures more useful. Complex demodulation consists of in-phase (I) synchronous demodulation and quadrature (Q) synchronous demodulation whenever possible. Generally, the digital result of the demodulation procedure described above has a precision of 8 bits or more, and indicates a 2N-level code that encodes N bits of data. In general, when the DTV signal receiver of FIG. 1 receives an aerial wave via the antenna 12, 2N becomes 8, and 2N becomes 1 when a cable broadcast wave is received.
It becomes 6. The focus of the present invention is on receiving broadcast waves from the ground to the air. In FIG. 1, a part of a DTV receiver that provides code decoding and error correction decoding for transmission of a received cable broadcast wave is omitted.

Code synchronization circuit and equalization circuit (equalizer 1
6) receives from the complex demodulator 14 the smallest digital real number sample of the in-phase (I-channel) baseband signal. The DTV receiver circuit 16 of FIG. 1 illustrates receiving a digital imaginary sample of a quadrature (Q channel) baseband signal. Circuit 16 includes a digital filter having an effective weighting effect to compensate for ghosts and tilt angles included in the received signal. The code synchronization and equalization circuit 16 performs code synchronization or rotation as well as amplitude equalization and ghost removal. The code synchronization and equalization circuits used for code synchronization are performed prior to amplitude equalization, which was referenced in U.S. Application No. 5,479,449.

In such a design, the demodulator 14
Transmits the overextracted demodulator response including the real and imaginary numbers of the baseband signal to the code synchronization and equalization circuit 16. After code synchronization, about 1/10 of the over-extracted data is removed, which extracts a baseband I-channel signal at a normal code rate and uses digital filtering used for amplitude equalization and ghost removal. In order to reduce the sampling rate. Amplitude equalization is a technique that is widely known in the field of rotation or phase tracking or digital signal receiver design in code synchronization and equalization circuits that perform code synchronization.

Each sample of the output signal of circuit 16 is divided into ten or more bits, but effectively one analog code is a digital representation of one of the (2N-8) levels. is there. The output signal of the circuit 16 is one whose gain is controlled by one of several known methods, so that the ideal level of the code is known. One method of gain control selected because the response speed of such gain control is extremely fast is to adjust the DC component of the real part of the baseband signal transmitted to the normal level of +1.25 by the complex demodulator 14. . Generally, such a gain control method is disclosed in U.S. Patent Application No. 5,479,449.
And more detailed in U.S. Patent Application No. 5,573,454, filed Dec. 15, 1995, entitled "Automatic Gain Control of Radio Receiver for Digital HDTV Signal Reception". The present invention has referred to this.

The output signal output from the circuit 16 is transmitted as an input signal to a data synchronization circuit 18, which includes synchronization information (F) of a data area derived from the equalized baseband I-channel signal and data. The segment synchronization information (S) is restored. Alternatively, the input signal transmitted to the synchronization detection circuit 18 can be obtained prior to equalization.

At the normal code rate, the equalized I-channel signal sample transmitted as an output signal from circuit 16 is transmitted as an input signal to NTSC rejection comb filter 20. The comb filter 20 includes a first delay device 201 for generating a pair of differentially delayed series of 2N-level codes, and a differentially delayed code for generating a response of the comb filter 20. And a first linear combiner 202 for linearly combining the flows. Referring to the contents described in U.S. Pat. No. 5,260,793, the first delay unit 201 provides the same delay as 12 periods of a 2N-level code, and the first linear combiner 202 adds Become a vessel. Each sample of the output signal of the comb filter 20 is divided into 10 or more bits, and effectively one analog code is (4N-
1) Digital representation of one of = 15 levels.

The code synchronization and equalization circuit 16 is considered to be designed to limit the DC bias component of its own input signal, this DC bias component having a normalized level of +1.25 and the pilot Appears in the real part of the baseband signal transmitted from complex demodulator 14 by carrier detection. Thus, each sample of the output signal of circuit 16 is applied as an input signal to comb filter 20 and effectively one analog code has the next normal level, ie, -7,-.
One of 5, -3, -1, +1, +3, +5, and +7 is digitally represented.

These code levels are odd code levels,
000, 001, 010, 011, 100, 101, 1
The odd-level data slicer 22 detects the temporary code decoding result of each of the 10 and 111. Each sample of the output signal of comb filter 20 is effectively one analog code at the next normal level: -14, -12, -10, -8, -6, -4,.
-2, 0, +2, +4, +6, 8, +10, +12, +
14 is digitally represented. These code levels are even code levels, and 001, 01
0,011,100,101,111,000,00
1,010,011,100,101,110,111
Are detected by the even-level data slicer 24 to generate a special code decoding result.

The data slicers 22, 24 in this sense are referred to as "difficult solutions" or "simple solutions" used to implement a Viterbi decoding structure. Using a multiplexer concatenation to shift its position in the circuit and applying a bias to modify its slicing range, the odd level data slicer 22 and even level data slicer 24 can be combined with a single data slicer. Alternative arrangements are possible. However, these arrangements are not suitable because of their complicated operation.

Next, a method for the code synchronization and equalization circuit 16 to suppress the DC bias component included in its own input signal will be described. The DC bias component at this time is +1.
It has a normal level of 25 and appears in the real part of the baseband signal transmitted from the complex demodulator 14 by pilot carrier detection. Alternatively, the code synchronization and equalization circuit 16
Is designed to keep the DC bias component contained in its input signal, which in a sense simplifies the design of the equalization filter in circuit 16. In such a case, the data slicing level in the odd-level data slicer counts the DC bias component accompanying the data process included in its own input signal and takes it as an offset value.

Even if the circuit 16 is designed to cut off or hold the DC bias component contained in the discontinuous input signal, which is regarded as the data slicing level by the even-level data slicer 24, One linear combiner 202 is provided as an adder. But,
If the differential delay transmitted from the first delay device 201 is selected, the first linear combiner 202 becomes an adder, and the data slicing level in the even-level data slicer 24 is included in its own input signal. The superimposed DC bias component accompanying the data process is counted and taken as an offset value.

A post-coding filter response is used after the data slicers 22, 24 to generate a post-coding filter response with the pre-coding filter response of the comb filter 20. The comb filter 26
Is a multiplexer 261 having three inputs, a second linear combiner 262, and a first delay device 201 including a comb filter.
And a second delay device 263 having the same delay as The second linear combiner 262 becomes a modulo-8 adder if the first linear combiner 202 is a subtractor, and if the first linear combiner 202 is an adder,
It becomes a modulo-8 subtractor. Each of the ROMs for sufficiently increasing the first linear combination operation speed may be configured. The output signal from the multiplexer 261 is coupled to the post-coating comb filter 26.
, And is delayed by the second delay device 263. The second linear combiner 262 combines the precoded code decoding result obtained from the even level data slicer 24 with the output signal obtained from the second delay device 263.

The output signal of the multiplexer 261 is
When a multiplexer control signal applied from the controller 28 to the multiplexer 261 is selected from the first, second, and third state responses,
Play one of the two input signals. While the data area synchronization information (F) and the data segment synchronization information (S) obtained from the equalized baseband I channel signal are restored by the data synchronization detection circuit 18, the first input of the multiplexer 261 is restored. The port receives the applied ideal code decoding result from a memory located in the controller 28. Final coding result of output signal and controller 2
The controller 28 communicates a first state of the multiplexer control signal to the multiplexer 261 while forming a condition for providing the ideal code decoding result applied from the memory within 8 to the multiplexer 261.
The odd-level data slicer 22 transmits an intermediate code decoding result to a second input port of the multiplexer 261 as an output signal.

The multiplexer 261 is adjusted to the second state of the multiplexer control signal in order to reproduce the intermediate code decoding result as the final coding result which is its own output signal. The second linear combiner 2
62 outputs the post-coded code decoding result as its own output signal to the third
Transmit to input port. The multiplexer 261 is conditioned on the third state of the multiplexer control signal to reproduce the post-coded code decoding result as its final output signal, the final code result.

While the data synchronization detecting circuit 18 recovers the data area synchronization information (F) and the data segment synchronization information (S), the ideal code decoding result value transmitted from the memory in the controller 28 is fed back. As a result, the execution errors generated from the code decoding result post-coded from the post-coding comb filter are reduced. This part is the main part of the present invention and will be described later.

The output signal from the multiplexer 261 in the post-coding comb filter 26, including the final code decoding result contained in the three parallel bit groups, is sent to a data assembler 30 for application to a data inserter 32. Combined. The data inserter 32 rectifies the combined data in a parallel data stream and sends it to a trellis decoder circuit 34. Generally, the trellis decoder circuit 34 uses a 12 trellis decoder. The trellis decoding result applied from the trellis decoder circuit 34 is transmitted to a data inserter circuit 36 for rectification.

The byte analysis circuit 38 includes the data inserter 3
6 is output to a data randomizer 4
2 is transmitted to a Reed-Solomon decoding circuit 40, which performs Reed-Solomon decoding to generate a stream of corrected error bytes transmitted to 2, and converted into Reed-Solomon error correction coding bytes. The data randomizer 42 transmits the reproduced data to the other receiver (not shown). Another complete DTV receiver includes a packet classifier, an audio decoder, an MPEG-2 decoder and others. Another such DTV receiver integrated into a digital tape recorder / reproducer is provided with circuitry for converting the data in the manner required for recording.

Co-channel interference NTSC signal detector 44
Is a signal slicer 22 for co-channel interference NTSC signals.
Provides a controller 28 that can determine if the state is perfect enough to cause an uncorrectable error included in the data slicing performed in step (1). If the detector 44 indicates that the co-channel interference NTSC signal is not sufficiently perfect, except when the data area synchronization information (F) and the data segment synchronization information (S) are recovered by the data synchronization detector circuit 18. At other times, the controller 28 outputs the second state of the multiplexer control signal to the multiplexer 261.
Communicate to Such a condition is satisfied by the multiplexer 26
1 is used to reproduce the intermediate code decoding result transmitted from the odd-level data slicer 22 with its own output signal.

If the detector 44 indicates that the co-channel interference NTSC signal is sufficiently complete to cause an uncorrectable error included in the data slicing performed by the data slicer 22, the data area synchronization information At other times except when (F) and the data segment synchronization information (S) are restored by the data synchronization detector circuit 18, the controller 28 transmits the third state of the multiplexer control signal to the multiplexer 261. . Such a condition is that the multiplexer 261 converts the post-coded code decoding result transmitted from the second linear combiner 262 as a result of the second linear combination,
Used to play back with own output signal.

FIG. 2 shows the format that the co-channel interference NTSC signal detector 44 can take, which is of interest in the related art. The subtracter 441 calculates the intermediate code decoding result transmitted from the odd-level data slicer 22 and the second linear combiner 262
The post-coded code decoding result transmitted as a result of the linear combination is separately combined. If the co-channel interference NTSC signal is negligible and the random noise included in the baseband I-channel signal is negligible, these virtual,
Post-coded code decoding results are similar. Therefore, the output signal difference from the subtractor 441 will be small. However, if co-channel interference NTS
If the C signal is a considerable amount, the output signal difference from the subtractor 441 generally does not decrease. However, sometimes the signal difference is large.

The method of measuring the energy included in the difference between the output signals output from the subtractor 441 is to square the difference value of the output signal having the squarer 442 and to calculate the squarer response over a short section having the average circuit 443. Is determined and obtained. The squarer 442 is performed using a ROM. The averaging circuit 442 is implemented using a delay line memory for storing some suitable digital samples and an adder for adding the digital samples currently stored in the delay line memory. The average value of the energy distributed in a short section included in the output signal difference obtained by the subtractor 441 and determined by the average value circuit 443 is connected to a digital comparator to support the threshold detector 444. Is done. The threshold value of the threshold detector 444 is a difference between an average value of a short period included in random noise accompanied by an intermediate code decoding result and a post-coded code decoding result value applied to a subtractor 441. Large enough not to exceed. The threshold is exceeded if the co-channel interference NTSC signal is large enough to make it impossible to correct the errors contained in the data slicing performed by data slicer 22. The threshold detector 444 causes the controller 28 to indicate whether the threshold has been exceeded.

FIG. 3 shows a digital TV receiver different from that of FIG. The circuit type that determines whether the co-channel interference NTSC signal is large enough to make it impossible to correct the errors involved in the data slicing performed by the data slicer 22 with this circuit is March 21, 1997.
See "Use of Video Signal from Analog TV Receiver for Detection of NTSC Interference in Digital TV Receivers" filed on Aug. 31, 2010, US patent application Ser. No. 08 / 821,944.

The DTV signal converted to the intermediate frequency at the end 10 of the device is transmitted to the intermediate frequency amplifier chain 46 for the NTSC signal. The intermediate frequency amplifier chain 46 in the NTSC signal is distinguished from the intermediate frequency amplifier commonly used in NTSC signal receivers. Considering the gain characteristics of the intermediate band, the amplifier stages included in the intermediate frequency amplifier chain 46 for the NTSC signal corresponding to the amplifier stages included in the intermediate frequency amplifier chain 12 for the DTV signal have a linear gain that is continuous. And has the same automatic gain control value as the corresponding value for the amplifier stages included in the intermediate frequency amplifier chain 46. The residual sideband of the NTSC signal is not cut off by the intermediate frequency amplifier chain 46. A portion of the front side band of the NTSC signal, which is characteristically a single side band, is suitably cut off by the intermediate frequency amplifier chain 46 to reduce the energy of the co-channel DTV signal. The reduction in the active range of the intermediate frequency amplifier chain 46 response facilitates additional amplification of the video carrier to lock the phase of the video carrier local oscillator used in the complex demodulator 48.

The filtering process for measuring the bandwidth of the intermediate frequency amplifier chain 46 can be performed by surface acoustic wave SAW filtering in the UHF intermediate frequency amplifier when a multiplex conversion receiving circuit is used.
The amplified intermediate frequency response of the intermediate frequency amplifier chain 46 is transmitted to a complex demodulator 48 for an NTSC video signal after performing direct or further amplification. The complex demodulator 48 transmits the in-phase I-channel response composed of NTSC signal samples and the real part factor for the DTV structure. The complex demodulator 48 transmits a quadrature Q channel response composed of samples of the imaginary part factor for the DTV structure. The samples at this time are transmitted to the Hilbert transform filter 50. The response of the Hilbert transform filter 50 is transmitted to a linear combiner 52.

The linear combiner 52 responds with an appropriately delayed in-phase I-channel response to continuously recover samples of the NTSC signal, independent of the DTV result. The linear combiner 52 is an adder or subtractor that is subject to the relative video carrier phasing during the synchronous demodulation process used in the complex demodulator 48 to obtain the response on the I and Q channels. is there.

The NTSC signal transmitted from the linear combiner 52 and not relevant to the DTV result is transmitted to a low-pass filter 54 having a comb filter frequency of 750 KHz or less. The energy measurement for the luminance signal contained in the co-channel interference NTSC signal squares the response of the low pass filter 54 with the squarer 56,
The average value of the response of the squarer having the average value circuit 58 over a short time is determined and calculated. The measurements are transmitted to a criticality detector 58. If the NTSC co-channel interference is too large to correct an error included in data slicing performed by data slicer 22,
The threshold of the threshold detector 58 is exceeded. The threshold detector 58 assists the controller 28 in indicating whether the threshold has been exceeded.

FIG. 4 shows a digital TV receiver which is distinguished from FIGS. 1 and 3, in which NT
The part that determines whether the SC co-channel interference is large enough to not correct the errors involved in the data slicing performed by the data slicer 22 is described in U.S. patent application Ser. 945)
Digital TV using intercarrier signal
Method for Detecting NTSC Interference of Receiver ".

The DTV signal converted to the intermediate frequency at the terminal end 10 of the device is transmitted to an intermediate frequency amplifier chain 62 having a quasi-parallel type with respect to the NTSC sound signal. NTSC sound signal intermediate frequency amplifier chain 62
Are substantially equal to the amplification stages included in the intermediate frequency amplifier chain 12 of the DTV signal. Perform control. The frequency selection of the intermediate frequency amplifier chain 62 is based on NTSC
Audio carrier within + 250KHz range and NTS
This is done within the range of +250 KHz of the C video carrier.

The filtering process for measuring the frequency selection of the intermediate frequency amplifier chain 62 includes the UHF
The use of a multi-conversion receiver circuit in an intermediate frequency amplifier is performed by surface acoustic wave (SAW) filtering. The response of the intermediate frequency amplifier chain 62 is transmitted to an intercarrier detector 64, which is a 4.5M
To generate an inter-carrier acoustic intermediate frequency signal with a carrier frequency of 5 Hz, a modulated NTSC video carrier is used as the enhanced carrier required to heterodyne the NTSC audio carrier. The inter-carrier acoustic intermediate frequency signal is amplified by an inter-carrier acoustic intermediate frequency amplifier 66.
Hz intermediate frequency amplifier 66 converts the amplified intercarrier acoustic intermediate frequency signal to an intercarrier amplitude detector 68.
Communicate to

The response of the amplitude detector 68 is determined by the average value circuit 7
An average value is calculated from 0 to a short section, and the average value is transmitted to the threshold detector 72. If the NTSC co-channel interference is too large to correct for errors contained in the data slicing performed by data slicer 22,
The threshold of the threshold detector 72 is exceeded. The threshold detector 72 helps the controller 28 indicate whether a threshold has been exceeded.

FIG. 5 shows that the multiplexer 261 in the post-coding comb filter 26 is preferentially performed. The multiplexer 261 having three input signals is a multiplexer 261 having two input signals.
The results are shown in comparison with 1,612. The controller 28 is NT
An output signal from an SC co-channel interference detector (eg, 44) is combined with a multiplexer 2611 having two input signals.
As a control signal.

If the NTSC co-channel interference is sufficiently large that the error contained in the data slicing performed by the data slicer 22 cannot be corrected, the output signal produced under the conditions of the NTSC co-channel interference detector The result 1 is transmitted to the multiplexer 2611 to be reproduced, and is transmitted to the second input port of the multiplexer 2612 for application.
Is transmitted to the first input port of the multiplexer 2611. If the NTSC co-channel interference is large enough that it is not possible to correct the errors contained in the data slicing performed by the data slicer 22, the NTS
C Output signal result 0 under the condition of co-channel interference detector
Is transmitted to the multiplexer 2611 to reproduce the intermediate code decoding result, and the data slicer 2
The result of 2 is transmitted to the second input port of the multiplexer 2611. These reproduced intermediate code decoding results are transmitted to the second input port of the multiplexer 2612.

FIGS. 5, 6 and 7 each show an OR gate 281 included in the controller 28. FIG. The OR gate 281 detects when the area segment sync detector 181 transmits "1" and the area sync segment is detected in response to the "1".
When "2" transmits "1" and a data synchronization code is detected as a response, "1" is returned. In all other cases, the OR gate 281 responds with "0".

In FIG. 5, the response of the OR gate 281 is transmitted to the multiplexer 2612 as a control signal. The multiplexer 2612 is a data assembler 3
The final code decoding result that can be transmitted to 0 and the peripheral signal of the multiplexer 2611 can be transmitted to the second input port of the multiplexer 2612 to be reproduced as a better code decoding measurement result value. Therefore, the response of the OR gate 281 is "0". The multiplexer 2612 is a data assembler 3
0 so as to be able to reproduce the final code decoding result which can be transmitted to 0 and the ideal decoding result extracted from the memory in the controller 28.
The response of 81 is “1”. Next, this will be described in detail with reference to FIG.

FIG. 6 shows another structure 260 of the post-coding comb filter 26. A multiplexer 261 with three input signals compared to two multiplexers 2611, 2612 with two input signals,
Three multiplexers 2610 with two input signals
It has been replaced by a multiplexer 2610 with three input signals, including 1, 26102, 26103.

FIG. 7 shows a variation 2600 of the post-coding comb filter 26, where a multiplexer 261 with three input signals includes two multiplexers 2611, 2612 with two input signals.
Are two multiplexers 26 with two input signals
Instead of a multiplexer 26100 having three input signals, including 1001 and 261002, they receive their respective control signals from the OR gate 281 and the NTSC co-channel interference detector.

The post-coding comb filter 2
600 is the post-coding comb filter 26,
It operates a little differently from 260. When the response of the OR gate 281 is “1”, the multiplexer 261001 replaces the post-coded code decoding result with an ideal code decoding result. When the NTSC co-channel interference detector indicates "1" when the NTSC co-channel interference is sufficiently large that the error included in the data slicing performed by the data slicer 22 cannot be corrected, the multiplexer 261
002 selects the corrected post code decoding result as the final code decoding result for application to the data assembler 30.

When the NTSC co-channel interference detector indicates "0" when the NTSC co-channel interference is sufficiently large that the error contained in the data slicing performed by the data slicer 22 cannot be corrected. The multiplexer 261002 selects the intermediate code decoding result from the data slicer 22 as a final code decoding result for application to the data assembler 30. At this time, none of these intermediate code decoding results is replaced with an ideal code decoding result.

FIG. 8 shows the multiplexer 2612 of FIG. 5 in more detail, and shows a circuit necessary for applying an ideal code decoding result to the multiplexer 2612. The multiplexer 2612 includes output buffer registers ROM 74, 7 for selectively reading the 3-bit wideband output bus 80 from the multiplexer 2612.
6,78. Further, the multiplexer 2612 includes a three-phase buffer 82 for selectively transmitting the 3-bit wideband output signal of the multiplexer 2611 to the output bus 80.

A circuit for transmitting the ideal code decoding result to the multiplexer 2612 is represented by R
OM74, 76, 78, code clock generator 84,
Address counter 86 for specifying addresses of ROMs 74, 76, 78, jam reset circuit 88 for resetting counter 86, ROMs 74, 7
6 and 78 are composed of NOR gates 92 for controlling address decoders 94, 96 and 98 for generating readable signals and a three-phase buffer 82. The address counter 86 receives the code decoding rate in the code clock generator 84 and counts input pulses. Therefore, addresses for each of the codes in one data frame are continuously provided. Appropriate portions of these addresses are taken as input addresses of ROMs 74, 76, 78.

The jam reset circuit 88 stores the data area synchronization information F and the data segment synchronization information S in FIGS.
Alternatively, the data synchronization detection circuit 18 in FIG. The configuration of the counter 86 is preferably composed of a group that counts the more important bits by the number of data segments / data frame and a group that counts by the number of less important bit segments / data frame. Such a configuration simplifies the design of the jam reset circuit 88 and makes the address detector 9
The bit width of the input signal applied to 4, 96, 98 can be reduced, and the ROMs 74, 76, 78 can be easily addressed to some addresses of the counter 86, and the bit width of ROM addressing can be reduced.

The ROM 74 stores an ideal code decoding result for the odd-number area sync segment, and is selectively enabled when the address decoder 94 receives “1”. The ROM 74 is addressed by a group that counts less important bits by the number of data segments / data frame, and the address decoder 94 is responsive to a group that counts more important bits by the number of data segments / data frame. The address decoder 94 becomes "1" only when the data segment portion of the address transmitted by the address counter 86 matches the address of the odd area synchronization segment.

The ROM 76 stores an ideal code decoding result for an even-number area sync segment, and is selectively enabled for a signal "1" received by the address decoder 96. The ROM 76 is addressed by a group that counts less important bits by the number of data segments / data frame, and the address decoder 96 is responsive to a group that counts more important bits by the number of data segments / data frame. The address decoder 96 becomes “1” only when the data segment portion of the address transmitted by the address counter 86 matches the address of the even-number area synchronization segment.

The ROM 78 stores an ideal code decoding result for a start code group at the beginning of each synchronous segment, and a value read and received from the address decoder 98 by receiving p “1” is selectively enabled. . The ROM 78 responds to the two meaningless bits of the output of the counter 86,
Responds to the group that counts the less important bits by the number of data segments / data frame. The address decoder 98 becomes "1" only when the data segment portion of the data code / address transmitted by the address counter 86 matches a partial address of the start code portion.

The NOR gate 92 has an address decoder 94, 9 at one point of each of the three input connection parts.
6, 98 responses are received. When an ideal code decoding result is obtained, one of the address decoders 94, 96 and 98 transmits "1" as its output signal, and the NOR gate 92 transmits "0" to the three-phase data buffer 82. Are formed. Under these conditions,
The three-phase data buffer 82 adds a high power supply impedance to the data bus 80 and
The signal of 1 is not transmitted to the 3-bit wideband data bus 80, and the signal of the multiplexer 2612 is transmitted. In the data segment part for the unpredictable ideal code decoding result, the address decoders 94 and 9 are used.
6 and 98 do not transmit “1” as an output signal, and the NOR gate 92 is connected to the three-phase data buffer 8.
A condition for responding "1" to 2 is formed. Under this condition, the three-phase data buffer 82 adds a low power impedance to the data bus 80, and the signals of the multiplexers 2611 and 2612 are transmitted to the three-bit wideband data bus 80.

FIG. 8 is a circuit diagram for generating an ideal code decoding result applied to the multiplexer 2612, which is a technique easily applied in the field of digital circuit design used in the configurations of FIGS. is there.

FIG. 9 shows the digital T-cell of FIGS. 1, 3 and 4 using 120 types of NTSC rejection comb filters 20 and 126 types of post-coding comb filters 26.
3 shows a portion of the V signal receiver block configuration in detail. The subtractor 1202 is the NTSC removal comb filter 12
0, acting as the first linear combiner, the modulo-8 adder 1262
6 serves as a second linear combiner. The NTSC
The elimination comb filter 120 indicates a delay of 12 code intervals using the first delay device 1201, and the post-coding cutoff filter 126 has a second delay device 126.
3, the delay of 12 code sections is shown. The 12-code delay introduced by each of the delay units 1201 and 1263 corresponds to the horizontal scanning frequency f _H of 59.
Near one cycle delay of the analog TV video carrier result at 75x. The 12 287.75 code delay of f _H
At times, it is close to 5 cycles of the analog TV chrominance subcarrier result. When 345.75 times the 12 code delay is f _H,
Close to 6 cycles of analog TV chrominance subcarrier result.

This is because the differentially combined responses of the subtractor 1202 to the audio carrier, the video carrier, and the frequency are differentially delayed by the first delay device 1201 trying to block co-channel interference. This is because it is close to the color difference subcarrier. However, in a part of the video signal whose end crosses the horizontal scanning line, the correlation degree of the analog TV video signal at a certain distance in the horizontal space direction is extremely low.

The 1261 types of multiplexers 261 are controlled by a multiplexer control signal. In most cases, however, NTSC co-channel interference is so great that errors contained in an output signal from the data slicer 22 cannot be corrected. In the second state when determined to be insufficient,
In most cases, it is determined that NTSC co-channel interference is sufficient to make it impossible to correct the errors contained in the output signal from the data slicer 22. The multiplexer 1261 becomes a control signal in the third state, and is fed back to the sum of modulo-8 of the adder 1262. Becomes This is a modular accumulation process in a portion where a single error is propagated as a running error, and the error is repeated in all 12 code sections. A running error included in the post-coded code decoding result from the post-coding comb filter 126 may cause the running error of the multiplexer 12 only while the entirety of each data segment includes region synchronization.
61 is abbreviated when placed in the first state for four code intervals at the beginning of each data segment.

When the control signal is in the first state, the multiplexer 1261 reproduces the output signal ideal code decoding result transmitted from the memory in the controller 28. The result of the ideal code decoding is output to the multiplexer 12.
If the vehicle is guided by the output signal 61, the traveling error is stopped. 4+
Since there are 69 (12) code / data segments, the ideal code decoding result slips back four code intervals at the phase of each data segment, eliminating run errors that remain longer than three data segments.

FIG. 10 shows in detail the block configuration for a part of the digital TV signal receiver shown in FIGS. 1, 3 and 4 using 220 kinds of NTSC rejection comb filters 20 and 226 kinds of post coding comb filters 26. Is shown. The NTSC removal comb filter 220 indicates a delay of six code intervals using a first delay device 2201, and the post-coding comb filter 226 indicates a delay of six code intervals using a second delay device 2263. The 6-code delay presented by each of the delay units 2201, 2263 is close to 2.5 cycles of the analog TV video carrier result at 59.75 times the horizontal scanning frequency f _H of analog TV, and 345.75 of f _H. At times, it is close to three cycles of the analog audio carrier result. The adder 2202 is an NTSC removal comb filter 22
0, acting as the first linear combiner, the modulo-8 subtractor 2262 operates as a post-coding comb filter 22.
6 serves as a second linear combiner. The delay presented by the delay devices 2201, 2263 is shorter than the delay presented by the delay devices 1201, 1263,
Even if the frequency is close to 0 converted from the analog TV carrier frequency, the band becomes narrow, and the signal additionally combined by the adder 2202 due to the good correlation between the signals combined differentially by the subtractor 1202. Has better anti-correlation.

The acoustic carrier cutoff is weaker in the NTSC rejection comb filter 220 than in the NTSC rejection comb filter 120 response. However, if the acoustic carrier of the co-channel interfering analog TV signal is blocked from surface acoustic filtering or acoustic traps in the intermediate frequency amplifier chain 12 by surface acoustic filtering or intermediate frequency amplifier chain 12, Less sound removal is not a problem. While using the NTSC reject comb filter 220 of FIG. 10 rather than the NTSC reject comb filter 120 of FIG. 9, the response to the synchronization chip is eliminated. Therefore, the error correction enhancement in trellis decoding and Reed-Solomon coding is substantially decreasing.

The type 2261 of the multiplexer 261 is controlled by a multiplexer control signal. In most cases, however, NTSC co-channel interference is so large that errors contained in the output signal from the data slicer 22 cannot be corrected. In the second state when determined to be insufficient,
In most cases, where it is determined that NTSC co-channel interference is sufficient to make it impossible to correct errors contained in the output signal from the data slicer 22, it is in the third state. The multiplexer 2261 becomes a control signal in the third state, and is fed back to the sum of modulo-8 of the adder 2262, delayed by six code intervals by the delay device 2263, and added with the addend of the adder 2262. Become.
This is a modular accumulation process in a portion where a single error is propagated to a running error, and the error is repeated in all six code sections. The post-coding comb filter 22
6 the running error included in the post-coded code decoding result is such that the multiplexer 2261 will not be able to perform the first four code intervals at the beginning of each data segment, as long as the entire data segment includes region synchronization. Shortened when placed in state.

When the control signal is in the first state, the multiplexer 2261 reproduces the output signal ideal code decoding result transmitted from the memory in the controller 28. The result of the ideal code decoding is output to the multiplexer 22.
If the vehicle is guided by the output signal 61, the traveling error is stopped. 4+
Since there are 138 (6) code / data segments, since the ideal code decoding result has each data segment, the ideal code decoding result slips back four code sections at the phase of each data segment to obtain 2 bits. No running errors remain longer than one data segment. The running error is repeated more frequently and the 1
Even though the two inserted trellis codes are doubly affected, the possibility that the period of the running error included in the post-coding comb filter 226 is substantially maintained may depend on the post-coding comb. Less than in the case of the filter 126.

FIG. 11 shows in detail a portion of the digital TV signal receiver of FIGS. 1, 3 or 4 which uses 320 NTSC rejection comb filters 20 and 326 post-coding comb filters 26. The NTS
The C-removal comb filter 320 uses a first delay device 3201 that represents a delay of 1368 code sections, but the delay is substantially the same as that of two horizontal scan lines of the analog TV signal, Filter 326 uses a second delay device 3263 to indicate the delay. The first linear combiner included in the NTSC removal comb filter 320 is a subtractor 3202, and the second linear combiner included in the post-coding comb filter 326 is a modulo-8 adder 3262.

The type 3261 of the multiplexer 261 is controlled by a multiplexer control signal. At this time, NTSC co-channel interference is so insufficient that it is impossible to correct errors contained in the output signal from the data slicer 22. In most cases where it is determined that there is, it is determined that the NTSC co-channel interference is sufficient such that the error contained in the output signal from the data slicer 22 cannot be corrected. In most cases, it will be in the third state. The DTV receiver is preferably equipped with circuitry for detecting changes between intersecting scan lines due to the NTSC co-channel interference, and the controller 28 controls the multiplexer 326 under these conditions.
Holds 1 from being placed in the third state.

The multiplexer 3261 becomes a control signal in the third state, and the modulo-8 of the adder 3262 becomes
, And is delayed by the delay unit 3263 by 1368 code sections to become the addend of the adder 3262. This is a modular accumulation process in a portion where a single error is propagated by a running error, and the error is repeated in all 1368 code sections. Since the length of this code code is longer than the length of a single block of the Reed-Solomon code, a single running error is easily corrected while Reed-Solomon decoding is performed. The running error included in the post-coded code decoding result output from the post-coding comb filter 326 is similar to the four code sections at the beginning of each data segment, and the region synchronization included in each data segment is included. Is shortened by placing the multiplexer 3261 in the first state over the entire section of

When the control signal is in the first state, the multiplexer 3261 reproduces an ideal code decoding result transmitted from the memory of the controller 28 as an output signal. The error running is interrupted by using the ideal code decoding result as an output signal of the multiplexer 3261. N
The 16.67 × 10 −6 second period of the TSC video area is DT
The DTV data segment, including region synchronization, scans the entire NTSC frame image, showing a phase shift for a 24.19 × 10 −6 second period of the V data region. Each NTSC frame image having 684 code sections has 525 lines and has a total of 359 and 100 code sections. This is slightly less than 432 times the 832 code sections included in the DTV data segment including the region synchronization. Includes region synchronization, the multiplexer 3261 reproduces the squirrel code decoding and the data region is lost. Also, a phase shift occurs between the data segment relating to the start code group using the ideal code decoding result and the NTSC video scan line.

359,100 code sections corresponding to 89,775 times the four code sections included in the code start group are measured, which are scanned over 89,775 continuous data segments. Value. One fact that can be inferred from the DTV data area / 313 data segments is that if the duration of the running error is longer than 287, the multiplexer 3261 reproduces the ideal code decoding while the code start group proceeds, and Is lost.

Since the two running error prevention methods are independent of each other, it is rare that the running period of the error becomes longer than 200 or the data area. Additionally, if the degree of NTSC co-channel interference is reduced when the running error is cycled, a condition is formed for the multiplexer 3261 to regenerate the response of the data slicer 22 with the output signal, and the error is determined by another method. Can be corrected faster when using.

FIG. 11 shows an NTSC removal comb filter 32.
Shows an embodiment of blocking the demodulation results derived from the response to the analog TV horizontal sync pulse as well as blocking a large amount of demodulation results derived from the response to the analog TV vertical sync pulse and equalizing the pulses. ing.

The result is co-channel interference with a large amount of energy. The NTSC rejection comb filter 320 blocks colors that are not related to the video contents, except for the scan lines included in the video content of the analog TV signal over two scan line periods. If not blocked by the tracking comb filter included in the code synchronization and equalization circuit 16, the FM audio carrier of the analog TV signal is blocked. Most analog TV hue burst results are also based on the NT
Blocked by SC removal comb filter 320 response. Furthermore, the filtering by the NTSC cancellation comb filter 320 is at right angles to the NTSC interference cancellation performed in a trellis decoding procedure.

FIG. 12 shows in detail a portion of the digital TV signal receiver of FIGS. 1, 3 or 4 which uses 420 NTSC rejection comb filters 20 and 426 post-coding comb filters 26. The NTS
The C-removal comb filter 420 uses a first delay device 4201 which indicates a delay of 179 and 208 code sections. Comb filter 426 uses a second delay device 4261 to indicate the delay. The subtractor 4202 acts as a first linear combiner included in the NTSC removal comb filter 420, and the modulo-8 adder 4262 acts as a second linear combiner included in the post-coding comb filter 426.

The 4261 types of the multiplexer 261 are controlled by a multiplexer control signal. At this time, NTSC co-channel interference is insufficient such that an error contained in an output signal output from the data slicer 22 cannot be corrected. In most cases, it is determined that the NTSC co-channel interference is sufficient such that the error contained in the output signal from the data slicer 22 cannot be corrected. Third in most cases
Will be put in a state. The DTV receiver is provided with a circuit for detecting a change between regions included in the NTSC co-channel interference as much as possible,
The controller 28 suspends the multiplexer 4261 from being placed in the third state under such conditions.

The multiplexer 4261 becomes a control signal in the third state, and is fed back to the sum of modulo-8 of the adder 262.
The adder 4262 is delayed by 79 and 208 code sections.
Is the augend of. This is a modular accumulation process in a portion where a single error propagates to a running error, and the error is repeated in all 179 and 208 code sections. Since the length of this code code is longer than the length of a single block of the Reed-Solomon code, single row errors are easily corrected during Reed-Solomon decoding. The running error included in the post-coded code decoding result output from the post-coding comb filter 426 is the same as the four code periods at the beginning of each data segment, but the region synchronization included in each data segment. Over the entire section of the multiplexer 42
61 is shortened by being placed in the first state.

When the control signal is in the first state, the multiplexer 4261 reproduces an ideal code decoding result transmitted from the memory of the controller 28 as an output signal. The result of the ideal code decoding is used as the output signal of the multiplexer 4261 to interrupt the error running. The maximum value of the data area required to eliminate the running error included in the output signal of the multiplexer 4261 is:
It is substantially the same as the value required to eliminate the running error included in the multiplexer 3261. However, the number of errors repeated in this cycle is
Lower by

The NTSC removal comb filter 42 shown in FIG.
0 blocks all demodulation results generated from the analog TV horizontal sync pulse response, as well as analog TV
FIG. 7 illustrates one embodiment of blocking most demodulation results derived from a vertical sync pulse response. The result is co-channel interference with high energy. The N
The TSC reject comb filter 420 blocks results that originate from within the video of the analog TV signal that are not inter-region or line-to-line changes, and eliminates stop patterns that are not related to those horizontal spatial frequencies or color differences. Also, most of the results of the analog TV color burst are blocked by the response of the NTSC reject comb filter 420.

FIG. 13 shows in detail a portion of the digital TV signal receiver of FIGS. 1, 3 or 4 using 520 NTSC rejection comb filters 20 and 526 postcoding comb filters 26. . The NT
The SC removal comb filter 520 uses a first delay device 5201 which indicates a delay of 718, 200 code sections. Indicates a delay using the second delay device 5261.
The subtractor 5202 is provided with the NTSC removal comb filter 52.
The modulo-8 subtractor 5262 acts as a second linear combiner included in the post-coding comb filter 526.

The 5261 types of the multiplexers 261 are controlled by a multiplexer control signal. At this time, NTSC co-channel interference is insufficient such that errors contained in the output signal from the data slicer 22 cannot be corrected. In most cases where it is determined that there is, it is determined that the NTSC co-channel interference is sufficient such that the error contained in the output signal from the data slicer 22 cannot be corrected. In most cases, it will be in the third state. The DTV receiver should be
The controller 28 includes a circuit for detecting a change between crossed frames included in the NTSC co-channel interference.
61 is put on hold in the third state.

The multiplexer 5261 becomes a control signal in the third state, and the modulo-
8 and the delay device 5263
Delays by 718 and 200 code sections, and
The summand is 62. This is a modular accumulation process in a portion where a single error is propagated to a running error.
The error is repeated in 0 code sections. Since the length of this code code is longer than the length of a single block of the Reed-Solomon code, single running errors are easily corrected during Reed-Solomon decoding. The running error included in the post-coded code decoding result output from the post-coding comb filter 526 may be caused by the region synchronization included in each data segment, as in the four code sections at the beginning of each data segment. Over the entire section of the multiplexer 526
1 is shortened by being placed in the first state.

When the control signal is in the first state, the multiplexer 5261 reproduces an ideal code decoding result transmitted from the memory of the controller 28 as an output signal. The result of the ideal code decoding is used as the output signal of the multiplexer 5261 to suspend the error running. The maximum value of the data area required to eliminate the running error included in the output signal of the multiplexer 5261 is:
It is substantially the same as the value required to eliminate the running error included in the multiplexer 3261. However, the number of errors repeated in this cycle is element 525
Lower by

The NTSC removal comb filter 52 shown in FIG.
0 illustrates one embodiment of blocking all demodulation results derived from the analog TV vertical sync pulse response, as well as blocking all demodulation results derived from the analog TV horizontal sync pulse response. The result is co-channel interference with high energy. In addition, the NTS
The C-removal comb filter 520 blocks results that do not change over two frames and that derive from the video content of the analog TV signal and removes stop patterns that are not related to their spatial frequency or color. Also, all the results of the analog TV color burst are cut off from the response of the NTSC removal comb filter 520.

If the person who is engaged in the field of TV system design, the analog signal which can be used for the design of another type of NTSC elimination filter has different characteristics of correlation and anti-correlation shown in FIGS. 9 and 13. You can know. The use of the two dependent NTSC rejection filters is already known, and the baseband signal of 2N level is converted to (8N-
1) Increased to data level. Despite the disadvantage that such filters have to limit the signal-to-noise ratio due to random noise interference with code decoding, there is a great need in particular to solve the problem of bad co-channel interference.

FIG. 14 illustrates, as described above, the operation of a number of code decoders configured in parallel using respective even-level data slicers according to the prior art.
Fig. 3 shows a modified digital TV signal receiver. At this time, another type of the NTSC removal comb filter is the NTSC removal filter.
Each is a post-coding comb filter that compensates for the previously announced pre-coding to the SC removal comb filter.

The even-number level data slicer A24 has the first
The response of the type NTSC removal filter A20 is converted into a precoded code decoding result for application to the first type of postcoding comb filter A26. The even-level data slicer B24 converts the response of the second type of NTSC removal filter B20 into a precoded code decoding result for application to the second type of post-coding comb filter B26. The even-level data slicer C24 converts the response of the third type of NTSC removal filter C20 into a precoded code decoding result for application to the third type of post-coding comb filter C26. The odd-level data slicer 22 transmits an intermediate code decoding result to the post-coding comb filters A26, B26, and C26. A, B, and C added before the component numbers in FIG. 14 correspond to 1, 2,.
3, 4, and 5 are distinguished from each other.

Code decoding selection circuit 90 in FIG.
Applies the corrected optimal value of code decoding to the trellis decoding circuit 34, selects from the intermediate code decoding results received from the data slicer 22, and selects post-coding comb filters A26, B26, Fig. 9 shows various post-coded code coding results received from C26.
The optimal value of the code decoding result is used in the post-coding filters A16, B26, and C26 for summing and correction.

FIG. 15 is divided into FIG. 16 and FIG. FIG. 16 shows a 3-bit wideband output data bus 800 of the code decoding selection circuit 90 in the data synchronization section.
The circuit for generating the code decoding result by applying the code decoding result is described in detail. The circuit of FIG. 16 is similar to the circuit described in FIG.

FIG. 17 shows in detail a code decoding selection circuit 90 for selecting from the intermediate code decoding result and the various precoded code decoding results. Generates the final code decoding result. NT with DTV signal
The effect of the NTSC rejection filters A20, B20, and C20 for rejecting SC co-channel interference is that the energy of the separated NTSC co-channel interference transmitted to the baseband and separated from the DTV signal results in the NTSC rejection filter A10.
The problem is solved by examining how it is associated with 0, B100, and C100. NTS from DTV signal
The separation of C co-channel interference was considered in FIG.

The low-pass filter 54 responds to the baseband video, but the baseband video simultaneously detected from the NTSC co-channel interference is transmitted to the input signals of the NTSC rejection filters A100, B100, and C100. The NTSC elimination filter A100 is distinguished from the first type NTSC elimination filter A20 in which one of the filters A20 and A100 is an adder and the other is a subtractor and is used as a linear combiner. The reason is that the filter A100 is transmitted to the baseband video, but the filter A20 is included in the DTV signal.
Because the result of the NTSC video carrier transmitted to is not a baseband video carrier.

Similarly, the NTSC elimination filter B100 is a second type of N used as a linear combiner.
The NTSC elimination filter C100 is used as a linear combiner, and the NTSC elimination filter C100 is a third type of NTSC elimination filter C2 used as a linear combination.
It is distinguished from 0. The NTSC removal filter A100,
The response of B100 and C100 is the respective squarer A10
2, squared in B102 and C102 to determine the energy of these responses. The response of the low-pass filter 4 is squared by a squarer 104 to determine energy.

FIG. 17 is a modification of FIG. 8, in which the multiplexer 2611 and the three-phase data buffer 82
Three-phase data buffers 082, A83, B82, C8
Replaced with 2. The three-phase data buffer 082 is used to select an intermediate code decoding result by the data slicer 22 and transmit the result to the 3-bit wideband output data bus 800 of the code decoding selection circuit 90. The three three-phase data buffers A82, B82, and C82 are connected to the respective post-coding comb filters A2.
6, B26, C26, and select the post-coded code decoding result from the data bus 80.
Used to communicate to zero.

Substantially, the NTSC removal filter A10
0, B100, and C100 respond to the low-pass filter 54.
It is determined whether the response energy is less than
Determining one of the three three-phase data buffers A82, B82 and C82 from the phase data buffer 082 is performed when the response of the NOR gate 92 becomes "1".
This is a condition that can provide a low power supply.

Once such a determination is made, the NTS
The response of the C elimination filters A100, B100, C100 will have the minimum energy remaining there, and the three three-phase data buffers 082, A82, B
82 and C82 form a condition that provides a low power supply impedance when the response of the NOR gate 92 is "1". The post-target is to compare the response of the squarers 104, A102 with the comparator 106, compare the responses of the squarers 104, B102 with the comparator 108, compare the responses of the squarers 104, C102 with the comparator 110, The responses of A10 and B102 are compared with the comparator 112, the responses of the squarers A102 and C102 are compared with the comparator 11, and the squarers B102 and C102 are compared.
Is compared with the comparator 112.

Although a NOR gate 118 having three inputs does not respond to any of the comparators 106, 108, 110, the comparator does not respond to the squared signal because the response of the squarer 104 indicates an output signal of "1". Vessels A102, B102, C
Indicates if the response of 102 is exceeded. Otherwise, the output signal of the NOR gate 118 will be "0". An AND gate 120 having two inputs transmits a response "1", but this only occurs if the response of NOR gate 92 is "1" and at the same time the response of NOR gate 118 is "1". It shows the conditions under which the phase data buffer 082 provides low power supply impedance.

The AND gate 122 having three inputs responds to the output signal of "1" when the output of the comparator 106 is "1".
Means that it has less energy and at the same time all the complementary outputs of the comparators 112, 114 are "1"
And the response of the squarer 104 is squared B102, C1
Indicates that it has less energy than 02. Otherwise, the output signal of the AND gate 122 is "0". AND gate 124 with two inputs
Transmits a response "1", but only when the response of the NOR gate 92 is "1" and at the same time the response of the AND gate 122 is "1".
Reference numeral 82 indicates a condition for providing a low power supply impedance.

An AND gate 126 having three inputs responds with an output signal of "1" when the complementary output of the comparator 116 is "1". The response of the squarer B102 corresponds to the response of the squarer C102. No more than the energy of the response,
At the same time, the outputs of the comparators 108 and 112 also become "1", and the response of the squarer B102 is
4, indicating no more than the energy of the A102 response. Otherwise, the output signal of the AND gate 126 will be "0". AND gate 1 with two inputs
28 transmits a response "1", which means that the response of the NOR gate 92 is "1" and the AND gate 126
3 indicates the condition under which the three-phase data buffer B82 provides a low power supply impedance only when the response is "1".

In the AND gate 130 having three inputs, the outputs of the comparators 110, 114 and 116 are all "1".
, A response is made with an output signal of “1”. This is because the response of the squarer C102 is
02 no more than the energy of the response. Otherwise, the output signal of the AND gate 130 is "0".
Becomes An AND gate 132 having two inputs transmits a response "1", which is only present if the response of NOR gate 92 is "1" and the response of AND gate 130 is "1". This shows the conditions under which the data buffer C82 provides low power supply impedance.

Referring again to FIG. 14, the NTSC
The removal comb filter A20 and the post-coding comb filter A26 circuit correspond to the NTSC removal comb filter 520 and the post-coding comb filter 5 shown in FIG.
26 is an improved form. Therefore, this is 718,20
0 codes are assigned to each 2-video frame delay device 5
201, 5263, so memory should be considered in terms of cost. However, the storage location of the 2-video frame delay device 5201 is assigned the storage location required for the co-channel interference detector A44 in FIG. Moreover, a delay device 4201 for delaying a short section in another co-channel interference detector of FIG.
The same memory is used when executing 3201, 2201 and 1201. Also, the 2-video frame delay device 5263 includes delay devices 4263, 3263, and 22.
The necessary storage locations are allocated to 63 and 1263.

All demodulation results having energy generated from the response of the analog TV synchronization pulse, equalization pulse and color burst are blocked when the NTSC removal comb filter A20 additionally combines alternating video frames. Also, results derived from the video content of the analog TV signal, which have not been converted over two frames, are cut off to remove stop patterns that are not related to their spatial frequency or color. When the NTSC removal comb filter A20 combines alternating video frames,
The NTSC rejection comb filter A100 differentially combines these alternating video frames with the squarer A102, which supports a detector that detects changes between the alternating frames included in the NTSC co-channel interference.

The problem of demodulation result blocking to be considered with priority is those demodulation results resulting from the difference between frames at specific pixel points in the analog TV signal image. These demodulation results can be blocked by an internal frame filtering method. The N
The TSC removal comb filter B20 and the post-coding comb filter B26 circuit are selected to block the remaining demodulation results that are subject to horizontal correlation. Let's see how such a design performs better.

If the co-channel acoustic carrier that interferes with the analog TV signal is
In the case where the NTSC removal comb filter B20 and the post-coding comb filter B26 circuit are not blocked by surface acoustics and filtering or an acoustic trap, the NTSC removing comb filter B20 and the post-coding comb filter B26 circuit of this type may be used.
Select the removal comb filter 120 and the post-coding comb filter 126 circuit.

If the acoustic carrier of the co-channel interference analog TV signal is
When blocked by surface acoustics and filtering or acoustic traps, the NTSC removal comb filter B20
The post-coding comb filter B26 circuit selects the NTSC removal comb filter 220 and the post-coating comb filter 226 circuit of FIG. The reason is apart 6
This is because the anti-correlation between video components having 12 code intervals is even more so than the correlation between video components having 12 code intervals apart from each other.

Either select a scan line that is temporally close in the same region, or select a spatially close scan line in the region combined with the current scan line included in the NTSC rejection cutoff filter C20. , The best choice for the NTSC removal comb filter C20 and the post-coding comb filter C26 circuit is simpler. In general, in a jump cart between regions, it is more preferable to select scan lines that are temporally close to each other in the same region in order to reduce NTSC removal by the comb filter C20.

With such a choice, the NTSC removal comb filter C20 and the post-coding comb filter C26 circuit are of a type like the NTSC removal comb filter 320 and the post-coding comb filter 326 circuit of FIG. When the NTSC rejection comb filter C20 additionally combines alternating video scan lines, the NTSC rejection comb filter C100 detects changes between these video alternating scan lines and the alternating scan lines included in the NTSC co-channel interference. Combined with the squarer C102 to assist the detector to perform.

In another alternative, the NTSC-removal comb filter C20 and the post-coding comb filter C26 circuit correspond to the NTSC-removal comb filter 420 and the post-coding comb filter 42 shown in FIG.
It is a type like six circuits. The NTSC removal comb filter C100 and the squarer C102 support a detector for detecting a change between regions included in the NTSC co-channel interference.

The digital receiver device of FIG. 14 is modified for use in the additional parallel data slicing operation of the present invention, and the performance for each is performed by each NT.
The SC removal filter, the even-level data slicer, and the post-coding comb filter are connected in a dependent manner.
Although two additional parallel data slicing operations are shown in FIG. 14, a modification of the parallel data slicing operation continuously optimizes the measurement of the corrected code decoding result.

The above trellis decoder circuit 3
4 can be duplicated to optimize the measurement by comparing the code decoding result with the related results of various code decoding solutions. However, this requires more consideration for digital hardware.

[0129]

As described above through the embodiments of the present invention, the code decoding selection circuit 90 includes a selection circuit for the falling of the code code transmitted from the odd-level data slicer 22, and a first type post. It includes a coding comb filter A26, a second type of post-coding comb filter B26, and a third type of post-coding comb filter C26. If all four code decoding results match, the matched code decoding result is transmitted to the data assembler 30. If the code decoding result is transmitted from the odd-level data slicer 22, the first type of post-coding comb filter A26, the second type of post-coding cutoff filter B26,
The third type of post-coding comb filter C2
6 does not match, and a simple selection procedure is performed with the selection circuit that selects the decoding result with minimal errors.

[0130] More precise code decoding can be obtained more with a selection circuit having a weighted selection procedure. The weight for the selection can be modified by taking the variable of the decoding result, and if the decoding result does not match in most other code decoding circuits, the matching weight is removed in the selection procedure. . FIG.
7 and some additional circuits, the squarer 104, the NTSC rejection comb filter A100 and the squarer A102, the NTS
C removing comb filter B100 and squarer B102, NTSC removing comb filter C100 and squarer C102
The weight of the selection having the inverse relationship with the energy size calculated by the above can be solved.

Digital T used for terrestrial broadcasting in the United States
In the field of digital TV systems applied to V-systems, co-channel interference with analog TV signals of a different standard than NTSC such as the PAL standard emerges. The present invention is a simple design suitable for such co-channel interference and has the effect of being easily deformed.

[Brief description of the drawings]

FIG. 1 illustrates NT before decoding a code according to the present invention.
FIG. 2 is a block diagram of a digital TV signal receiver using a co-channel interference detector that uses an SC cancellation filter, decodes a code, post-codes the cancellation filter, and compares the energy of a baseband.

FIG. 2 is a block diagram of a co-channel interference NTSC signal detector used in the digital TV receiver of FIG. 1;

FIG. 3 shows NT before decoding a code according to the invention.
Using an SC rejection filter, post-code the rejection filter after decoding the code, March 2, 1997 in the United States.
Digital T using the device of application number Atty.Dkt.1500-1 filed on 1st as a co-channel detector
FIG. 3 is a partial block configuration diagram of a V signal receiver.

FIG. 4 shows NT before decoding a code according to the invention.
Using an SC rejection filter, post-code the rejection filter after decoding the code, March 2, 1997 in the United States.
Digital T using the device of application number Atty.Dkt.1500-1 filed on 1st as a co-channel detector
FIG. 3 is a partial block configuration diagram of a V signal receiver.

FIG. 5 is a diagram illustrating a case in which a final code decoding result value selected from the code decoding result values in the data synchronization section and a time period in which the data slicer responds to the received code of the baseband are selected in a different time period. Post-coding responsive to a rejection filter responsive to the received baseband code depending on whether the final code decoding result value or the received baseband code is sufficiently independent of the co-channel interference NTSC signal. FIG. 5 is a block diagram illustrating in detail a part of the digital TV signal receiver of FIG. 1, FIG. 3, or FIG. 4 relating to selection of a final code decoding result value selected from a selected data slicer.

FIG. 6 is a block diagram showing another example of FIG. 5;

FIG. 7 is a block diagram showing another example of FIG. 5;

8 is a block diagram showing in detail a part of the digital TV signal receiver of FIG. 1, FIG. 3, or FIG. 4 for calculating a code decoding result value in the data synchronization section described above.

FIG. 9 is a block diagram showing in detail a part of the digital TV signal receiver of FIG. 1, 3 or 4 when the NTSC removal filter delays a 12-code.

FIG. 10 is a block diagram showing in detail a part of the digital TV signal receiver of FIG. 1, 3 or 4 when the NTSC removal filter delays 6-code.

FIG. 11 is a block diagram showing in detail a part of the digital TV signal receiver of FIG. 1, FIG. 3 or FIG. 4 when the NTSC removal filter delays 2-video-line.

[FIG. 12] The NTSC removal filter is 262-video.
FIG. 5 is a block diagram showing in detail a part of the digital TV signal receiver shown in FIG. 1, 3 or 4 when a line is delayed.

FIG. 13 is a block diagram showing in detail a part of the digital TV signal receiver of FIG. 1, 3 or 4 when the NTSC rejection filter delays 2-video-frames.

FIG. 14 is a block diagram illustrating a digital TV signal receiver using a plurality of NTSC removal filters to perform parallel code decoding.

15 is a combined configuration diagram of FIG. 16 and FIG. 17 showing in detail an appropriate code selection circuit used in a digital TV signal receiver of the type shown in FIG. 14;

FIG. 16 is a block diagram showing in detail a circuit configuration of the digital TV signal receiver of FIG. 14 for calculating a code decoding result value in the data synchronization section described above.

17 is a block diagram showing in detail a circuit configuration of the digital TV signal receiver of FIG. 14 for selecting from code decoding result values obtained in a period of a data synchronization section.

[Explanation of symbols]

8 Receiving Antenna 10 Device Termination 12 Intermediate Frequency Amplifier Chain 14 Complex Demodulator 16 Code Synchronization Circuit and Equalization Circuit 18 Data Synchronization Circuit 20 NTSC Removal Comb Filter 22 Odd Level Data Slicer 24 Even Level Data Slicer 26 Post Coding Comb Filter 28 Control Device 30 data assembler 32 data inserter 34 trellis decoder circuit 36 data inserter 38 byte analysis circuit 40 Reed-Solomon decoder circuit 42 data randomizer 44 co-channel interference NTSC signal detector 46 intermediate frequency amplifier chain 48 complex demodulator 50 Hilbert Conversion filter 52 Linear combiner 54 Low-pass filter 56 Squarer 58 Average circuit 60 Threshold detector 62 Quasi-parallel type NTSC sound signal intermediate frequency amplifier chain Reference Signs List 64 inter carrier detector 66 inter carrier acoustic intermediate frequency amplifier 68 inter carrier amplitude detector 70 average value circuit 72 threshold detector 74, 76, 78 output buffer register ROM 80 3 bit wide band output bus 82 three phase buffer 84 code clock generator 86 Address counter 88 Jam reset circuit 90 Code decoding selection circuit 92 NOR gate 94, 96, 98 Address decoder 104 Squarer 106, 108, 110, 112, 114, 116 Comparator 118 OR gate 120, 122, 124, 126, 128,130,1
32 AND gate 120 NTSC removal comb filter 126 post coding comb filter 181 area segment synchronization detector 182 data segment synchronization detector 201 first delay device 202 first linear combiner 220 NTSC removal comb filter 226 post coding comb filter 260 post coding comb Filter 261 Multiplexer 262 Second linear combiner 263 Second delay device 281 OR gate 320 NTSC-removed comb filter 326 Post-coding comb filter 420 NTSC-removed comb filter 426 Post-coding comb filter 441 Subtractor 442 Squarer 443 Average circuit 444 Threshold Detector 520 NTSC removal comb filter 526 Post coding comb filter Filter 800 Output data bus 1201 First delay device 1202 Subtractor 1261 Multiplexer 1262 Adder 1263 Second delay device 2201 First delay device 2202 Adder 2261 Multiplexer 2262 Subtractor 2263 Second delay device 2600 Post coding comb filter 2611, 2612 Multiplexer 3201 2-Video-Line Delay Device 3202 Adder 3261 Multiplexer 3262 Subtractor 3263 Second Delay Device 4201 First Delay Device 4202 Adder 4261 Multiplexer 4262 Subtractor 4263 Delay Device 5201 First Delay Device 5202 Adder 5261 Multiplexer 5262 Subtractor 5263 Delay device 26101, 26102, 26103 Multiplexer 261001, 261002 261003 Multiplexer A20, 1st type NTSC removal comb filter A24, B24, C24 Even level data slicer A26, B26, C26 Post coding comb filter B20 2nd type NTSC removal comb filter C20 3rd type NTSC removal comb filter A100, B100, C100 NTSC removal comb filter 104, A102, B102, C102 Squarer 082, A82, B82, C82 Three-phase data buffer 106, 108, 110, 112, 114, 116 Comparator 118 OR gate 120, 122, 124, 126, 128, 130,1
32 AND gate reference number F05348A1

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[Procedure amendment]

[Submission date] August 28, 1998 (1998.8.2
8)

[Procedure amendment 1]

[Document name to be amended] Drawing

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[Correction method] Change

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[Procedure amendment 2]

[Document name to be amended] Drawing

[Correction target item name] FIG.

[Correction method] Change

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FIG.

[Procedure amendment 3]

[Document name to be amended] Drawing

[Correction target item name] FIG.

[Correction method] Change

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FIG. 13

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] Explanation of sign

[Correction method] Change

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[Description of Code] 8 Receiving Antenna 10 Device Termination 12 Intermediate Frequency Amplifier Chain 14 Complex Demodulator 16 Code Synchronization Circuit and Equalization Circuit 18 Data Synchronization Circuit 20 NTSC Removal Comb Filter 22 Odd Level Data Slicer 24 Even Level Data Slicer 26 Post Coding comb filter 28 Controller 30 Data assembler 32 Data inserter 34 Trellis decoder circuit 36 Data inserter 38 Byte analysis circuit 40 Reed-Solomon decoder circuit 42 Data randomizer 44 Co-channel interference NTSC signal detector 46 Intermediate frequency amplifier chain 48 Complex demodulator 50 Hilbert transform filter 52 linear combiner 54 low-pass filter 56 squarer 58 average circuit 60 threshold detector 62 quasi-parallel NTSC acoustic signal intermediate frequency Amplifier chain 64 Intercarrier detector 66 Intercarrier acoustic intermediate frequency amplifier 68 Intercarrier amplitude detector 70 Average circuit 72 Threshold detector 74, 76, 78 Output buffer register ROM 80 3-bit wideband output bus 82 3-phase buffer 84 Code Clock generator 86 Address counter 88 Jam reset circuit 90 Code decoding selection circuit 92 NOR gates 94, 96, 98 Address decoder 104 Squarer 106, 108, 110, 112, 114, 116 Comparator 118 OR gate 120, 122, 124, 126,128,130,1
32 AND gate 120 NTSC removal comb filter 126 post coding comb filter 181 area segment synchronization detector 182 data segment synchronization detector 201 first delay device 202 first linear combiner 220 NTSC removal comb filter 226 post coding comb filter 260 post coding comb Filter 261 Multiplexer 262 Second linear combiner 263 Second delay device 281 OR gate 320 NTSC-removed comb filter 326 Post-coding comb filter 420 NTSC-removed comb filter 426 Post-coding comb filter 441 Subtractor 442 Squarer 443 Average circuit 444 Threshold Detector 520 NTSC removal comb filter 526 Post coding comb filter Filter 800 Output data bus 1201 First delay device 1202 Subtractor 1261 Multiplexer 1262 Adder 1263 Second delay device 2201 First delay device 2202 Adder 2261 Multiplexer 2262 Subtractor 2263 Second delay device 2600 Post coding comb filter 2611, 2612 Multiplexer 3201 2-video-line delay device 3202 subtractor 3261 multiplexer 3262 adder 3263 second delay device 4201 first delay device 4202 subtractor 4261 multiplexer 4262 adder 4263 delay device 5201 first delay device 5202 subtractor 5261 multiplexer 5262 adder 5263 Delay device 26101, 26102, 26103 Multiplexer 261001, 261002, 261 03 Multiplexer A20, 1st type NTSC removal comb filter B20 2nd type NTSC removal comb filter C20 3rd type NTSC removal comb filter A24, B24, C24 Even level data slicer A26, B26, C26 Post coding comb filter 082, A82, B82 , C82 Three-phase data buffer A100, B100, C100 NTSC removal comb filter A102, B102, C102 Squarer

Claims (28)

[Claims] 1. A method for code decoding a series of 2N-level codes each having a code section of a fixed time length, wherein said series of 2N-level code streams is based on an artifact component of a co-channel interference analog TV signal. In a method for generating a selected code decoding result, the N is a positive integer, and wherein the (4N-1) level pre-encoded (4N-1) level suppresses an artifact component of the co-channel interference analog TV signal. Comb filtering the series of 2N-level codes to generate a comb filter response having a code, the phase delaying the series of 2N-level codes by a predetermined number of the code sections; Generating a series of 2N-level codes; and Linearly combined to the by any one of a series of 2N- level code addition and subtraction process and (4N-1) first response of the comb filter having a pre-coded code level
A comb filtering step comprising a sub-step for generating a linear combination result value; and a (4N-1) level pre-coded code for generating a pre-coded code decoding result value. Data slicing the response of the comb filter; and delaying the selected code decoding result value by a predetermined number of the code sections to generate a delayed selected code decoding result value. Linearly combining the delayed selected code decoding result value and the precoded code decoding result value to generate a second linear combination result value; and the linear combining step. Is the first
Any one of the addition and subtraction processes used in the sub-step used in the sub-step of linearly combining the series of 2N-level codes and the delayed series of 2N-level codes to generate a linear combination result value. The addition and subtraction processes according to the opposite logic are performed by a modulo calculation method, and a code coding indicating the synchronization data is performed by the series of 2N-codes.
Determining a point in time at which the synchronization data is generated, when the code coding indicating the synchronization data occurs in the series of 2N-level codes, reproducing the synchronization data without error; and indicating the synchronization data. When the code coding occurs in the series of 2N-level codes, the selected code decoding result value matches the synchronization data without error, and the code coding not indicating the synchronization data is performed in the series. Generating the selected code decoding result to coincide with the second linear combination result for at least a selected time when generated in the 2N-level code of. Decoding method. 2. A method for code decoding said series of 2N-level codes to produce a final code decoding result value in which artifact components of the co-channel interfering analog TV signal are automatically suppressed during code decoding. Data slicing a series of 2N-level codes to produce an intermediate code decoding result value, wherein the series of 2N-level codes cause a substantial error in the intermediate code decoding result value. Determining whether there is an artifact component of the co-channel interference analog TV signal of sufficient strength to cause the series of 2N-level codes to cause a substantial error in the intermediate code decoding result. The artifact component of the co-channel interference analog TV signal of sufficient strength Responsive to the decision not to include the intermediate code decoding result value in the final code decoding result value, wherein the series of 2N-level codes causes a substantial error in the intermediate code decoding result value. Causing the final code decoding result value to correspond to the selected code decoding result value in response to a determination that an artifact component of the co-channel interference analog TV signal is of sufficient strength to cause it to occur. The code decoding method according to claim 1, comprising: 3. The method of claim 2, wherein the series of 2N-level codes is code-decoded without the co-channel interference analog TV signal artifact component of sufficient strength to cause a substantial error in the intermediate code decoding result value. Corresponds to a decision that the intermediate code decoding result value is not included in the final code decoding result value only in the selected section that does not indicate that the synchronization data occurs in the series of 2N-level codes. A method of generating a final code decoding result value includes: when code decoding indicates that the synchronization data is generated in the series of 2N-level codes, the final code decoding result value is added to the synchronization data without error. 3. The method as claimed in claim 2, further comprising the steps of: 4. Determining whether the series of 2N-level codes is accompanied by an artifact component of a co-channel interfering analog TV signal of sufficient strength to cause a substantial error in the intermediate code decoding result value. A step of differentially combining the intermediate code decoding result value and the second linear combination result value to generate a difference equal signal, and determining an energy of the difference equal signal. Co-channel interference analog T consisting of sub-stages
Determining whether an artifact component of the V signal is associated, and detecting a case where the energy of the difference signal exceeds a predetermined threshold value; and accordingly, the series of 2N-level codes is used to determine the intermediate code decoding result value. Determining that there is an artifact component of the co-channel interference analog TV signal of sufficient strength to cause a substantial error to occur, and detecting when the energy of the difference signal does not exceed a predetermined threshold. Determining that the series of 2N-level codes is not accompanied by artifact components of the co-channel interference analog TV signal of sufficient strength to cause a substantial error in the intermediate code decoding result value. 4. The method according to claim 3, further comprising the steps of: 5. Determine whether the series of 2N-level codes is accompanied by an artifact component of a co-channel interference analog TV signal of sufficient strength to cause a substantial error in the intermediate code decoding result value. Generating the difference signal by linearly combining the intermediate code decoding result value and the second linear combination result value; and squaring the difference signal to generate a squared difference signal Generating an average value of the squared difference signal, and detecting when the average value exceeds a predetermined threshold, and converting the series of 2N-level codes into the intermediate code. Determining that the decoding result is accompanied by an artifact component of the co-channel interfering analog TV signal of sufficient strength to cause a substantial error in the decoding result; Detecting a case where the filtering response does not exceed the predetermined threshold value and not including an artifact component of the co-channel interference analog TV signal having sufficient strength to cause a substantial error in the intermediate code decoding result. 4. The method according to claim 3, further comprising: determining a final code decoding result value. 6. A digital TV receiver sub-chops the amplified intermediate frequency signal to generate the series of 2N-level codes, wherein the intermediate frequency is generated by frequency-converting a digital TV signal. If so, determine whether the series of 2N-level codes is accompanied by an artifact component of the co-channel interference analog TV signal of sufficient strength to cause a substantial error in the intermediate code decoding result value. Generating an intermediate frequency signal by frequency-converting the digital TV signal; amplifying the intermediate frequency signal and transmitting the amplified intermediate frequency signal as an amplified intermediate frequency signal; Channel interference Simultaneous detection from the video carrier frequency of the analog TV signal and in-phase and quadrature-phase synchronous video in the complex demodulation process. E. Obtaining a detection response; separating a video component element of the co-channel interference analog TV signal from the in-phase and quadrature synchronization video detection response; Determining the energy of the element; detecting when the energy of the separated video component of the co-channel interfering analog TV signal exceeds a predetermined threshold; Determining whether the intermediate code decoding result is accompanied by an artifact component of the co-channel interference analog TV signal of sufficient strength to cause a substantial error in the intermediate code decoding result; Detecting the case where the threshold is not exceeded, the series of 2N-
Determining whether the level code has an artifact component of the co-channel interference analog TV signal of sufficient strength to cause a substantial error in the intermediate code decoding result. 3. The method for generating a final code decoding result value according to claim 2. 7. A digital TV receiver demodulates an amplified intermediate frequency signal to generate the series of 2N-level codes, wherein the intermediate frequency is generated by frequency-converting a digital TV signal. In the case of
Determining whether the N-level code is accompanied by an artifact component of the co-channel interference analog TV signal of sufficient strength to cause a substantial error in the intermediate code decoding result value; Frequency converting to generate an intermediate frequency signal; amplifying the intermediate frequency signal and transmitting the amplified intermediate frequency signal as an amplified intermediate frequency signal including a modulated video and audio carrier of the co-channel interference analog TV signal; Detecting the inter-carrier audio signal, and detecting the co-channel analog TV included in the amplified intermediate frequency signal.
Responsive to heterodyne between the modulated video and audio carriers of the signal; determining energy of the intercarrier audio signal; and wherein the energy of the intercarrier audio signal exceeds the predetermined threshold. When the excess is detected, the series of 2N-
Determining whether the level code has an artifact component of the co-channel interference analog TV signal of sufficient strength to cause a substantial error in the intermediate code decoding result value; Detecting that the energy does not exceed the predetermined threshold, the series of 2N
Determining whether the level code is accompanied by an artifact component of the co-channel interference analog TV signal of sufficient strength to cause a substantial error in said intermediate code decoding result value. The method of generating a final code decoding result value according to claim 2, wherein 8. The sub-step of linearly combining the series of 2N-level codes and the delayed series of 2N-level codes in the comb filtering step is a subtraction process, wherein the code data selected after the delay is selected. The code decoding method according to claim 1, wherein the step of linearly combining the precoded code decoding results having coding results comprises an addition process performed by a modulo-2N calculation method. 9. The code decoding method according to claim 8, wherein the predetermined number of the code sections is 12. 10. The sub-step of linearly combining the series of 2N-level codes and the delayed series of 2N-level codes in the comb filtering step is an addition process, wherein the delayed selected code is used. The code decoding method according to claim 1, wherein the step of linearly combining the precoded code decoding result values having decoding results comprises a subtraction process performed by a modulo-2N calculation method. . 11. The code decoding method according to claim 8, wherein the predetermined number of the code sections is six. 12. The code decoding according to claim 8, wherein the predetermined number of the code sections is substantially the same as a period in which two horizontal scanning lines of the co-channel interference analog TV signal are formed. Method. 13. The code decoding method according to claim 8, wherein the predetermined number of the code sections is substantially the same as a period during which 262 horizontal scanning lines of the co-channel interference analog TV signal are formed. . 14. The code decoding method according to claim 8, wherein the predetermined number of the code sections is substantially the same as a period during which 2-video frames of the co-channel interference analog TV signal are formed. . 15. A digital T supporting a series of 2N-level codes each having a code duration of a fixed time length.
V signal detector, wherein said series of 2N-level code streams are apt to be accompanied by artifact components of co-channel interference analog TV signals, wherein said digital TV signal detector comprises only a predetermined first number of said code sections. A first one of the differentially delayed series of 2N-level codes concatenated to respond to the series of 2N-level codes having a first delayed one-circle 2N-level code to represent a delay; Linearly combining a first delay device for generating a pair and a first pair of said differentially delayed series of 2N-level codes liable to have an artifact component of a co-channel interference analog TV signal; Receiving first and second input signals of a first linear combiner, respectively, and generating a series of first (4N-1) -level codes as an output signal of the first linear combiner. And, the series of the 1 (4N-
1) a level code, a first linear combiner that provides a first comb filter response where co-channel interference artifact components are suppressed; and a decoding of the series of first (4N-1) level codes. A first data slicer provided as a respective output signal from a linear combiner to generate a first precoded code decoding result value; and linearly converting each of the received first and second input signals. Combined and provided as respective output signals, the second
A linear combiner is coupled to the first precoded code decoding result value for receiving the respective first input signals, and one of the first and second linear combiners is connected to an adder. A second linear combiner, wherein the other of the first and second linear combiners is a subtractor; and a second linear combiner that delays each of a predetermined first number of input signals in the code section. A second delay device concatenated to generate the second input signal of; and a data synchronization circuit for determining when a code is used to cause data synchronization to appear in the series of 2N-level codes; A circuit for generating an ideal code decoding result value when using a code to determine the appearance of data synchronization in the series of 2N-level codes; and each output signal as the second input signal. The second
A delay device for receiving the ideal code decoding result value as a first input signal thereof and receiving the output signal of the second linear combiner as another input signal thereof; Forming a condition for reproducing the first input signal with the output signal only when the code is used to cause data synchronization to appear in the series of 2N-level codes; otherwise, the second linear combination A first multiplexer having a number of inputs coupled to form a condition at a minimum selected time for reproducing the output signal of the filter with a first post-coded code decoding result; A digital TV signal detection device, comprising: 16. Decoding the series of 2N-level codes to generate an intermediate code decoding result value and providing it as a second input signal to a first multiplexer, wherein the output signal of the second linear combiner is A second data slicer transmitted as a third input signal to the first multiplexer, wherein the series of 2N-level codes are included in the intermediate code decoding result value generated by the second data slicer. The NTSC co-channel interference detection circuit, which determines whether or not an artifact component of the co-channel interference analog TV signal is involved so that the correction cannot be performed, and the NTSC co-channel interference detection circuit includes the series of 2N signals.
Regenerating its own second input signal when it is determined that the level code is not accompanied by an artifact component of the co-channel interference analog TV signal such that the error included in the intermediate code decoding result cannot be corrected; The NTSC co-channel interference detection circuit determines that the series of 2N-level codes cannot be corrected for errors contained in the intermediate code decoding result, so that the co-channel interference analog TV signal 16. The digital TV signal detection device according to claim 15, further comprising: a first multiplexer that forms a condition for reproducing its own second input signal when it is determined that an artifact component is involved. 17. A method for responding to the series of 2N-level codes having a second delayed 2N-level code to represent a predetermined second number of delays in the code section, A third delay device for generating a second pair of an equally delayed series of 2N-level codes; and a differentially delayed series of 2N-level codes susceptible to artifact components of co-channel interference analog TV signals. Are linearly combined and received as the first and second input signals of the third linear combiner, respectively, and a series of (4N-1) -level codes are coupled to the third linear combiner. Of the second (4)
An N-1) -level code, wherein a third linear combiner providing a second comb filter response where co-channel interference artifact components are suppressed; and a linear combination upon receiving each of the first and second input signals. , Each of which is provided as a subsequent input signal of the second multiplexer, and one of the third and fourth linear combiners becomes an adder, and the first and second linear combiners serve as adders.
A fourth linear combiner, the other of the linear combiners being a subtractor; and decoding the second series of (4N-1) -level codes and providing as respective output signals from the third linear combiner; A third data slicer for generating a second precoded code decoding result value and applying it as the respective first input to the fourth linear combiner; and outputting the output signal of the first multiplexer to the predetermined signal. 17. The digital TV of claim 16, further comprising: a fourth delay device coupled to generate a second input signal of the fourth linear combiner by delaying by a second number of code sections. Signal detection device. 18. The first multiplexer having two inputs, when the condition for reproducing its own first input signal to make it its own output signal is not satisfied, reproduces another one of its own input signal. The combination that becomes the output signal thereof decodes the series of 2N-level codes to generate an intermediate code decoding result value, which is supplied to the first multiplexer as a second input signal thereof And wherein the output signal of the second linear combiner is provided as a third input signal thereof to the first multiplexer, and wherein the series of 2N-level codes are generated by the second data slicer. It is determined whether or not an error included in the intermediate code decoding result value cannot be corrected due to an artifact component of the co-channel interference analog TV signal. An NTSC co-channel interference detection circuit for transmitting each output signal to reproduce each input signal as a final code decoding result value, and receiving the intermediate code decoding result value as a first input signal thereof Receiving said output signal of said first multiplexer as its other input signal, said NTSC co-channel interference detection circuit providing an error in which said series of 2N-level codes are included in said intermediate code decoding result value. The NTSC co-channel interference detection circuit forms a condition for reproducing its own second input signal only when it is determined that it is not accompanied by an artifact component of the co-channel interference analog TV signal so that it cannot be corrected. Is the series of 2N
Regenerating its own second input signal when it is determined that the level code is accompanied by an artifact component of the co-channel interference analog TV signal such that the error included in the intermediate code decoding result value cannot be corrected; 16. A digital TV signal detection device according to claim 15, comprising: a second multiplexer having a number of inputs coupled to said first multiplexer forming a condition for: 19. The digital TV signal detecting apparatus according to claim 15, wherein the first linear combination is a subtractor, and the second linear combination is a modulo-2N adder. 20. The predetermined first number of the code section is 1
20. The digital TV signal detection device according to claim 19, wherein 21. The digital TV signal detecting device according to claim 15, wherein the first linear combiner is an adder, and the second linear combiner is a modulo-2N subtractor. 22. The predetermined first number of the code section is 6
22. The apparatus for measuring an NTSC interference signal in a digital TV receiver according to claim 21, comprising: 23. The predetermined first number of the code sections is substantially equal to 2−2 of the co-channel interference analog TV signal.
20. The digital TV signal detection device according to claim 19, wherein the number of code sections in a horizontal scanning line is the same. 24. The predetermined first number of the code section is 1
20. The digital TV signal detecting device according to claim 19, comprising 368. 25. The method of claim 25, wherein the predetermined first number of code sections is substantially equal to the co-channel interference analog TV signal.
20. The digital TV signal detecting device according to claim 19, wherein the number of code sections in the horizontal scanning line is the same. 26. The predetermined first number of the code section is 1
20. The digital TV signal detecting device according to claim 19, comprising 79 and 208. 27. The predetermined first number of code sections is substantially equal to 2−2 of the co-channel interference analog TV signal.
20. The digital TV signal detection device according to claim 19, wherein the number of code sections in the video frame is the same. 28. The predetermined first number of the code section is 7
20. The digital TV signal detecting device according to claim 19, comprising: 18,200.