TH24960A - A microcontroller with the fewest external components? - Google Patents

Abstract

The invention involved a microcontroller, which may have an appearance to operate without the use of external components.The microcontroller can function in a proper manner using only power and signal cables without the need for external components. The microcontroller has a reset circuit. And internal oscillator integrated with Microcontroller Microcontrollers also have simple external components, such as current limiting resistors. And resistors Pull up and pull down Into the microcontroller To avoid using components Special exterior

Claims (17)

1. A microcontroller capable of operating with a minimal number of external components consists of a combination of: a power supply path connected to the microcontroller's power pin to provide power to the microcontroller; a ground path connected to the microcontroller's ground pin to provide a ground source for the microcontroller; an internal oscillator path to provide a clock signal to the internal components that require this clock signal to function; an internal reset path to send a reset signal to the internal components of the microcontroller when the microcontroller needs to be reset; and an internal resistor path connected to at least one input/output (I/O) pin of the microcontroller to limit the signals sent to and from at least one of the I/O pins and to maintain those signals at the desired level. 2. A microcontroller capable of operating with the fewest possible external components as per claim 1, where such resistor pathways are connected to all I/O pins of the microcontroller. 3. A microcontroller operating with the fewest possible external components according to claim 1, in which such an oscillator path produces an oscillated signal of a predetermined frequency across a series resistor-capacitor (RC) network, ensuring that the oscillated signal oscillates precisely between the first and second voltages produced by the first supply source, the oscillation frequency of which is determined by the time constant of the RC network, consists of: a first comparator circuit with its first input connected to the RC network; a second comparator circuit with its first input connected to the RC network; a flip-flop with its first input connected to the output of the first comparator circuit and its second input connected to the output of the second comparator circuit and its output connected to the RC network; a first voltage modulation path for receiving the first voltage and for supplying a modified version of the first voltage to the second input of the first comparator circuit; and the modified version of the first voltage. This will be equal to the first voltage, adjusted by the voltage difference between this first voltage and the voltage of the oscillation signal when the flip-flop is switched from the first logical level to the second logical level. The second voltage modification path is used to receive the second signal and to supply the modified version of the second voltage to the second input of the second comparator circuit. This modified version of the second voltage will be equal to the second voltage adjusted by the voltage difference between this second voltage and the voltage of the oscillation signal when the flip-flop is switched from the second logical level to the first logical level. 4. A microcontroller capable of operating with the fewest possible external components under claim 3, whereby the first voltage modification pathway consists of a path for sampling the oscillated signal when the flip-flop is switched from the first logic level to the second logic level. 5. A microcontroller capable of operating with the fewest possible external components as per claim 3, whereby the second voltage modification pathway contains a path for sampling the oscillated signal when the flip-flop is switched from the second logic level to the first logic level. 6. A microcontroller capable of operating with the fewest possible external components as per claim 1, where such reset path consists of: a logic gate path for an output signal to reset the internal components of the microcontroller; a safeguard timer path connected to the first input of the logic gate path to send a signal to the logic gate path to reset the microcontroller if the safeguard timer is not cleared before a predetermined time has elapsed; a blowout detector path connected to the second input of the logic gate path to send a signal to the logic gate path to reset the microcontroller when the power supplied to the microcontroller falls below a non-zero minimum threshold and then returns to the applicable operating voltage; and a usable VDD detector path connected to the third input of the logic gate path to send a signal to the logic gate path to keep the microcontroller in reset mode. Until the usable operating voltage is measured, and the oscillator start-up timer path, connected to the fourth input of that logic gate path, sends a signal to that logic gate path to keep the microcontroller in reset mode until at least one predetermined time period has elapsed and a predetermined number of clock pulses have occurred. 7. A microcontroller capable of operating with the minimum number of external components according to claim 1, in which such resistor paths consist of a number of transistor sets connected to at least one I/O pin for changing the resistance strength to limit such signals to and from at least one of the aforementioned I/O pins; a number of logic gate paths in which each logic gate path is connected to each transistor set path for sending a signal to trigger the desired transistor set of a number of transistor sets; a register path connected to each of the aforementioned logic gate paths for storing data with the required resistance strength to limit such signals to and from at least one of the aforementioned I/O pins and for sending a signal to the aforementioned logic gate paths to trigger the desired transistor set of a number of resistor sets; a path connected to at least one of the aforementioned I/O pins and within such microcontroller for maintaining such signals to and from at least one I/O pin at the required level; and an I/O logic path connected to each of the aforementioned logic gate paths. For writing data from at least one of the aforementioned I/O pins, and for reading data from at least one of the aforementioned I/O pins. 8. A microcontroller capable of operating with the minimum number of external components as per claim 7, where such a pathway for maintaining the signal sent to and from at least one of the aforementioned I/O pins at the required level consists of a first inverter whose input is connected to at least one of the aforementioned I/O pins, and a second inverter whose input is connected to the output of the first inverter and whose output is connected to the input of the first inverter. 9. A microcontroller capable of operating with the fewest possible external components under claim 7, where such a pathway for maintaining the signals sent to and from at least one of the aforementioned I/O pins at the required level consists of a PMOS transistor, an NMOS transistor connected to such PMOS transistor, an inverter with an input connected to one of the gates of such PMOS transistor and an output connected to one of the gates of such NMOS transistor, and a memory bit pathway connected to such input of such inverter for storing data for the activation and deactivation of such PMOS and NMOS transistors. 10. A microcontroller capable of operating using the minimum number of external components as per claim 7, where each path of such a transistor series consists of a PMOS transistor and an NMOS transistor connected to such PMOS transistor. 11. A microcontroller capable of operating with the minimum number of external components according to claim 10, in which each path of a number of such logic gate circuits consists of an OR gate with inputs connected to each bit of the register path and inputs connected to the logic I/O path and outputs connected to the PMOS transistor; an inverter with inputs connected to each bit of the register path; and an AND gate with inputs connected to the output of the inverter and inputs connected to the logic I/O path and outputs connected to the NMOS transistor. 12. A microcontroller capable of operating with the minimum number of external components as defined in claim 7, where such I/O logic paths consist of: a data bus path for sending data to and from one or more of the aforementioned I/O pins; an I/O control latch path connected to such data bus path for sending signals to set one or more of the aforementioned I/O pins as input pins and for sending signals to set one or more of the aforementioned I/O pins as output pins; an output data latch path connected to such data bus path for providing a clock signal for data from such data bus path to be written from one or more of the aforementioned I/O pins when one or more of the aforementioned I/O pins are configured as output pins; and an ANT gate path with an output connected to at least one of the aforementioned I/O pins and an input connected to a read open signal for sending a signal to one or more of the aforementioned I/O pins to send data that has been input to one or more of the aforementioned I/O pins to such data bus path when one or more of the aforementioned I/O pins are configured as input pins. 13. A microcontroller capable of operating with the fewest external components consists of a combination of power supply paths connected to the microcontroller's power pin to provide power to the microcontroller; a ground path connected to the microcontroller's ground pin to provide a ground source for the microcontroller; and an internal oscillator path to provide a clock signal to the internal components of the microcontroller that require this clock signal to function. This oscillator path produces an oscillator signal of a predetermined frequency across a series resistor-capacitor (RC) network, ensuring that the oscillator signal oscillates precisely between the first and second voltages produced by the first source. The oscillation frequency is determined by the time constant of the RC network. The RC network comprises a first comparator circuit with its first input connected to the network, a second comparator circuit with its first input connected to the network, and a flip-flop with its first input connected to the output of the circuit. Compare the first comparator circuit and the second input connected to the output of the second comparator circuit and the output connected to the RC network. The first voltage modification path receives the first voltage and supplies a modified version of the first voltage to the second input of the first comparator circuit. This modified version of the first voltage is equal to the first voltage adjusted by the voltage difference between the first voltage and the oscillation signal voltage when the flip-flop is switched from the first logical level to the second logical level. The second voltage modification path receives the second voltage and supplies a modified version of the second voltage to the second input of the second comparator circuit. This modified version of the second voltage is equal to the second voltage adjusted by the voltage difference between the second voltage and the oscillation signal voltage when the flip-flop is switched from the second logical level to the first logical level. The internal reset path of the microcontroller is used to send a reset signal to the internal components of the microcontroller when the microcontroller needs to be reset. This reset path consists of: a logic gate path for outputting a signal to reset the internal components of the microcontroller; a caretaker timer connected to the input of the logic gate path to send a signal to the logic gate path to reset the microcontroller if the caretaker timer is not cleared before a predetermined time has elapsed; a blowout detector path connected to the input of the logic gate path to send a signal to the logic gate path to reset the microcontroller when the power supplied to the microcontroller falls below a non-zero minimum threshold and then returns to the usable operating voltage; a usable VDD detector path connected to the input of the logic gate path to send a signal to the logic gate path to keep the microcontroller in reset mode until the usable operating voltage is measured; and an oscillator start-up timer path connected to the input of the logic gate path. These are used to send signals to the gate paths to keep the microcontroller in reset mode until at least one predetermined time period has elapsed and a predetermined number of clock pulses have occurred. Resistor paths within the microcontroller, connected to each I/O pin, limit the signals sent to and from each I/O pin and maintain those signals at the desired level. These resistor paths consist of several transistor circuit paths connected to at least one I/O pin to vary the resistance strength to limit the signals sent to and from at least one I/O pin. Each transistor circuit consists of a PMOS transistor and an NMOS transistor connected to the PMOS transistor. Several gate paths are used, each connected to a transistor circuit path, to send a signal to trigger the desired transistor circuit. Each gate path consists of... An OR gate with inputs connected to each bit of the aforementioned register path, and inputs connected to the aforementioned logic I/O path, and an output connected to the aforementioned PMOS transistor; an inverter with inputs connected to each bit of the aforementioned register path; and an AND gate with inputs connected to the output of the aforementioned inverter, and inputs connected to the aforementioned logic I/O path, and an output connected to the aforementioned NMOS transistor. Register paths connected to each path of several of the aforementioned logic gate circuits for storing data with the required resistance strength to limit the signal sent to and from at least one I/O pin, and for sending signals to several of the aforementioned logic gate circuits to activate the required set of transistors of several of the aforementioned resistor sets. Paths connected to at least one of the aforementioned I/O pins and within the aforementioned microcontroller for maintaining the signal sent to and from at least one of the aforementioned I/O pins at the required level; and logic I/O paths connected to each path of several of the aforementioned logic gate circuits for writing data from at least one I/O pin. And for reading data from at least one of the aforementioned I/O pins, the aforementioned I/O logic path consists of: a data bus path for sending data to and from at least one of the aforementioned I/O pins; an I/O control latch path connected to the aforementioned data bus path for sending signals to set at least one of the aforementioned I/O pins as input pins and for sending signals to set at least one of the aforementioned I/O pins as output pins; an output data latch path connected to the aforementioned data bus path for providing an input clock signal from the aforementioned data bus path to be written from at least one of the aforementioned I/O pins when at least one of the aforementioned I/O pins is configured as an output pin; and an AND gate path with an output connected to at least one of the aforementioned I/O pins and an input connected to a read-open signal for providing a signal to at least one of the aforementioned I/O pins to send input data to at least one of the aforementioned I/O pins via the aforementioned data bus path when at least one of the aforementioned I/O pins is configured as an input pin. 14. A microcontroller capable of operating with minimal external components as per claim 13, whereby the first voltage modification pathway comprises a path for sampling the oscillated signal when the flip-flop is switched from the first logic level to the second logic level. 15. A microcontroller capable of operating with the fewest possible external components as per claim 13, whereby a second voltage modification pathway contains a path for sampling the oscillated signal when the flip-flop is switched from the second logic level to the first logic level. 16. A microcontroller capable of operating with the minimum number of external components as per claim 13, where such a pathway for maintaining the signal sent to and from at least one of the aforementioned I/O pins at the required level consists of a first inverter with inputs connected to at least one of the aforementioned I/O pins, a second inverter with inputs connected to the outputs of the first inverter and outputs connected to those inputs, and the first inverter. 17. A microcontroller capable of operating with the fewest possible external components under claim 13, where such a pathway for maintaining the signals sent to and from at least one of the following I/O pins at the required level consists of a PMOS transistor, an NMOS transistor connected to such PMOS transistor, an inverter with an input connected to one gate of such PMOS transistor and an output connected to one gate of such NMOS transistor, and a memory bit pathway connected to such input of such inverter for storing data for the activation and deactivation of such PMOS and NMOS transistors.