SU985963A1 - Device for automatic determining error coefficient - Google Patents

Description

(5) DEVICE FOR AUTOMATIC DEFINITION OF ERROR COEFFICIENT

The invention relates to telecommunications and can be used in particular in determining the reliability of the transmission of discrete information. A device for determining the reliability of information transmission over communication channels is known, which contains in each of four channels a time selector, counting decades of pulses and a coincidence circuit, the timing channel comprising a frequency generator and a frequency divider, in addition, there are two control triggers , multivibrator, two keys and two buttons Start and Reset ClJ. The disadvantage of this device is the complexity of the measurement process and the processing of measurement results. When any counter is overflowed, the chronology counter is blocked, and the direct reading of the error rate is impossible, because the measurement result must be calculated by division, i.e. auxiliary operation that requires either the presence of a built-in computer, or the efforts of the operator. If the timing counter overflows, the last decades of the error counters may not be filled, which leads to a decrease in the corresponding number of orders of measurement accuracy. Increasing the accuracy due to the measurement by the operator of the measurement time in any case slows down the acquisition due to unsuccessful measurement attempts, and the operator’s actions are effective only with a steady flow of errors when their order does not change from session to, measurement session. Closest to the present invention, there is a device for automatically determining the error rate containing a time counter, the outputs of which are connected to the installation inputs of the latching triggers and the first overflow trigger, the inputs

the reset of which is combined, and the outputs are connected to the inputs of the display unit, the other inputs of which are connected to the first output of the main error counter, the second output of which is connected to the setup input of the second overflow trigger, the reset input of which is connected to the reset inputs of the time counter and the main error counter, and the output of the second an overflow trigger through the OR element is connected to the first input of the first And element, as well as the second and third And elements, the first inputs of which are combined by f2J.

However, in this device, when measuring a large error rate, it is not provided with a direct reading, and an additional division operation is also required using an additional calculator or operator calculation. In all other cases (when measuring smaller error rates), the accuracy and measurement are not ensured, since the last decades of the error counter remain empty. It follows from this that this device without additional calculations provides an accurate measurement only within one order of the error rate. Thus, the disadvantage of this device is also lack of accuracy and efficiency (speed) of measurement.

The purpose of the invention is to improve the measurement accuracy by increasing the range of detectable error factors, as well as reducing the measurement time.

To achieve the goal of the device for automatically determining the error rate, contains a time counter, the outputs of which are connected to the installation inputs of the locking triggers and the first overflow trigger, the reset inputs of which are combined, and the outputs are connected to the inputs of the display unit, the other inputs of which are connected to the first output of the main counter errors, the second output of which is connected to the setup input of the second overflow trigger, the reset input of which is connected to the reset inputs of the time counter and the main error calculator, the output of the second overflow trigger through the OR element is connected to the first input of the first element AND, as well as the second and third elements AND, the first inputs of which are combined, entered a parity check unit, an additional error counter, additional trigger, one-shot, key and two differentiating element, while the inputs of the parity check unit are connected to the outputs of the latching flip-flops and the first overflow trigger, and the output through the first differentiating element is connected to the second input of the first element nta And, the output of which is connected to the reset input of the additional trigger and through a serially connected one-shot, the key and the second differentiating element are connected to the reset inputs of the main and additional error counters, the time counter, the fixing three | - ger, the first and second overflow triggers and the setup input additional trigger, the inputs of the time counter and the main error counter are connected respectively to the outputs of the second and third elements AND, the first inputs of which are connected to the output of the additional Yelnia trigger, and the second input signals are input, the output of the first flip-flop overflow connected to the other input of the OR gate, the additional error counter input connected to the output of the main error counter, and an output connected to an additional input of the indication unit.

FIG. 1 shows the structural electrical circuit of the device; in fig. 2 - time diagrams of his work.

Claims (2)

The device for automatically determining the error rate contains a time counter 1 connected to the installation inputs of the locking triggers 2.1-2. and overflow trigger 3, the outputs of triggers 2 and 3 are connected to the display unit j and to the inputs of the parity checker 5, the output of which is connected through the differentiating element 6 i to the first input of the first element And 7. The output of the main error counter 8 is connected to the input of the additional counter 9 errors and to the installation input of the second trigger 10 overflow, and counters 8 and 9 are connected to the display unit. The output of the trigger 10 through the element or 11 is connected to the second input of the first element I 7, the output of which is connected to the reset input of the additional trigger 12, as well as through a serially connected single vibrator 13, key I and the second differentiating element 15 connected to the reset inputs of counters 1, 8 and 9, triggers 2, 3, and 10 and the set-up input of trigger 12, with the output of trigger 12 connected to the combined inputs of the second 16 and third 17 elements And, Through the element 16, the input bus 18 of clock pulses is connected to the input of the counter 1 time, and through the element AND The 17 input of the main counter 8 errors is connected with the input bus 13 of the measured error pulses, and the Start signal is applied to the key I. The device operates as follows. The bus 18 receives the clock frequency pulses (Fig 2a), as well as the bus 19 receives the measured error pulses (Fig 26). In the initial state, all the counters and triggers are in the zero state, except for the trigger 12, which is in unit state, opening the signal from its output (Fig. 2c) elements AND 16, AND, 17. So, the output pulses from the output of element 16 (fig. 2d) are fed to the input of time counter 1, at the outputs of the decade of which pulses appear divided by frequency (fig. 2e). At the first impulses, at the outputs of the decades, the locking triggers 2 are reset, fixing the beginning of the filling of the decades (Fig. 2e), and according to the pulse at the output of the last decade, the counter resets the overflow trigger 3 of the time counter (Fig. 2g). At the moment of switching the next fixing trigger 2, the signal at the output of control unit 5 of the emissivity (Fig. 2h) changes, and a pulse appears at the output of differentiating element 6 (Fig. 2nd). Through the open element 17, an error signal (Fig. 2k) passes to the input of counter 8, at the output of which, when overflowed, pulses appear (Fig. 2L), which begin to fill the counter 9, and the first pulse triggers trigger 10 (Fig. 2m) by opening element 17. And the first impulse from the output of differential 36 of the element 6 passes to the output of element 7 (fig. 2i), launching the one-shot 13 (fig, 2o) and resetting the trigger 12 to the zero state (fig. 2c ), as a result of which the elements And 16, And 17 are closed, disconnecting from the input tires 18 and 19 counters 1, 8 and 9. I fix them with standing The indicated state of the counters 8 and 9 corresponds to the number of errors recorded, and the indicated state of the latching triggers indicates the order of the result, thus providing a direct reading of the error rate. The considered operation mode corresponds to the case when the error counter 8 overflows before the time counter 1 overflows. When the time counter 1 overflows (Fig. 2d), the trigger 3 (Fig. 2g) is triggered before the pulse at the output of the counter 8 is triggered, and the trigger 10 is triggered. In this case, the And 7 element is opened by the OR 11 element by the trigger output signal 3 and the pulse from the output of the differentiating element 6 (Fig. 2i) will also switch the trigt ger.12 and start the one-shot 13. The single-vibrator 13 generates a pulse (Fig. 2o), after which the differentiating element 15 generates a pulse (Fig. 2n), which returns the device to the initial state, after which the measurement cycle is repeated newly. The duration of the pulse generated by the one-shot 13f determines the time for displaying the measurement results. If necessary, the uncertainty of a longer indication time impulse to the input of differentiating element 15 can be supplied from an external device, for example, from the Start button. The proposed device has a constant accuracy regardless of the order of the measured error rate, since the measurement time depends on the filling of the error counter 8 with a constant capacity determined by the required number of displayed characters. With a stationary fairly uniform flow of errors, the additional counter 9 must contain one decade. Having another one or two decades allows you to measure the rate of unevenly occurring errors. The number of decades for a count of 1 time must be greater than the sum of the hours of the decades of the counter 8 errors and the largest order of the measured error rate (determined by practical expediency). The measurement result is displayed in decimal form without. additional recalculation, since the measurement is completed after filling in the corresponding decade of the time counter. Apparatus of the Invention A device for automatically detecting the error rate containing a time counter, the outputs of which are connected to the installation inputs of the latching flip-flops and the first overflow trigger, the reset inputs of which are combined, and the outputs are connected to the inputs of the display unit, the other inputs of which are connected to the first output of the main c4et4HKa errors, the second output of which is connected to the installation input of the second overflow trigger, the reset input of which is connected to the reset inputs of the time counter and the main counter and errors, moreover, the output of the second overflow trigger through the OR element is connected to the first input of the first AND element, as well as the second and third. AND elements, the first inputs of which are combined, so that increase the accuracy of measurement while increasing the range of detectable error coefficients; parity check blanks, an additional error counter, an additional trigger, a single-vibrator, a key and two differentiating elements are added to it, while the inputs of the parity check block are connected to the outputs of the locking triggers and the first overflow trigger, and the output through the first differentiating element is connected to the second input of the first element I, the output of which is connected to the reset input of the additional trigger and through the serially connected one-vibrator, the key and the second differentiating element connected to the reset inputs of the main and additional error counters, a time counter, latching triggers, first and second overflow triggers and to the setup input of an additional trigger, time counter and main error counter inputs connected respectively to the outputs of the second and third elements And, the first inputs of which are connected to the output of the additional trigger, and the second inputs are input signals, and the output of the first trigger is red. The field is connected to another input of the OR element, the input of the additional error counter is connected to the output of the main error counter, and the output is connected to the additional input of the display unit. Sources of information taken into account in the examination 1. USSR author's certificate number 233737, cl. H About L 1/08, 1Eb7. 2, USSR Author's Certificate No. 518009, cl. H 0 L 11/08, 197 (prototype), F / 2.f / Lll / 7 / r shzh 1 / F 1 / F; / J w 3E Hedgehog is -o fe / r  t I (I M I I I I I I I I I I M I I I I I I t I f I I I r IIII J one I t} M I I I lit f I t t I I / T. 1 11 II 1 M I I I I M I I I II I I I I 1