SU983702A2 - Staged commutation medium cell - Google Patents

Description

(54) CELL CASCADE COMMUTATING ENVIRONMENT

The invention relates to automation and computing and can be used in realizing technical means of parallel information processing. According to the main author. St. No. 842781, a well known cell of a cascade switching medium, which contains Y input blocks, includes three AND-NOT elements and a group of AND elements, two AND-NOT elements, a group of OR elements, a register, and a C 13 comparison circuit. The disadvantage of the known device is that It cannot be used in the construction of vector and matrix systems that differ in the broadcast mode. This mode is characterized by the fact that one source of messages transmits information simultaneously to multiple receivers. The aim of the invention is to expand the scope by providing a message transfer mode from one information source to a plurality of information receivers. The goal is achieved by the fact that the cell of the cascade switching medium additionally contains the elements NOT, AND, AND-NOT and OR, and additionally, in each input cell of the cell, a fourth AND-NOT element is entered, the output of which is connected to the third additional input of the second AND-NOT element this input cell block, the output of which is connected to the first input of the fourth AND-NOT element of this input cell block, the second input of which is connected to the input of the first additional HE element, the output of which is connected to the output of the HE element, the input of which pogo connected to the output of the first additional element And, the first input of which is connected to; the output of the second element AND-NOT (1) whose input is connected to the output of the additional electric amp & ment OR, and, (AND + 2), and the input of the second element AND-NOT connected to the second input

I3,083

the first output element AND and the output of the additional element IS-IE, the first input of which is connected via the second additional element NOT with the output of the comparison circuit and the first inputs of the second one. element AND and additional element OR, and the second -. the input of the additional element AND is NOT connected to the second inputs of the second additional element AND and the additional element OR and the control output of the group of one of the elements OR, the output of the second additional element AND is connected to the input of the first additional element NOT.

The drawing shows the functional scheme of the cell.

The cell contains input blocks l.-l with tires 2, -2УУ, input search potentials, tires 3-3 control and tires

 4 outputs of the potential of the gap, the element AND-NOT 5 with tires 6, -6j of the search potential, the element of AND-NOT 7, the inputs connected to the tires y, the input of the emission potentials, and the output to one of the inputs of the element 9; another input of which is connected to the output of the element AND-NOT 1O and (VI + 1) input of the element AND-NOT 7. In addition, the cell contains a group of elements OR 11 whose outputs are connected to buses 12 .- 12 | - output cell code and to one of the inputs of the comparison circuit 13, the other inputs of which are connected to the register 14, the output is connected to the inputs of the AND 15, OR 16 elements and the NOT 17 element to the input of the AND-10 element, the other input of which is connected to the input of the OR 16 element controlling the output 18 of the group of elements OR 11 and the other input of the element AND 15, the element NOT 19, the output of which through nt NOT 20 is connected to the output of AND gate 15 and the NOT element 19 pod.klyuchen input to output of the first AND element 9.

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Each input block 1 contains an element IS-NOT 21, one of the inputs of which is connected to the bus 2 of the search potential input, the other input to the bus 3 controls, and another input connected to the output of the element HE 19, element IS-NOT 22, one from the inputs of which is connected to the output of the element AND-NOT 21, and the output is connected to one of the inputs of the element AND-NOT 23, the other input of which is connected to the output of the element AND-NOT 7, and the output is connected to the input of the element AND-NOT 22 of the same input block and bus 4 output allocation potential, element AND-NOT 24,

one of the inputs of which is connected by the i: Biii input of element 22, the other input is connected to the output of element AND 15, and the output is connected to the other of the inputs of element IS-NOT 22 of the same input block. The output of the element AND-NOT 21 of each input unit is connected to the corresponding input of the element AND-NOT 5 and to the other inputs of the elements AND-NOT 21 of the remaining input units. In addition, each input block contains an AND 25 group of elements, the control inputs of which are connected to the output of the NAND element 22, the information inputs are connected to the cell code input 26 buses 26, and the outputs are connected to the corresponding inputs of the OR 11 element group.

A cell can operate in the pair exchange mode — one transmitter and one message receiver are involved in the exchange, and in the broadcast mode — one transmitter and a plurality of message receivers participate in the exchange.

The setting of the cell operation mode is carried out by setting the control flag 18 to the zero or one state. In this case, the zero state of the control bus corresponds to the first mode, and the single state corresponds to the second mode. The control bus is included in the cell entry buses 26 and its status is determined by the processor that is connected to the message transmitter cell.

Let the cell in question be connected by one of the input blocks to the source message processor. The latch stage starts from the moment when a zero potential comparison appears at the output of circuit 13, which through the element OR 16 enters the (AND + 1) th input of the AND-NE element 7 and then, in the form of a single potential, enters one of the inputs of the element And 9. To the other input of this element is received a single potential. the output of the element AND NOT 1O, since one of its inputs receives the zero potential from the control bus 18, which sets the pair exchange mode. Thus, at the output of the element 9, a potential blocking cell is formed, which through the element NOT 19 enters all input blocks and isolates the long cell from the system during the action of the potential of the gap (exchange time).

The main difference of the cell in question is that it has an additional mode of operation - the broadcast mode. This mode is set by the source processor, messages, by setting the control bus to one. Consider the work of cells that are adjacent to the source cell of messages and enter into the set of cells that are involved in receiving messages from a single source. All cells that are included in a plurality of message receiving cells are initially marked with a non-zero code, which is recorded in register -14. This operation can be performed as in manual mode (by turning on the corresponding toggle switches setting the initial state of regis-rule 14) as well as automatically since it assumes that the registers of 14 all cells are programmatically accessible. . The process of installing a switching tree with a base in the source cell of messages by time is equivalent to one stage - the search stage. Indeed, on this search in the cell system, a tree is formed with non-interlacing vets and the base in the cell of the message source. The problem is to form the communication channel tree only on the set of labeled cells. For this, the processor in the base of the tree forms on the tires 26 the tag code sets the mode bus 18 to. This state forms the search potential on the pin 2. Under. the action of the search potential includes one of the input blocks and the tag code from the output of a group of elements AND 25 through a group of elements OR 11 enters comparison circuit 13, then to exit 12-12 (cells. If the cell is included in a set of message receiving cells, the output the comparison circuit appears zero potential, which, inverting by the element NOT 17, goes to one of the inputs of the element AND-NOT 10, to the other input - the unit potential from the bus 18 of the mode control Zero potential from the output of the element AND-NOT 10 . enters the (p) +2) input element AND-NOT 7, etc. Inverted by it, it already comes in the form of a single potential to the inputs of the AND-NE elements of 23 of all input blocks. An input unit connected to the search potential broadcasts the potential of the output to the output of the element IS-HE 23, where it is inverted and transmitted along busbar 4 to an adjacent cell. The presence of zero potential distribution in the adjacent cell on one of; inputs 8d-8y, indicates that this output of the first control leads to the chopper, which is in a lot of receiving cells. If the cell in question is not included in the set of message receiving cells, a single potential is formed at the output of the comparison circuit 13. In this case, at the output of the element And 15 form-. A single potential is applied which is fed to the inputs of the NAND elements of the 24 of all input blocks. The only input unit that is connected to the search potential transmits a single potential from the output of the element 15 to the control input of the group of valves 25, while all the input blocks are blocked by the zero potential from the output of the element HE 2O and thus the further propagation of the search stops. through this cell because this cell is not included in the communication channel tree. Broadcast mode can be used to simultaneously receive messages from a variety of labeled source cells into a single receiving cell located in the root of the switch tree. In this case, the highest, shortest, direction in each cell of the tree is indicated by the connected input unit. The new functional capabilities of the cell, which consist in the fact that it can operate in the mode of broadcasting (parallel exchange), make it possible to expand the field of application of the latter and, in particular, to use it in constructing matrix or vector computing systems. The main effect of this cell is that while preserving the positive qualities of the known device, additional elements and links are introduced into the cell, which allow it to be used in the parallel information exchange mode, creating a randomly selected cell with an arbitrarily set set of system cells. This significantly increases system performance, while productivity growth is proportional to the number of cells participating in the exchange. In addition, the structure of a parallel computing system built on the basis of a given cell is manageable, i.e., the cell will make it possible to organize an arbitrary structure of the computing system, and the number of cells (modules) of the system can also be preliminarily changed in existing commands.

This makes it possible in this way to organize a computing system so that its structure would correspond to the computing process implemented in it. Such a realization of the structural model of the computational process significantly increases the efficiency of the computing system. invention formula

YachvSha cascade switching environment by author. St. Ms 842781, about a tl. And with the fact that, in order to expand the scope of application by providing a secure mode of transmitting a message from one source of information to multiple receivers of information, the cell further contains the elements NOT, AND, AND- NOT and OR, and in each, the input cell block is additionally entered the fourth AND-NOT element, the output of which is connected to the third additional input of the second AND element of this input cell block, the output of which is connected to the first input of the fourth AND-HB element of this input block cells, second cat entrance is connected to the input of the puller additional element NOT, the output of which is connected to the output of the element NOT whose input is connected to the output of the first additional element AND whose first input is connected to the output of the second element AND –NE (1st + 1) -th input which is connected to the output of the additional element OR, and (1 / JO +2) -th input of the second element AND-NOT connected to the second input of the first additional element AND and the output of the additional element AND-NOT, the first input of which is connected through the second additional element NOT to output of the circuit and the first inputs of the second additional element AND and the additional element OR, and the second input of the additional element AND-NOT is connected to the second inputs of the second additional element AND and the additional element OR and the control output of the groups: PY one of the elements OR, the output of the second additional element AND connected to the input of the first additional element NOT.

Sources of information taken into account in the examination

1. USSR author's certificate No. 842781, cl. G06F 7/00, 1980 (prototype).

Claims (1)

claims of the cell cascade switching medium according to ed. St. No. 842781, characterized in that, in order to expand the scope by providing a> 15 transmission mode for transmitting a message from one information source to a plurality of information receivers, the cell additionally contains elements NOT, AND, AND-NOT and OR, and each . the input block of the cell 20 is additionally introduced the fourth AND-NOT element, the output of which is connected to the third additional input of the second AND-NOT element of the given input block of the cell, vy. the course of which is connected to the first input 25 of the fourth AND element of this input unit, the second input of which is connected to the input of the first additional element NOT, the output of which is connected to the output of the element NOT, the input of which is connected to the output of the first additional element AND, the first input of which connected to the output of the second element AND-NOT (Ift + 1) -th input of which is connected to the output of the additional OR element, and (+2) -th input of the second element AND — NOT connected ^ with the second input of the first— <additional element AND and the output of the additional element AND NOT, the first input of which is connected through the second additional element NOT to the output of the comparison circuit and the first inputs of the second additional element AND and the additional element OR, and the second the input of the additional AND element is NOT connected to the second inputs of the second additional AND element and the additional OR element and the control output of the group of one of the OR elements, the output of the second additional AND element is connected to the input m of the first additional element is NOT.