SU980069A1 - Regulating device - Google Patents

Description

(54) REGULATORY DEVICE

The invention relates to automation and can be used to build control systems with technical objects, the characteristics of which control channels change only slightly; and the structural and static properties of uncontrolled perturbations undergo significant changes over time.

A known regulator comprising a first comparison unit connected in series, a low frequency filter, a proportional-integral unit (controller), a second comparison unit, a model of the control object and the first adder, the output of which is connected to the input of the first comparison unit, are sequentially connected extrapolator and unit delay, the extrapolator input is connected to the output of a proportional-integral block, the output of the delay block with the input of the second comparator block, a measured signal is fed to one of the inputs of the adder the co-ordinated coordinate, the predetermined signal is fed to one of the inputs of the first comparison unit, the output of the extrapolator is the output of the regulator t1.

The disadvantage of this controller lies in the low control accuracy due to the fact that the structural and static properties of uncontrolled disturbances change, and the structure and parameters of the controller remain unchanged, chosen in orientation to certain properties of disturbances

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The closest in technical essence to the present invention is a device containing the first K of the second object model, the outputs connected respectively to the first

15 inputs of the first and second adders, low frequency filters, the first input and the output of the first low frequency filter are connected respectively to the output of the first comparison unit and.

20 to the first input of the first controller, the first inputs of the second and third LOW frequency filters are connected via the first and second quadrants respectively to the outputs of the second and third comparison blocks, and the outputs to the first and second inputs of the third adder, the first input of the fourth low-pass filter is connected to the output the fourth unit is compared; the output of the first controller is connected to the first input of the fifth comparator unit; the first input of the sixth comparison unit is connected through the second controller to the output of the fourth low-frequency filter, and the outputs of the fifth and sixth blocks are connected to the first inputs of the first and second models of the object, the second inputs of the first and second summers are connected to the first input of the device, the output of the first adder to the first inputs of the first and second comparison blocks, and the output of the second adder - to the first inputs of the third and fourth comparison blocks, the second inputs of the first, second, third and fourth comparison blocks are connected to the second input of the device, the first and second inputs of the third adder are connected respectively to the second The first inputs of the first and second division blocks, the output with the second inputs of the first and second division blocks, the first and second multiplication blocks, the first inputs of which are connected respectively to the outputs of the first and second division blocks, the second inputs with the first inputs of the sixth and fifth blocks comparison, and outputs - with the first and second inputs of the fourth adder, the output of which is connected to the second inputs of the fifth and sixth blocks of comparison 2. The disadvantage of this regulating device lies in the low control accuracy due to those That in inefficient operation of a circuit simulation is reduced quality control in all regulator. A poor operation of one of the circuits can be caused, for example, by abrupt changes in uncontrolled disturbances, which can lead to undesirable changes in the mode of operation of one of the model control loops. The purpose of the invention is to improve the accuracy of the device. This goal is achieved by the fact that the first and second relays, the first and second keys, the first and second scaling blocks, the reference block and the seventh and eighth comparison blocks, the first inputs connected to the reference block, the second inputs are entered into the control device. the outputs of the second and first dividing units, the output of the second low-pass filter is connected via the first scaling unit to the first input of the first key, the output of which is connected to the second input of the third low-pass filter, the output of the latter is connected through The second scaling unit with the first input of the second key, the output of which is connected to the second input of the second low-pass filter, the output of the seventh comparison block is connected through the first relay to the second inputs of the first object model, the first low-pass filter, the first controller and the second key and the output of the eighth comparison unit is connected via a second relay to the second inputs of the second object model, the fourth low-pass filter and the first key. The drawing shows a functional diagram of the proposed regulatory device. The device contains the first adder 1, the first block 2 comparison, the first low-frequency filter 3 containing the compare block 4, the saturation amplifier 5, the integrator 6, the first regulator 7 containing 1 scaler blocks 8 and 9, the integrator 10 and the adder 11, the second block 12 comparisons. The first object model 13 contains a delay block 14, a compare block 15, a scaling block 16 and an integrator 17, a third compare block 18, a first quad 19, a second low-pass filter 20 containing a comparison block 21, a saturation amplifier 22, and an integrator 23, the first division unit 24, the first multiplication unit 25, the first relay 26, the fourth comparison unit 27, the first scaling unit 28, the first key 29, the task block 30, the second adder 31, the third adder 32, the second relay 33, the fifth comparison unit 34, second key 35, second scaling unit 36, sixth comparison unit 37 , a second quad 38, a third low-pass filter 39 containing a comparison block 40, a saturation amplifier 41, and an integrator 42, a second dividing block 43, a second multiplication block 44, a fourth adder 45, a seventh comparison block 46, a fourth low-frequency filter 47 containing a block 48 comparisons, saturation amplifier 49 and integrator 50, second controller 51, eighth comparison block 52. The second object model 53 contains a block 54 of delay, a block 55 of comparison, a scaling block 56, an integrator 57, a measured output signal of the control object (coordinate is adjustable at time t Y (t), a given signal (reference to adjustable coordinate) Y (t) , the output signals of the first and second model control loops, respectively) and Yl (t), the natural control signal U (t), the control signals of the first and second model control loops U (t) and ui (t), respectively. The device works as follows. In the first model control loop, consisting of the first sum of matrix 1, the first comparison block 2 of the first low frequency filter 3, the first regulator 7, the fifth comparison block 34, and the first model 13 of the object, a signal of the first prayer control U is generated ( t). For this, the OUTPUT signal Y (t) of the control object in the first adder 1 is summed with the output signal of the first model 13 of the control object. As a result, at the output of the first adder 1, the output signal of the first model control loop is obtained. The signal Y (t) is fed to the first comparison unit 2, where the given signal Y (t) is subtracted from it. The received control error signal is fed to the first low-pass filter 3, which is designed to suppress the high-frequency component of the signal, which improves the accuracy of its further conversion. The first low-pass filter 3 works as follows. The adjustment error signal from the output of the first comparison unit 2 is compared with the output signal of the integrator b in the comparison unit 4. The resulting signal is amplified in saturation amplifier 5 and accumulated in integrator b. Saturation enhancer 5 eliminates individual large changes (outliers) in the control error signal. The integrator output b is a low pass filter stroke 3. From the output of the integrator 6, a signal on the smoothed value of the regulation error is fed to the first controller 7, for example, with the proportional-integral law of regulation, r U t; -f; pAYtt) a (t) dlt,,. where kp, ki and ti are the adjustment parameters of the controller ;. AY (t) -smootted error value is adjusted at the moment of time. The first regulator 7 is implemented / for example, using a scaler of a block 8, connected in series to the scaling unit 9, the integrator 10 and the adder 11, the second input of which is connected through the scaling unit 8 to the first filter 3 low frequency. The first controller 7 operates as follows. The smoothed value of the regulation error u (t) is multiplied by scaling blocks 9 and 8 by the corresponding coefficients k and kp. Next, the signal from the output of the scaling unit 9 is integrated in the integrator IG and summed with the output signal of the scaling unit 8 in the fifth adder 11. At the output of the fifth adder, a signal is received on the control of the first model circuit U (t). The signal U (t.) About the natural control action on the difference signal is subtracted from the U (t) signal in the ptcm comparison unit 34 to the input of the first model 13 of the control object with the transfer function, for example, W (P) where K - object transfer coefficient; T and t are timed. The difference signal 0 (t) and U (t) is delayed in block 14 of the delay of the first object model 13 by time, further compared with the output signal of integrator 17 in block 15 of comparison, multiplied by the coefficient K in scaling block 16 and accumulated in integrator 17. The output of integrator 17 is the output of the first object model 13. Thus, the output signal is determined by the expression Y (t) YCt) W (P)). U (tn, which uses natural output Y (t) and control U (t) signals and the model of the control object. In a similar way a second model circuit made up of a second adder 31, a fourth comparison unit 27, a fourth low frequency filter 47, a second controller 51, for example with a proportional control law, six comparison unit 37 and a second object model 53. This circuit is compared with the first model circuit has faster speed This is because the proportional controller is implemented. The fourth low-pass filter 47 is also faster. To evaluate the effectiveness of the model control loops in the second comparison unit 12, the given signal Y (t) is subtracted from the output signal Y (t) of the first model control loop The signal of the control error received is squared in the first quad 19 and fed to the input of the second low-pass filter 20 to get an estimate of the current value of the control error dispersion D (t). The second low-pass filter 20 operates similarly to the first low-pass filter 3. . .

It is also possible to evaluate the current variance (t) of the control error of the second model control loop using the third comparison unit 18, the second quadrant 38 and the third low-frequency filter 39.

Based on the control signals U (t), Ui (t) and the variances Di (t), D- (t) of the control errors of the first and second model control loops, a natural control action U (t) is produced, in particular by weighted summation U - (t) and ui, (t). For this, weighting factors are preliminarily calculated. This is done as follows.

The inputs of the third adder 32 receives signals about D; (t) and D (t) from the outputs of the second and third filters 20 and 39 of low frequency. The signal of the sum received is applied to the outputs of the first and second blocks 24 and 43 of the division. To the input of the first block

24 divisions, the signal about D (t) is also given, and the input of the second dividing unit 43 is D- (t). At the output of the first dividing unit 24 a signal is received about the weighting factor ci3 (t) under the control action U (ti, and at the output of the second dividing unit 43 (weighting factor) with the control action Ul (t).

the signal o6- (t) from the output of the second dividing unit 43 is supplied to one of the inputs of the second multiplication unit 44 - to another input which receives a signal about U (t) from the output of the first regulator 7. To the input of the first unit

The multiplies are multiplied oLU (t) signals from the first division unit 24 and u (t) from the second controller 51. The output signals of the first and second units

25 and 44 multiplications are summed in the fourth adder 45 and as a result, a signal of natural control is obtained

(jcU - df (i:) - u (t} + d- (),

,,

The signal of the nat ural control action U (t) is applied to the inputs of the pth and sixth blocks .34 and 37 of the comparison and to the object of regulation.

With the inefficient operation of one of the CONTOURS, when d (t). or .oi (t) is less than a predetermined value of about equal, in particular 0.2 it is necessary to improve the quality of regulation to change the mode of operation inefficiently

operating model control loop. For this, the signals about the weight coefficients dL (t) of their ot- (t) from the outputs of the first and second blocks 24 and 43 divisions are compared in the seventh and eighth blocks 46 and 52 of the comparison, respectively, with the specified value oL. If, for example, otU (t) is less than a specified value, then from the output of the second relay 33, the signal 0 is fed to the second inputs of the integrate. tori 50 and 57, respectively, of the fourth low frequency filter 47 and the second object model 53. As a result, further integration of beginning-5s from a given initial value of the signal, for example, zero. The signal from the output of the second relay 33 is supplied to the first key 29 and the value oMt) is multiplied by the specified coefficient 0. A client, for example 1.5 in the first scaling unit 28, enters the integrator 42 of the third low-pass filter 39 as a predetermined initial signal value. Thus, the second model circuit starts working with new initial conditions corresponding to the natural control mode. Similarly, if) is less than cL, then the signal of the first resolution 26 changes to the basic conditions of the integrators 6, 10 and 17, respectively, of the first low-pass filter 3, the first regulator 7 and the first object model 13. 5 The output signal of the first relay 26 causes the second key 35 to close and the signal D-i (t) multiplied, for example, by a factor of 1.5 in the second scaling unit 36, is fed as an initial value to the integrator 23 of the second low-pass filter 20.

As a result, new inequalities were introduced into the inefficiently operating circuit; which eliminates the effects of negative control actions.

The use of the proposed invention makes it possible to increase the accuracy of the reproduction of a task by changing the modes in inefficiently operating model control loops. The simulation results show that with significantly non-stationary uncontrolled disturbances, especially with their abrupt changes, the use of the proposed controller improves the accuracy of the task reproduction on average by 5% due to a change in the operating modes of the 0 model contours.

Claims (2)

1. Authors ’certificate of the USSR for the application 2877791 / 18-24, cl. G 05 B 13/02. 2. USSR author's certificate on application 2961396 / 18-24, cl. G 05 13/02, (prototype).