SU948368A1 - Apparatus for converting rr-intervals of electrocardiogram to code - Google Patents

Description

The invention relates to medical technology, namely to diagnostic cardiology equipment, and can be used to measure heart rate.

A device for converting RR-intervals of an electrocardiogram into a code comprising a sensor, a time-voltage shaper-converter, a generator, a threshold circuit, a register, and an analog-to-digital converter t is known.

More perfect is the device for converting an RR-interval of an electrocardiogram into a code that contains a sensor, an amplifier, an English-digital converter, a pulse counter, a register.

A disadvantage of the known device is the additional measurement error of the RR-intervals, caused by the insufficient accuracy of extracting the maximum of the R-wave by using threshold analog circuits in the design of the device.

The aim of the invention is to improve the accuracy of measuring the magnitude of RR intervals.

The goal is achieved by the fact that

The RR-intervals of the electrocardiogram in the code containing a series-connected sensor, amplifier and analog-digital converter and pulse counter, the counting input of which is connected to the clock frequency bus, and the output to the information input of the first register, are connected in series the first circuit

10 comparisons, trigger, formation circuit, delay element and second register, as well as shift register, second comparison circuit, and adder, T1 with the first input of the first circuit

15 comparisons are connected to the shift register gate, the second input is connected to the analog-to-digital converter output and the shift register information input, and the second output is connected to

20, by moving the register of the shift register and to the second trigger input, the output of the formation circuit is connected to the input of the pulse counter installation and the recording input of the first register, the inputs 25 of the adder are connected to the output of the first and second registers, and the output to the information input of the second register, the first input The second comparison circuit is connected to the output of the pulse counter and the information input of the first register, the second input to the constant bus, and the output to the input of the second register to the zero state and to the shift input to the right of the shift re Istria.

The drawing shows a block diagram of a device for converting R-intervals of an electrocardiogram.

The device contains an electrocardiogram sensor 1 (ECS), an amplifier 2, an analog-digital converter 3, comparison circuits 4 and 5, shift register 6. trigger 7 / formation circuit 8, pulse counter 9, registers 10 and 11, adder 12 and delay element 13 . Moreover, the sensor, amplifier and analog-to-digital converter are connected sequentially, the counting input of counter 9 is connected to the clock frequency bus, and the output is connected to the information input of the first register 10. The first input of the first comparison circuit 4 is connected to the output of the shift register 6, and the second input is connected to the output of the analog-digital converter 3 and the information input of the shift register 6. the first output of the first comparison circuit 4 is connected by the first installation input of the trigger 7, and its second output is connected to the input of the recording of the shift register bis second m tri1gera adjusting input. The output of the trigger 7 through the formation circuit 8 is serially connected to the input of setting the counter to zero, the recording output of the first register 10 and through the delay element 13 to the recording input of the second register 11. The inputs of the adder 12 are connected to the outputs of the first and second registers 10 and, 11, and the output is. The information input of the second register 11. The first input of the second comparison circuit 5 is connected to the output of the counter 9, its second input is connected to the bus of constants, and its output is connected to the input of the second register to zero of the second register 11 and the shift input to the right of the shift register 6

The device works as follows.

From sensor 1 to the input of amplifier 2, a cardio signal is received, from the output of amplifier 2, the amplified signal is fed to the input of converter 3, to which the signal is sampled by time and level. From the output of converter 3, the module of codes for the selection of the signal Nj. followed by the sign of the sample, is fed simultaneously to the input of schema 4 comparisons and the information input of the shift register b. The code of discrete selections of signals N) is recorded by the signal produced by the comparison circuit 4 and the input to the recording of the shift register 6 and the input of the zero setting of trigger 7, if the condition is fulfilled

Claims (2)

“The maximum value of one of the leading samples written to the shift register b according to the above condition. The write signal to the shift register b can be switched by the signal sampling sign, which allows the selection of a maximum of signals of its positive or negative region. If the current value of the sample N is less than the value of the content of the shift register b mA "cr corresponds to the bending function at the local maximum point of the signal, the comparison circuit 4 outputs the trigger set signal 7 in unity, to state At time until the next local maximum. The impulse generated by the circuit 8 from the front of the plant into the unit state of the trigger 7, i.e. at the moment of local maximum, sets to zero. counter 9, writes to .register 10, and through delay element 13, equal to the summation time of adder 12 - writes n to register 11. At the counting input of counter 9, the clock frequency fj with pulse period determined by the specified accuracy of the measurement of the time RR interval. From the output of counter 9, the current code values, generated in the interval between two consecutive reset pulses from circuit 8, are fed to the first input of the comparison circuit 5 and the register 10, in which codes are written at the same time as the counter 3 is reset. written to register 10 is summed on adder 12 with the value of the code stored on register 11 and each represents the sum of the codes corresponding to the time intervals between local masses of Iyami, and again converted to the amount for is written to register 11. The second input of the second comparison circuit 5 receives a constant, the code value of which is determined by the minimum possible value of the RR interval (about 0.3 s). Upon reaching the current value of the counter code 9 of the constant value, the comparison circuit 5 selects a reset signal for register 11 and a right shift for one bit of the max: x maximum code selected during the time between two consecutive shift pulses, and thus sets the threshold / equal to half of the selected maximum , in the shift register bf that allows you to select maxima in the next RR-interval, lying only above this threshold. The value of the processing or registration value of the scanned: processing or registration is removed from the register 11 at the time the signal is extracted by the comparison circuit 5. Thus, the introduction of two comparison schemes, the shift register, the trigger, the driver, the delay element, the second register and the adder, and the corresponding connections made it possible to increase the accuracy of measuring the RR interval value by accurately determining the R-wave maximum, as well as by introducing selections in duration and amplitude. The invention of the device for converting an RR-interval of an electrocardiogram into a code containing a series-connected sensor, amplifier, and analog-to-digital converter and an impulse counter, the counting input of which is connected to the clock frequency bus, and the output to the information input of the first register, characterized by that, in order to improve the accuracy of measuring the magnitude of the RR intervals, the sequentially connected first comparison circuit, trigger, formation circuit, delay element, and second register, as well as a main register, a second circuit and an adder, the first input of the first comparison circuit connected to the output of the shift register, the second input to the output of the analog-digital converter and the information input of the shift register, and the second output to the input of the shift register and the second the trigger input, the output of the shaping plug is connected to the input of the pulse counter installation and the recording input of the first register, the inputs of the adder are connected to the outputs of the first and second registers, and the output is connected to the information input of the second register tra, the first input of the second comparator connected to the output of the counter pulses and informgschionnomu input of the first register, a second vhodk constants bus, and an output - to the input of the installation of the second register to the zero state and to an input of shift right shift register. Sources of information taken into account in the examination 1.ABTopcicoe certificate of the USSR 464304, cl. A 61 B 5/02, 1971. 2. USSR author's certificate 563162, cl. A 61 B 5/02, 1976 (prototype).