SU936436A1 - Phase lock circuit - Google Patents

Description

one

The invention relates to a radar detector and can be used in demo tupors and following filters.

A device of a phase self-tuned frequency with a manipulation removal circuit is known, the error signal of which has a saw-tooth shape in the beat mode fl.

A disadvantage of this device is the narrow capture band.

The closest to the invention is a phase locked loop device containing serially connected (} low frequency band, tunable signal source, a phase detector with a sawtooth characteristic, the second input of which is the input of a phase locked loop device, differential mounting, rectifier and driver pulse expander (2).

However, this phase locked loop device does not have a wide enough capture band.

determined by the insignificant value of the constant voltage at the output of the low-pass filter, the proportional value of the frequency detuning.

The purpose of the invention is the expansion of the capture band.

This goal is achieved by including a phase locked loop containing a low-pass filter connected in series, a tunable signal source, a phase detector with a sawtooth characteristic, the second input of which is the input of a phase locked loop, a differentiating target, a rectifier, and a driver. pulse expander, between the output of the phase detector with a saw-tooth characteristic and the input of the low-pass filter, a serially connected switch is introduced that controls the course of which is connected to the output of the shaper р с шир shir - the body of pulses, and the element

The higher frequency filter is implemented in the form of serially connected DC power amplifiers and an Rc filter.

On fng. 1 shows the urn pattern of the proposed device; in fig. 2 (a-e) iZ () shows diagrams explaining his work.

A phase locked loop device contains a source 1, a phase detector 2 with a sawtooth characteristic, a key 3, a memory element 4, a filter

5 low frequencies, consisting of amplifiers of direct current voltage 6 and a PC filter 7 / differentiating circuit 8, compare 9, driver-expander 10 pulses, delay line 11.

The device works as follows.

The error signal from the output of the phase detector 2 to the inputs of which is fed in is input (the reference signal and the other from the source 1 is fed through the key 3, the memory element 4 and the filter 5 consisting of a series-connected amplifier

6 and RC filter 7, to control the input of source 1, by changing its frequency.

In the case of a detuning of the output signal of source 1 relative to the input signal (reference signal, at the output of phase detector 2, depending on the sign of the detuning, a symmetrical ramp-like linearly increasing (Fig. 2a) or linearly falling (Fig. 3 s | ) voltage. At the moment of rapid transition of the saw-tooth voltage from plus to minus and vice versa, pulses (Fig. 25 and 35 are driven by the rectifier 9 (Fig. 2B and 3 B) at the output of the differentiating center 8) are expanded by duration in the formative expander 1 O impulse Bits (figs, 2 g and 3 t) enter the utflashonty input key 3, the latter is opened for the duration of the extended pulse. In memory element 4, the voltage level present at its input at the moment prior to the expansion of key 3 is remembered. This level is kept constant up to the end of the output pulse of the formlator, expand 10 pulses, after which the key 3 is closed and the voltage at the output of the memory element 4 abruptly changes to the level of the corresponding

its input voltage (Fig. 2 E and 3d). Thus, at the output of the Pam5gy element 4, there is an asymmetric voltage containing a constant component with a polarity corresponding to the detuning sign in frequency between the frequencies of the input (reference) signal and the source 1 signal. Filter 5 consisting of series-connected amplifier 6 and The Rc filter 7, from the output of the memory element 4, the constant component is selected, which is applied. to the control input of source 1 and changes the frequency of the latter until the ring enters synchronization, and then the usual mechanism for tracking the ring of the phase-controlled frequency acts.

To compensate for the delay arising in the differential circuit 8, rec. The interlayer 9 and the expander 1O may be inserted into the device by a delay element 11, as shown by the dotted line in FIG. one.

Comparing the signals at the input of the filter 5 (Fig. 2a and 3 3) for the proposed device and the known one (Fig. 3e), it follows that the device has one or more offsets, in the proposed device, the constant component is larger than the known one, and therefore , more and capture bar.

Expansion of the capture band makes it possible to effectively use a preparatory device in the following filters with a permissible frequency instability of the input signal 2 to 4 times (depending on the filter parameters) greater than the known.

Claims (2)

1. A phase locked loop device containing a low-pass filter connected in series, a tunable signal source, a phase detector with a sawtooth characteristic, the second input of which is an input of a phase locked loop device, a differential circuit, a driver and an EHeader-extender, and an expander of a different tuner, and a different driver, a phantom converter and an expander EHeader, and a phased-in detector, a different driver and a phantom extender, an EHeader, and a phantom circuit, a different driver and an expander EHeader, and an expander, a different frequency converter, a driver and an expander, an EHeader, and an expander, a different frequency converter, a driver and an expander EHeader, and an expander, which has a different signal that, with the aim of expanding the bandwidth, the phase output of the phase tsetektor with a sawtooth karakrististika and the filter input of the private parts were introduced in series A key, the control input of which is connected to the output of the chip, expand it to nyTibcoB, and the memory element. 2. The device according to claim 1, clause 1, and the fact that the filter of frequency frequencies is implemented in the form of a series of constant current and series A-BFG. Sources of information that are taken into account in the examination of 93 6 l.Von KDeeo, /. Pc phH43 Die eittdki -ip (referenztraqfepct-beeUunqc cles piioieenmoolenis ig dos deuisclte TrMA-S-tem S 340-SSO B 5 m if -igit G. and. fanfGfKXoe certificate CXXP No. 678 ЗЗО, cl. Н 03 В 3 / OS 1О.О2, ТТ upvi47iiUt)