SU930635A1 - Pulse-length discriminator - Google Patents

Description

one

The invention relates to a pulse technique and is intended for the selection of pulses whose duration is more or less than a specified value. It can be used in automation devices, telemechanics, computer technology in order to control pulse parameters by duration, for example, in blocks of real-time control computer complexes.

Known pulse selector in duration, containing the integrator and the threshold element.

The integrator consists of a key connected by a control input to the input of the selector, a charging current generator connected to the working input of the key, and an integrating capacitor connected to the output of the key. The input of the threshold elemeiga is connected to the integrating capacitor, and the output is connected to the output of the selector.

Known selector works as follows.

When applying a controlled pulse to the input of the selector, i.e. to the control input of the key, the latter connects the charge current generator to the integrating capacitor for the duration of the input pulse duration. The charge of the integrating capacitor occurs, during which the voltage across it increases. The specified time with which the duration of the input pulses is compared is 10 with the time during which the voltage is; The effect on the integrating capacitor rises to the threshold of the threshold element. If during the duration of the input pulse the voltage is

If the IS capacitor does not exceed the trigger level of the threshold element, the latter does not work, and (at its output, i.e., at the output of the selector, there is no pulse.

20

Thus, the pulses, the duration of which is less than a specified time, at the output of the selector is not; are. If in time (the duration of the input pulse, the voltage on a remote capacitor exceeds the threshold triggering level, the latter triggers, and a pulse appears at the output of the selector, indicating that the duration of the input pulse is greater than the specified one. As soon as E-pulse, regardless of its duration ends, the key turns off the charge generator from the integrating capacitor, which is discharged. At the end of the discharge of the integrating capacitor, the selector is ready to control the next pulse i. However, the functionality of the izveshenoy device is low — it does not select pulses that are shorter than the specified duration, does not allow the selection of pulses in the MOM time interval, the closest in technical essence to the invention, is the pulse selector by duration, which contains an integrator and a threshold element , as well as the NAND element and the comparator. The integrator input is connected to the selector input, and the output is connected to the input of the threshold element, the output of which is connected to the first output village torus sigyalizi ruyuschemu of applying the input pulse whose duration bslshe predetermined value. The comparator's inverse is connected to the selector input, the non-inverted input is connected to the integrator's output, and the output is connected to the installation input of the AND-NOT element, which prohibits the input from being connected to the output of the threshold element, and the output to the CS, to the output of the selector that signals the supply an input pulse whose duration is less than the specified value. This selector works as follows. .. When a controlled pulse is applied to the selector input, i.e. the integrator is charged by the integrating capacitor, during which the voltage across it (linearly increases. The specified time with which the duration of the input pulses is compared is a fixed value and is determined in the same way as in the selector described earlier. If during the duration of the input pulse the voltage on the integrating capacitor does not exceed the triggering level of the threshold element, the last one does not work at its output AND there is no pulse at the inhibiting input of the IS-NOT element. A pulse appears on the second output of the selector, signaling that the duration of the input pulse is shorter than the specified one. If during the duration of the input pulse the voltage on the integrating capacitor exceeds the triggering level of the threshold element, then the first output of the selector has a pulse that signals that the duration of the input pulse is longer than the specified one. At the same time, the output pulse of the threshold element is fed to the prohibitive input I of the NAND element, prohibiting the passage of pulses from the output of the computer ratora to the second output of the selector 2. This pulse selector by duration does not allow the selection of pulses in an adjustable interval of durations. The purpose of the image {Teteni is to expand the functionality by selecting pulses in an adjustable interval of durations. This goal is achieved by the fact that, in a pulse selector, of a duration, containing a comparator, the output of which is connected to the first output bus of the device, and a non-inverting comparator input through an integrator connected to the input bus of the device, and an element. NAND, the output of which is connected to the second output length of the device, introduced an additional comparator and the first and second sources of adjustable voltage, the outputs of each of which are connected / respectively to the inverting inputs of the comparator and the additional comparator, the non-inverting input of which is connected to the output of the integrator, and Exo The entered comparator is connected to the first input of the NAND element, the second input of which is connected to the input device. FIG. 1 of the design of the device; in fig. 2 - time diagrams that show his work. The pulse selector includes an integrator 1, a comparator 2, the first and second sources of adjustable voltage 3 and 4, an additional comparator 5, and an IS-NOT element 6. The selector of pulses has an input bus 7 and the first and second output buses 8 and 9. The integrator 1 consists of an inverter 10, the input of which is connected to the input bus 7 of the device, and the output through a resistor 11 to the integrating capacitor 12, and the inverter 13 with an open collector output, the input of which is connected to the input bus 7 of the device, and the output to the integrating terminal the capacitor 12. The inverting inputs of the compuffers 2 and 5 are connected to the outputs of sources of adjustable voltage 3 and 4, respectively, and the non-inverting inputs to the output of the integrator 1. The output of comparator 2 is the first output bus 8 of the device. The output of the comparator 5 is connected to the first (prohibiting) input of the element AND-NOT 6, the second input of which is connected to the input bus 7 of the device, and the output to the second output bus 9 of the device.

Adjustable voltage sources 3 consist of a series-connected inverter 14 and a voltage divider

It consists of a resistor 15 and a potentiometer 16. The middle point of the divider is connected to the slider of the potentiometer 16 and is the output of the source of adjustable tension 3. The source of adjustable voltage 4 is similar to "1 source of adjustable voltage 3 (not shown in the diagram).

The device works as follows.

During the action of the input impulse supplied to the input bus 7 of the device (Fig. 2a), an integration of the capacitor 12 occurs (Fig. 26). The voltage across the integrating capacitor 12 is increasing. At the same time, the comparison of the voltage across the integrating capacitor 12 and the reference voltages produced by the adjustable voltage sources 3 and 4 at the respective comparators 2 and 5 takes place. At the end of the input pulse, the integrating capacitor 12 is almost instantly discharged through the open output transistor of the inverter 13.

The level of the reference voltage (Fig. 26) is set by a source of adjustable voltage: 1 to 4 equal to the voltage on the integrating capacitor 12 accumulated during the time T of the input pulse, and corresponds to the lower selection threshold. The level of the reference voltage u2 (fig. 2) is set by the source of adjustable voltage 3 equal to the voltage on the integrating capacitor accumulated during the time T of the input pulse, and corresponds to the upper selection threshold.

The feed to the input bus 7 of the input pulse, the duration of which is less than T. 2), the voltage on the integrating capacitor 12 grows to a value less than U, at the output of the comparator 5 there does not appear a resolving impulse and on. an output bus 9 of the device forms a pulse at the front of the input signal, signaling that the duration of the input pulse T is less than the specified duration X ((Fig. 2e).

When a pulse is applied, the duration of which T corresponds to the inequality T T - c T2 (Fig. 2b), the voltage on the integrating capacitor 12 rises to a value greater than and, but less than U 2;

At the output of the comparator 5 at the moment of time equal to T (Fig. 2z) t there is a pulse, prohibiting the output by the element H – NE 6 of the output pulse. At the output, Comparator 3 also fails to match the pulse.

 No impulses at the weekend

tires 8 and 9 indicate that the duration of the input pulse is within acceptable limits.

When the input pulse, the duration of which is greater than T (Fig. 2),

the voltage across the solenoid capacitor 12 rises to veltetyn greater than 1G. At the output of the comparator 5 at the time of time equal to T, the pulse (Fig. 22.) prohibits the issue

element AND NOT 6 output pulse. At the output of comparator 2 at a point in time equal to the impuse & c (Fig. 2e), indicating that the duration of the input pulse is longer

given.

The proposed pulse selector can be used to control the pulses produced by the clock generator.

a real-time block of an auxiliary computing complex. A selector signal, corresponding to the deviation of the duration of the synchronizing pulse from the permissible value, introduces a backup block of register time.

The deviation of synchronizing pulses beyond the permissible {values in duration leads to the failure of the controlling computing complex, which operates in real time, which in turn causes 9PS to execute the acquisition and processing programs of information and control. .

Irreversible processes may occur in control objects. Therefore, the use of the proposed pulse selector in terms of duration as a control circuit of synchronizing pulses allows increasing the reliability of the operation of the whole complex.

Claims (2)

1. Author's certificate NO 307507, cl. H 03 K 5/153, 1971. 2. USSR author's certificate number 584432, cl. H-03 K 5/19, 1977 (prototype). Fy9.1 Ul wl rL  t .-one TT FIG. 2