SU926651A1 - Digital device for computing sine-cosine functions - Google Patents

Description

sine, the second output of which through the first shift register is connected to the second input of the third totalizer, the first input of which is connected to the first output of the cosine register, the second output of which through the second shift register is connected to the second input of the second totalizer-subtractor. The output of the second adder-subtractor is connected to the input of the register of sines, and the output of the third adder-subtractor is connected to the first input of the register of cosines. The output of the driver of the reference signal through the element OR is connected to the second input of the register of the angle code, and the first output of the register of sines is connected to the second input of the register of cosines. The specified device has a higher accuracy compared with the known device. This increase in accuracy is achieved by reducing the speed in comparison with device 1 by two times, since in the prototype, the Rotation of vector 2 is performed twice. The disadvantage of the prototype is low speed. The purpose of the invention is to improve speed. The goal is achieved due to the fact that a digital device for calculating sine-cosine functions contains an angle code register, a sine register, a cosine register, two shifters, three summators, an iteration counter, a memory block and a synchronization unit whose outputs are connected to clock inputs of registers, with the register of the angle code register connected to the first input of the first adder-subtractor, the output of which is connected to the first input of the register of the corner code, the first input of the second adder-subtractor is connected to the first the sine register, the second output of which through the first shifter is connected to the first input of the third adder-subtractor, the second input of which is connected to the first output of the register of cosines, the second output of which through the second shifter is connected to the second input of the second adder-subtractor, the output of the second adder-subtractor is connected to the first input of the sine register, the output of the third adder-subtractor is connected to the first input of the register of cosines, the output of the iteration counter is connected to the second inputs of the shifters and to the input of the block zyhod memory connected to the second input of the first adder-subtractor third inputs of the adders-subtracters connected to the output of the angle code register, further introduced a first block extracting unit, the initial position setting unit vector. the subtractor, the encoder and the OR element, while the inputs of the allocation unit of the first unit and the subtractor are combined and are the device input, the first output of the allocation unit of the first unit is connected to the input of the encoder, the output of which is connected to the input of the iteration counter, to the input of the initial position vector setting block, the first output of which is connected to the second input of the sine register, and the second output - to the second input of the cosine register, and to the first input of the OR element, to the second input of which the second output of the allocation unit of the first unit is connected nischl, an output of OR via subtractor connected to the second input of the angle code register. With such a construction, the speed of the proposed device is more than doubled compared to the prototype, since the Turn of one vector of operations is completed. Moreover, when performing this operation, fewer iterations are performed, since the initial position of the vector is set in advance. At the same time, the accuracy of calculating the values of sine-cosine functions in the adjacent device is not worse than in the prototype. FIG. 1 is a block diagram of the device; Fig. 2 shows an embodiment of a unit in the first unit. The device contains an angle code register 1, sine and 3 cosine registers 2, subtractors 4-6, shifters 7 and 8, memory block 9, counter 10 and iterations, control block 11, block 12 of the first unit subtractor 13, an encoder 14, the block 15 specifying the initial position of the vector, the element OR 16. The block highlighting the first unit contains the elements OR 17., the elements NOT 18 and the elements AND 19. The block specifying the initial position of the vector 15 can be made as a constant memory device for the number of words equal to the number of bits of the word that defines the angle f or in the form of programs of an o-logical matrix. The computation of sine-cosine functions is based on Wolder's well-known iterative algorithm, namely, the rotation of a vector on a plane by a given angle f:. x- .x -, -. Y i, - 2 ... Y, - Y ,, + € i.i .. xui- 2Ч .i + i-i-i-V (1) where i l, 2,3, ... n is the number of the iteration being performed; n is the number of the last performed and terration, g ,. sign (F,} l /, -, arctg2- -i) The special feature of performing operations (1) is the elongation of the vector at each iteration by Ki times, where K, is (1 +) 1I1. Thus, the total elongation of the vector for n iterations it is equal to PC. The property of lengthening the vector during rotation causes the creation of devices to develop special correction blocks, which negatively affects the speed of the devices. When calculating sine-cosine functions, you can take into account the elongation of the vector for a certain number of iterations. R and Starting Positions when scaling n rotations of the vector from the angle value f, O do, H, the vector modulus takes a single value. Then the x coordinate is equal to the cosmatic coordinate Y, takes the sinif value. Calculation of the sinf and cos4 values can be ori, if the nanal vector is not a vector with; YO o, the coordinates Cho o, but a vector with an angle slightly different from the angle Ч. The angle is an angle numerically equal to the binary value, in which all bits are equal to zero besides the bit whose value is equal to the first unit right in from the sign bit value of the angle H and the bit following it. For example, if 0, OOOi001lOlllOO will correspond to the angle of 0.0001100000000000. The number of iterations necessary to find the values of sin and constant is variable depending on the range of values of the angle H. For the most unfavorable value, when the angle H lies within the range of change from 45 ° to 90 °, the number of rotations of the vector is reduced by two, i.e. Operation The rotation of the vector begins immediately with an interchange, and the initial rotation angle is not 45 °, but 14 8 A decrease in the number of iterations leads to an increase in speed and an increase in the accuracy of calculations by reducing rounding errors in the calculations. the values of the coordinates of the vectors specified by the angles can be calculated in advance by the following relations:, where m is the number of the initial iteration. Then, when the number of rotations of the vector is equal to (n - m + 1), the magnitude of the vector magnitude increases. The value of the modulus of the vector takes a single value with the coordinates x cos ×; sin h The device works as follows. The angle value, for example, 0.000111010111011 goes to the first unit 12 unit. At the unit 12 output, the number 0.0001000000000000 is converted by the element OR 16 to the number 0.0001100000000000. The difference between 1 and C is 0.0000010101010110 written to register 1. the sign bit value of the value of H - H determines the operation mode of the adders 4-6 in accordance with expression (1). The initial positions of the vector 15, developed by the block, and Yn are written to tn m registers 2 and 3. The output code of the encoder 14, corresponding to the value of the initial iteration, is stored in the counter I of iterations and is the address for block 9 of the memory and retrieval the initial angle of rotation of the vector d1 / t. This code is also a pointer to shifters 7 and 8 for the required amount of shift. Thereafter, the execution of the first iteration begins. The register 2 is shifted by the janitor 7, added (subtracted) on the adder 6 with the content register 3, and shifted by the register 8 shifter, the register 3 is subtracted (added) on the adder 5 from the information of the register 2. The obtained results are entered into registers 3 and 2 . The value of register 1 is corrected by adder 4 by the value of d, g selected from memory block 9. Counter 10 iterative increases its value by one. This completes the first iteration. The remaining iterations are performed similarly to the first. The end of the calculation of the sin and cos values is determined by the overflow of the iteration counter. The control device generates the sync signals necessary for the correct operation of the device. The effect of the proposed device in comparison with the prototype is more than doubled. First, one operation is performed Turning a 1sector, while in the prototype two such operations are performed. In addition, performing the initial calculation of the initial position of the vector reduces the number of necessary iterations, which is especially noticeable at small angle values and, thus, further increases the speed of calculation of the values and cos H, as well as increases the accuracy of the calculation. due to the absence of rounding errors when performing a smaller number of iterations. The speed of the proposed Btsae device and in comparison with the known device is due to the smaller number of iterations in performing a single Rotate vector operation. Formula of the invention Digital device for calculating sine-cosine functions, containing an angle code register, a sine register, a cosine register, two switches, three subtractors, an iteration counter, a memory unit and a SYNCHRONIZING block, the KOTOPOFp outputs are connected to clock inputs The output of the carbon code register is connected to the first input of the first adder-subtractor, the output of which is connected to the first VID code register of the corner code, the first input of the second adder-subtractor is connected to the first output of the sine register, the second output through which the first shifter coupled to a first input of a third adder-subtracter, a second. The input is connected to the first output of the register of cosines, the second output of which is connected via the second shifter to the second input of the second cyNwaTopa subtractor, the output of which is connected to the first input of the sine register, the output of the third adder of the cosine register, the output of the iteration counter is connected to the second inputs of the shifters and to the input of the memory block, the output of which is connected to the second input of the first totalizer subtractor, the third inputs of the totalizer subtractors are connected to the output of the angle code register, о t It is due to the fact that, in order to improve speed, a block of the first unit is inserted into it, a block for setting the initial position of the vector, a subtractor, an encoder and an OR element, while the inputs of the block of the first unit and the subtractor are combined and are the device input, the first output of the allocation unit, the first unit is connected to the input of the encoder, the output of which is connected to the input of the iteration counter, to the input of the initial position vector setting block, the first output of which is connected to the second input of the sine register, and the second output d to the second input register cosine and to the first input of the OR gate, to the second input of which is connected the second & edeleni Exit block in the first unit, or an output of the subtractor is connected via a second input of the angle code register. Sources of information taken into account in the examination 1. Orange A.M. and others. High-speed. device for calculating sine-cosine functions. Ed.BGU messenger, sir. 1, 1969, 3, c.7Z. 2. USSR author's certificate 591862, cl. G 06 F 1.5 / 34, 1977 (prototype).

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Claims (1)

Claim ' A digital device for calculating sine-cosine functions, СО-25 holding an angle code register, sine register, cosine register, two shifters, three adders-subtracters, iteration counter, memory block and synchronization block, the outputs of which are connected to the clock inputs of the registers, and the output of the angle code register is connected to the first input of the first adder-subtractor, the output of which is connected to the first input of the angle code register, the first input of the second adder-subtractor is connected to the first output of the sine register, the second output of which is Through the first shifter is connected to the first input of the third adder-subtractor, the second input of which is connected to the first output of the cosine register, the second output of which through the second shifter is connected to the second input of the second adder-subtractor, the output of which is connected to the first input of the sine register, the output of the third adder is the subtractor is connected to the first input of the cosine register, the output of the iteration counter is connected to the second inputs of the shifters and to the input of the memory block, the output of which is connected to the second input of the first adder of the reader, the third inputs of the adders-subtractors are connected to the output of the angle code register, which is related to the fact that, in order to improve performance, a block for selecting the first unit, a unit for specifying the initial position of the vector, a subtractor, an encoder and an element are introduced OR, in this case, the input of the allocation unit of the first unit and the subtractor are combined and are the input of the device, the first output of the allocation unit, the first unit is connected to the input of the encoder, the output of which is connected to the input of the iteration counter, to the input of the unit for setting the initial position torus, the first output of which is connected to the second input of the register of sines, and the second output with the second input of the register of cosines and to the first input of the OR element, the second input of which is connected to the second output of the selection unit of the first unit, the output of the OR element through a subtracter is connected to the second input of the code register angle.