SU919028A1

SU919028A1 - Transistor converter

Info

Publication number: SU919028A1
Application number: SU802955702A
Authority: SU
Inventors: Эдуард Аршакович Мурадханян; Жирайр Арташесович Мкртчян
Original assignee: Предприятие П/Я А-7390
Priority date: 1980-07-09
Filing date: 1980-07-09
Publication date: 1982-04-07

Description

Изобретение относится к электротехнике, а конкретно к преобразовательной технике, и может быть использовано во.вторичных источниках питания радиоэлектронной аппаратуры.The invention relates to electrical engineering, and specifically to a converting technique, and can be used in secondary power sources of electronic equipment.

Известны двухтактные инверторы с ³самовозбуждением, в том числе полумостовые, построенные на базе схемы Ройера [11.Known push-pull inverters with ³ self-excitation, including half-bridge, built on the basis of the Royer circuit [11.

Основным недостатком их является низкий КПД из-за режима насыщения сердечника выходного трансформатора.Their main disadvantage is low efficiency due to the saturation mode of the core of the output transformer.

Известны двухтактные инверторы с самовозбуждением, содержащие выходной трансформатор с ненасыщающим— ся сердечником и коммутирующий трансформатор или дроссель, работаюрщй в режиме насыщения [2].Known push-pull inverters with self-excitation, containing an output transformer with a nonsaturated core and a switching transformer or inductor operating in saturation mode [2].

Недостатками данных инверторов являются относительно низкие весогабаритные показатели и КПД, обусловленные введением дополнительного электромагнитного узла с насыщающим-’ ся сердечником.The disadvantages of these inverters are the relatively low overall dimensions and efficiency, due to the introduction of an additional electromagnetic unit with a saturating core.

Характерным недостатком вьппеотмеченных групп преобразователей является также относительно большая длительность процесса запирания открытого транзистора, обусловленная отсутствием запирающего напряжения на время переключения и увеличения вследствие этого времени рассасывания неосновных носителей в переходах транзистора.A characteristic disadvantage of the above-mentioned groups of converters is also the relatively long duration of the process of locking an open transistor, due to the absence of a locking voltage for the switching time and, as a result, the increase in the absorption time of minority carriers in the transistor transitions.

Наиболее близким к предлагаемому по технической сущности является преобразователь, содержащий устройство управления с коммутирующими транзисторами и времязадающим узлом, выполненное по схеме генератора Ройера, и минимум один двухтактный усилитель мощности по полумост'овой схеме, на входе транзисторов которых включены выходные обмотки трансформатора блока управления и обмотки обратной связи трансформатора преобразователя (з1.Closest to the proposed technical essence is a converter containing a control device with switching transistors and a timing unit, made according to the Royer generator circuit, and at least one push-pull power amplifier according to a half-bridge circuit, at the input of the transistors of which the output windings of the transformer of the control unit and the windings are included feedback transformer transformer (s1.

'919028'919028

Недостатком преобразователя является низкий КПД, обусловленный наличием отдельного задающего генератора с насыщающимся сердечником.The disadvantage of the converter is its low efficiency, due to the presence of a separate master oscillator with a saturable core.

Цель изобретения - повышение КПД j преобраз ова теля.The purpose of the invention is to increase the efficiency j of the converter.

Указанная цель достигается тем, что в транзисторном преобразователе, содержащем силовую цолумостовую ячейку с выходным трансформатором, причемю последний снабжен двумя обмотками положительной обратной связи, каждая из которых связана с входом соответствующего силового транзистора преобразователя и блока управления с° is коммутирующими транзисторами и времязадающим узлом, также связанного своими выходами с входами силовых транзисторов, между вывода^-м каждой обмотки положительной обратной связи ₂о через токозадающий резистор включен один из коммутирующих транзисторов блока управления, между этими же выводами обмотки включен элемент времязадающего узла блока управления, образованный.из последовательной RC-цепочки, причем 'средняя точка RC-цепочки подключена к базе коммутирующего транзистора, а ее конденсаторный вывод - к эмиттеру, при этом точка соединения коллектора с токозадающим резистором подключена к базе силового транзистора, эмиттер которого соединен со средней, точкой обмотки положительной обратной связи»This goal is achieved by the fact that in a transistor converter containing a power half-bridge cell with an output transformer, the latter being equipped with two positive feedback windings, each of which is connected to the input of the corresponding power transistor of the converter and the control unit with ° is switching transistors and a timing unit, also connected by its outputs to the inputs of power transistors, between the terminal ^ -m of each winding of positive feedback ₂ о through a current-setting resistor, including one of the switching transistors of the control unit, between the same conclusions of the winding there is an element of the timing unit of the control unit formed from a serial RC circuit, with the midpoint of the RC circuit connected to the base of the switching transistor, and its capacitor output to the emitter, when "the connection point of the collector with the pick-up resistor is connected to the base of the power transistor, the emitter of which is connected to the middle point of the positive feedback winding"

На фиг. 1 представлена принципиальная схема транзисторного преобразователя: на фиг. 2 - эпюры токов и напряжений на основных элементах преобразователя.In FIG. 1 is a circuit diagram of a transistor converter: FIG. 2 - diagrams of currents and voltages on the main elements of the converter.

Транзисторный преобразователь (фиг, 1) включает силовую ячейку, которая выполнена по полумостовой схеме с конденсаторным делителем 1 и 2, силовыми транзисторами 3 и 4 и выходным трансформатором 5 с первичной 6 и выходной 7 обмотками и обмотками 8 и 9 положительной обратной связиj и блок ГО управления с коммутационными транзисторами 11 и 12. Меж-⁵⁰ду выводами обмотки положительной обратной связи включены времязадающие элементы, состоящие из последовательных RC-цепочек 13-16, к базе силовых транзисторов 3 и 4 подключены 55 токозадающие резисторы 17 и 1.8 после точки подключения коммутирующих транзисторов 11 и 12.The transistor converter (FIG. 1) includes a power cell, which is made according to a half-bridge circuit with a capacitor divider 1 and 2, power transistors 3 and 4 and an output transformer 5 with primary 6 and output 7 windings and positive feedback windings 8 and 9 and the GO block control switching transistors 11 and 12. The control pin ⁵⁰ Inter- positive feedback winding of timing included elements consisting of successive RC-chains 13-16, to the power transistors 3 and 4 the base 55 are connected voltage driving resistor 17 and 1.8 n follows connection point of the switching transistors 11 and 12.

На фиг. 2 приняты следующие обозначения: 19 и 20 - напряжения на переходах база-эмиттер транзисторов 3 и соответственно’,' 21 и 22 - напряжения на конденсаторах 14 и 16 соответственно, прикладываемые к переходам база-эмиттер транзисторов 11 и 12} и 24 - токи коллекторов транзисторов 11 и 12 соответственно} 25 - напряжение на обмотках трансформатора с учетом принятой на фиг. 1 маркировки начал и.концов.In FIG. 2, the following notation is adopted: 19 and 20 are the voltages at the base-emitter junctions of transistors 3 and, respectively, ',' 21 and 22 are the voltages at capacitors 14 and 16, respectively, applied to the base-emitter junctions of transistors 11 and 12} and 24 are collector currents transistors 11 and 12, respectively} 25 - voltage across the transformer windings, taking into account adopted in FIG. 1 marking started and ends.

Схема (фиг. 1) работает следующим образом.The circuit (Fig. 1) works as follows.

Допустим в момент t_f открыт транзистор 3 и закрыт транзистор 4. Тогда напряжение конденсатора 1, равное половине напряжения источника Станин, приложено к обмотке 6.Suppose at the moment t _f the transistor 3 is open and the transistor 4 is closed. Then the voltage of the capacitor 1, equal to half the voltage of the Stanin source, is applied to the winding 6.

Напряжения на входах транзисторов 3 и 4 имеют вид эпюр 19 и 20 соответственно и определяются величинами напряжений на верхних половинках обмоток 8 и 9. Транзисторы 11 и 12 закрыты отрицательным напряжением конденсаторов 14 и 16 (эпюры 22 и 23 соответственно) . Это состояние сохраняется до момента .ΐ.^ . К этому времени завершен разряд^конденсатора 14 до нулевого- значения (эпюры 22 ) и начинается заряд в положительном направлении до порога отпирания транзистора 11. В результате его отпирания в момент к переходу база-эмиттер транзистора 3 прикладывается запирающее напряжение (эпюра 19) от нижней половины обмотки 8. При этом через транзистор i1 протекает импульс тока эпюры 23, в который входит и составляющая тока запирания транзистора 3. Это приводит к быстрому рассасыванию неосновных носителей в переходах транзистора 3 за промежуток времени и сокращению времени его запирания (на фиг. 2 это время для наглядности увеличено). Вследствие запирания транзистора 3 происходит переворот фазы напряжения на обмотках трансформатора 5 (эпюра 25) , что приводит к отпиранию транзистора 4, Этим в принципе исключается явление перекрытия и появление сквозных токов в силовых транзисторах 3 и 4, так как отпирание одного транзистора имеет место только после запирания другого. Затем с момента t| начинается, перезаряд конденсатора 14 и разряд конденсатора 16. В момент t ц напряжение на конденсаторе 16 достигает порога отпирания транзистора 12, вследствие чего про· исходит аналогично вышеописанному процесс запирания в момент теперь $ уже транзистора 4 и отпирания транзистора 3 с завершением одного цикла переключения силовых транзисторов, Цалее процесс повторяется периодически ,The voltages at the inputs of transistors 3 and 4 have the form of diagrams 19 and 20, respectively, and are determined by the voltage values at the upper halves of windings 8 and 9. Transistors 11 and 12 are closed by the negative voltage of capacitors 14 and 16 (diagrams 22 and 23, respectively). This state persists until .ΐ. ^. By this time, the discharge of the capacitor 14 to the zero value (plot 22) has been completed and the charge starts in the positive direction until the unlock threshold of transistor 11. As a result of unlocking it, a blocking voltage is applied to the base-emitter of transistor 3 (plot 19) from the bottom half of the winding 8. At the same time, the current pulse of the diagram 23 flows through the transistor i1, which also includes the locking current component of the transistor 3. This leads to the rapid absorption of minority carriers in the transitions of the transistor 3 over a period of time and juice ascheniyu time of its closing (FIG. 2 time is enlarged for clarity). Due to the locking of the transistor 3, the voltage phase overturns on the windings of the transformer 5 (plot 25), which leads to the unlocking of the transistor 4, this basically eliminates the phenomenon of overlapping and the appearance of through currents in the power transistors 3 and 4, since the unlocking of one transistor takes place only after locking another. Then from the moment t | starts, the recharging of the capacitor 14 and the discharge of the capacitor 16. At time t c, the voltage across the capacitor 16 reaches the unlock threshold of the transistor 12, as a result of which, similar to the above, the process of locking at the moment $ is already transistor 4 and unlocking the transistor 3 with the completion of one power switching cycle transistors, the process is repeated periodically,

При этом период повторения определяется параметрами RC-цепочки, напряжением обмоток 8 и 9 и порогом отпирания транзисторов 3 и 4, При идентичных элементах, входных цепей транзисторов 3 и 4^ период Т примерно равенIn this case, the repetition period is determined by the parameters of the RC circuit, the voltage of the windings 8 and 9 and the unlocking threshold of transistors 3 and 4, For identical elements of the input circuits of transistors 3 and 4, the period T is approximately equal

Tai (0,5-0,7) RC, где*И - сопротивление резисторов 13 и 15(Tai (0.5-0.7) RC, where * And is the resistance of resistors 13 and 15 (

С - емкость конденсаторов 14 и 16.C is the capacitance of the capacitors 14 and 16.

Очевидно, что транзисторы 11 и 12 потребляют ничтожно малую среднюю мощность, так как участвуют в работе только на время рассасывания носителей в силовых транзисторах 3 и 4. Кроме того, потери мощности как в силовых транзисторах при зо их открытом состоянии, так и в выходном трансформаторе определяются только мощностью нагрузки, так как отсутствует режим насыщения §ердеч~» ника трансформатора 5. Максимальное 35 напряжение на коммутирующих транзисторах II и 12 в отличие от известного, где оно равно двойному напряжению источника питания (до нескольких сотен вольт), не превышает 8-10 В.It is obvious that transistors 11 and 12 consume a negligible average average power, since they participate in the operation only for the time of carrier resorption in power transistors 3 and 4. In addition, power losses both in power transistors with their open state and in the output transformer are determined only by the load power, since there is no saturation mode of the transformer 5. The maximum voltage is 35 at the switching transistors II and 12, unlike the known one, where it is equal to the double voltage of the power source (up to several hundreds of volts), does not exceed 8-10 V.

Предлагаемый преобразователь обладает существенной эффективностью за счет уменьшения потерь в блоке управления, так как основные функции специального задающего генератора и усилителя мощ~₄₅ности совмещены в одном устройстве. ,The proposed converter has significant efficiency by reducing losses in the control unit, since the main functions of a special master oscillator and power amplifier ~ _{45 are} combined in one device. ,

Отметим, что если выбранные типы транзисторов 11 и 12 не допускают инверсного режима включения, то их коллекторы обычным путем подключают к соответствующим точкам схемы фиг. 1 через диоды, что не вносит изменений в принцип работы и в параметры преобразователя.Note that if the selected types of transistors 11 and 12 do not allow inverse switching mode, then their collectors are connected in the usual way to the corresponding points in the circuit of FIG. 1 through diodes, which does not change the principle of operation and the parameters of the converter.

919028 6919028 6

Преобразователь может заменить известные усилители мощности, построенные по схеме полумостовых преобразователей, управляемые от отдельного задающего генератора, а также может быть использован в качестве самостоятельного задающего генератора для управления прямоугольным напряжением переменного тока более мощного усилителя 10 или группы преобразовательных ячеек.The converter can replace well-known power amplifiers, constructed according to the scheme of half-bridge converters, controlled from a separate master oscillator, and can also be used as an independent master oscillator to control the rectangular AC voltage of a more powerful amplifier 10 or a group of converter cells.

Claims

The invention relates to electrical engineering, and specifically to converter equipment, and can be used in secondary power supplies of electronic equipment Known two-stroke inverters with self-excitation, including papumostye, built on the base of the circuit of Royer 11. Their main disadvantage is low efficiency due to for saturation of the core of the output transformer. Two-stroke self-excited inverters are known, containing an output transformer with an unsaturated core and a switching transformer or the choke is operating in saturation mode 2. The disadvantages of these inverters are relatively low weight and overall dimensions and CTS, caused by the introduction of an additional electromagnetic node with a saturable core. A characteristic drawback of the marked groups of converters is also the relatively long duration of the locking process of the open transistor, due to the absence of a blocking voltage during the switching time and the increase due to this absorption time of minority carriers in the transitions of the transistor. The closest to the proposed technical entity is a converter containing a control device with commutating transistors and a time master unit, made according to the Royer generator circuit, and at least one push-pull power amplifier according to a half-bridge circuit, at the input of transistors of which the control unit i transformer output windings transformer feedback windings converter h. 39 The disadvantage is transformed1; low efficiency. due to the presence of a separate master oscillator with a nascent heart. The purpose of the invention is to increase the conversion rate of sh. This goal is achieved in that there is a transducer s converter containing a power drill-cell with an output transformer, and the latter is equipped with two positive feedback windings, each of KOTOpi rx; A converter and a control unit with switching transistors and a master node also connected to the inputs of power transistors J between the output s of each winding of a positive feedback through tozo / 1, connected to the input of the corresponding power transistor and connecting the transistors One of the switching transistors of the control unit, between the same winding leads, includes the element for the time of the giving node of the control unit, formed from a serial KS chain, with the midpoint of the RC chain connected and to the base of the commutator of the transistor, and its capacitor lead to the emitter, while the connection point of the collector with the current resistor is connected to the base of the power transistor, the emitter of which is connected to the midpoint of the winding of the positive feedback. In FIG. 1 shows the transistor converter circuit; in fig. 2 - diagrams of currents and tensions on the main elements of the transformer. Transistor converter (FIG, O includes a power cell, which is made according to a half bridge circuit with a capacitor divider I and 2, power transistors 3 and 4, and an output transformer 5 with primary b and output 7 windings and windings 8 and 9 of a positive feedback and block 10 controls with switching transistors 11 and 12. Between the positive-feedback winding pins, time control elements consisting of sequential RC-depots are included, the current delivering resistors 17 and 18 are connected to the base of power transistors 3 and 4 The switching points of the switching transistors 1 and 12. In Fig. 2, the following notation is used: 19 and 20 are the voltage at the base-emitter junctions of the transistors 3 and 4, respectively, 21 and 22 the voltage on the capacitors 14 and 16, respectively, applied to the junctions the base-emitter of transistors 11 and 12J 23 and 24 are collector currents of transistors 11 and 12, respectively, 25 is the voltage across the windings of the transformer 5, taking into account the marking of fig. The scheme (Fig. I) works as follows. Suppose, at time t, transistor 3 is open and transistor 4 is closed. Then the voltage across capacitor 1, equal to half the voltage of the source -Stanin, is applied to winding 6. The voltages at the inputs of transistors 3 and 4 have the form of Escher 19 and 20, respectively, and are determined by the values of the voltages on the upper halves of the windings 8 and 9. Transistors 11 and 12 are closed with negative voltages of capacitors 14 and 16 (diagrams 22 and 23, respectively). This state persists until .12. . By this time, the discharge of the capacitor 14 to zero-value (plot 22) is completed and the charge starts in the positive direction to the threshold of unlocking transistor P. As a result of its unlocking, at time tJ, a base voltage is applied to the base-emitter junction of transistor 3 (diagram 19 ) from the lower half of the winding 8. At the same time, a pulse of the current of the plot 23 flows through the transistor i I, which includes the locking current component of the transistor 3, which leads to a rapid resorption of minority carriers in the transitions of the transistor 3 over a period of time neither reduce the time of its locking (in Fig. 2, this time is increased for clarity). Due to the latching of the transistor 3, the voltage phase reverses on the windings of transformer 5 (Figure 25), which leads to the unlocking of the transistor 4. This basically excludes the phenomenon of overlap and the appearance of through currents in the power transistors 3 and 4, since unlocking of one transistor takes place only after lock the other. Then from the moment t begins, the recharging of the capacitor 14 and the discharge of the capacitor 16. At time t, the voltage on the capacitor 16 reaches the threshold for unlocking the transistor 12, as a result of which, similarly to the above, the process of locking occurs at the time of the transistor 4 and unlocking the transistor 3 With the completion of a single switching cycle of the power transistors, the process is then repeated periodically. At the same time, the repetition period is determined by the parameters of the RC chain, the voltage of the windings 8 and 9, and the threshold for unlocking the transistors 3 and 4 the input circuits 3 and 4, the period T of the pristransistors is equal to ti (0.5-0.7} RC, where K is the resistance of the 13 C resistors and the capacitance of the capacitors 14 and 16. It is obvious that transistors 11 and 12 consume a negligible average power, as they participate in the work only for the time of carrier dissipation in power transistors 3 and 4. In addition, the power loss in both power transistors in their open state and in the output transformer is determined only by the load power, since there is no mode saturative-nickname transformer 5, Max. The voltage across the commutated transistors 11 and 12, in contrast to the known, where it is equal to the double voltage of the power source (up to several hundred volts), does not exceed 8-10 V. The proposed converter has significant efficiency due to the reduction of losses in the block control as the main functions of the special generator and power amplifier are combined in one device. Note that if the selected types of transistors 11 and 12 do not allow an inverse switching mode, then their collectors are connected in the usual way to the corresponding points of the circuit of FIG. 1 through the diodes, which does not change the principle of operation and the parameters of the converter. 86 The converter can replace the well-known power amplifiers, built according to the half-bridge converters, controlled from a separate master oscillator, and can also be used as a self (a standalone master oscillator to control the AC power of a more powerful amplifier or a group of converter cells. Claims of the invention: A transistor converter containing a half-bridge power cell with an output transformer, the latter being provided with two windings; individual feedback, each of which is connected to the inputs of the corresponding power transistor of the converter and the control unit with switching transistors and the time of the back node, also connected by its outputs to the inputs of the power transistors, characterized in that, in order to increase the efficiency of the converter, between One of the switching transistors of the control unit is turned on through the current feedback wiring resistor through the current-contacting resistor. The time element of the control unit of the control unit is connected between the same winding terminals. consisting of a series RC circuit, the middle point of the RC chain is connected to the base of the switching transistor, and its capacitor output is connected to the emitter, and the collector connection point with the current-carrying resistor is connected to the base of the power transistor, the emitter of which is connected to the middle point of the positive feedback winding. Sources of information taken into account prn examination 1.Moin B.C., Laptev N.N., Stabilized transistor converters. M., Energie, 1972, p. 310-ЗП, Fig. 9-5 (a, guide).

2. Author's certificate of the USSR No. 609193, cl. H 02 M 7/537, 1976,

3. USSR author's certificate number 570162, cl. H 02 M 3/335, 1975.