SU900424A1 - Delay device - Google Patents

Description

(54) DELAY DEVICE

I

The invention relates to the sensing and control-measuring technique and can be used, in particular, in devices for the functional control of the integral lopez circuits.

A delay device of the commtree type is known, in which a quantized delayed cyst is used for the delayed delayed patient (exit squad) (control set {ny generator, control trigger, pinch and best delay based on digital-to-analogous arrays, pull-down generators, amplitude voltage amplifiers, amplitude shift amplifiers C.

However, in this ycrpcMiciBe delay, there is no possibility of matching the trigger pulse, and the front edge is the origin with the front (or rear) output of the output pulse of the zero set delay in the device, which significantly reduces its accuracy, since the zero delay of the output pulse relative to the trigger is comparable or exceeds the minimum discrete value of the delay device.

The closest in technical terms to the invention is a device containing a generator, a key, a control trigger, scanners with code writing schemes and an output driver, variable voltage generators (sawtooth and distance generator), an amplitude drive {minator and output pulse drivers trigger pulse 2.

The known device also lacks the possibility of matching the trigger and output pulses, which reduces the accuracy of the entire device.

The purpose of the invention is to increase the accuracy of the device.

15

This goal is achieved by the fact that a delay device containing a master oscillator connected to the first input of the key element, the second input of which is connected to the output of the control trigger,

Claims (2)

20 wherein the output of the key element is coincident with the input of the overlap unit, the output of which is connected to the reset input of the trigger and the generator input is linearly variable and the output is connected to the first input of the combirator, the second input of which is connected to the output of the step change generator voltage, while the output of the controller is connected to the input of the output pulse shaper, an adjustable delay line, the trigger pulse shaper and the reference pulse are entered, while An adjustable delay line is connected to the output of the trigger pulse generator, the direct output is connected to the control input of the control trigger, and the inverse output is connected to the input of the count pulse generator. On the fit. 1 shows the functional block scheme of the proposed device; in fig. 2 temporary diagram of the device. The device contains a queuing oscillator I with quartz stabilization, a key element 2 trigger 3 controls, a starting pulse generator 4, an adjustable delay line 5, a scaling unit 6, a linear varying voltage generator 7, an alternating voltage generator 8, a comparator 9, for world leaders 10 and 11 of the day off and counting out. Inputs 12 and 13 are used to pre-set the delay code in recalculated, block 6 and generator 8 of step-varying voltage. At input 14, a master oscillator 1 is turned on, and at input 15, a delay device is started. The device works as follows. Turns 12 and 13 pre-set the delay code, and input 14 includes a master oscillator G with quartz stabilization with a period of following pulses TO. With the arrival of the start pulse to the input 15, the pulse from the output of the former 4 is triggered by an adjustable delay line 5, the pulses on the forward and inverse outputs of which are equal in duration to the parasitic zero delay of the signal in the delay device circuits. On the leading edge at the forward output of the delayed control line 5, the control trigger is turned on and its output signal connected to the second input of the key element 2 allows the passage of oscillating pulses from the master oscillator 1 to the input of the recalculated unit 6. After passing a certain number of pulses (defined by ) the delayed signal from the output of the scaling unit 6 resets the trigger 3 control, which leads to the cessation of the passage of the calibrated pulses through the key element 2 to the input of the scaling unit 6 and starts the generator 7 linearly changing voltage. Linear voltage from the output of generator 7 is supplied to one of the inputs of the comparator 9. When the direct voltage reaches a value equal to the voltage at the other input of the comparator 9, the last turns on and starts the driver of the 10 output pulse, at the output of which a delayed output pulse is generated. The delay of this pulse in the delay device in relation to the trigger pulse on the second 15 is equal to Tzadd ass. de t ass - parasitic zero delay, determined by the inertia of the elements in the path of the passage and the formation of the output pulse; programmable delay determined by the delay code obtained in the conversion unit biv geyerator 7 linearly measured voltage. Zero delay compensation Tzad exists in adjustable delay line 5. The pulse from the inverse output line 5 delay equal in duration Tzadd. with its falling edge triggers the reference pulse driver 11, and thus the leading edge of the reference pulse is matched with the leading edge of the output pulse. The matching of the reference and output pulses is carried out when the delay code is set for inputs 12 and 13 to be zero. At the same time, the leading edge of the reference pulse is aligned with the leading (or rear) edge of the output pulse by varying the pulse duration at the outputs of the adjustable delay line 5 (Fig. 2). As an adjustable delay line in the proposed device, a standby multivibrator can be used with a smooth adjustment of the duration of the output signals by varying the charge current of the capacitor with a variable resistor. Thus, in the proposed delay device, the accuracy of the delay of the output pulse is much better with respect to the measured pulse, since the parasitic zero delay is fully compensated for in the entire setting range of the required delay code. Formula of Invention A delay device comprising a master oscillator connected to the first input of a key element, the second input of which is connected to the trigger trigger output, the key element output connected to the counting unit input, the output of which is connected to the control trigger reset input and to the line generator input but the measuring voltage is odisuremenio, and the output of the latter is connected to the first input of the comparator, the second input of which is connected to the output of the generator of step-changing voltage, p The output of the comparator is connected to the input of the output pulse shaper, characterized in order to improve the accuracy of the device, into it (regulated by the delay time, the trigger shaper and the reference pulse shaper, while the input of the adjustable delay line is connected to the output of the trigger pulse , direct output - with the setup input of the control trigger, and inverse output - with the input of the counting pulse generator. Information sources taken into account when examining 1. Authors (certificate RN 442575, cl. H 03 K 5/13, 1974. 2.Zhup km V.K., Zeil V.K. Designing and operating discrete devices on integrated circuits. Rn, Zinati, 1977, p. 86-98. 2