SU885948A1 - Signal detector - Google Patents

Description

(54) SIGNAL DETECTOR

I

The invention relates to radio engineering, and can be used in radio receiving devices for detecting signals in the presence of noise.

A signal detector is known that contains a synchronizer, a read pulse generator, a first amplifier and a sequential-included second amplifier, an analog-to-digital converter, a multi-channel shift register, an analog-digital multiplier unit, an integrator unit, a read-out unit and an output unit; the control input of the readout unit, the output of the first amplifier is connected to the reference input of the analog-digital multiplier unit, and the output of the synchronizer is connected to the clock the inputs of the analog-digital converter and the multi-channel shift register 1.

However, the known device has an inadequate probability of separating periodic signals at low signal-to-noise ratios.

The purpose of the invention is to increase the likelihood of correct detection.

The goal is achieved by the fact that a signal detector comprising a synchronizer, a read pulse generator, a first amplifier and a second amplifier connected in series, an analog-to-digital converter, a multi-channel shift register, an analog-digital multiplier unit, an integrator block, a read block and an output block, the output of the read pulse generator is connected to the control input of the readout block, the output of the first amplifier is connected to the reference input of the block of analog-digital multipliers, and the sync output The sensor is connected to the clock inputs of the analog-digital converter and the multi-channel shift register, entered

Claims (2)

  the analyzer, the control unit and the controllable delay unit are connected in series, the input and output of which are connected respectively to the input of the first and the second amplifier, the output of the reading unit is connected to the analyzer's input, and the output of the reading pulse generator is connected to the second input of the control unit. The drawing shows the structural electrical efficiency of the proposed device. The signal detector contains a synchronizer 1, a generator of 2 read pulses, a first amplifier 3, a second amplifier 4, an analog-digital converter 5, a multichannel shift register 6, an analog-digital multiplier block 7) integrator block 8, a read block 9, an output block 10, the analyzer 11, the control unit 12 and the controllable delay unit 13. The device operates as follows in the original STATE condition. In block 13 a delay t Q is established. The signal U (t) being analyzed enters the device through two channels. In the first channel, it passes through block 13, the first amplifier 3, is converted into digital form in converter 5 and in the form of a parallel binary code is fed to the inputs of register 6, rotated by clock pulses of synchronizer 1 according to register 6, which acts as a multi-split digital delay line. In the second channel, the signal through the second amplifier 4 in analog form is fed to one of the inputs of block 7, the second inputs of which from the outputs of register 6 receive the delayed signal in digital form in the form of a parallel binary code. The delay in each channel of register 6 increases discretely and proportionally. with increasing channel numbers. The paired products of the analyzed signal and its delayed copy, obtained at the outputs of block 7, are accumulated and averaged by block 8. At the end of the time sufficient for averaging, at block 8, the ordinates of the autocorrelation function of the signal U (t) are generated, which arrive to the inputs of block 9. The generator 2 generates pulses, the period of which is chosen equal to the time of averaging the estimates of the ordinates of the autocorrelation function in block 8. The pulses generated go to the control input of block 9 and to the input of block 12 The delay time of the delay line in block 12 is chosen slightly longer than the total time required for detecting the periodicity in analyzer 11 and the reading time of the estimates of the ordinates of the auto-correlation function by block 9. For each pulse from the generator 2 to the control input of block 9, It reads all the estimates of the ordinates of the autocorrelation function. The read estimates of the autocorrelation function ordinates are sent to block 10 and to analyzer block 11, in which the periodic signal is detected. If the periodic signal is not detected, the inhibiting voltage is absent at the output of the analyzer And through the open inhibit element of block 12 from generator 2 through the delay line of block 12, a control pulse that changes the state of the counter of block 13. Through the decoder of block 13, voltage is applied to open the next electronic switch Around 13 and the connection from this block is a delay line, the delay of which is greater than the previous one. Thus, after a time reading cycle, the delay increases and a new cycle begins to compute the estimate of the autocorrelation function and detect the periodic signal. In the event that the analyzer 11 makes a decision about the presence of a periodic signal in the calculated autocorrelation function, the analyzer 11 generates a inhibitory voltage applied to the control input of the inhibit element of block 12. This voltage closes it for the entire time that analyzer II detects the existence periodic signal la In this case, in block 13, the delay is fixed at which a periodic signal is detected. If the analyzer 11 makes a decision about the termination (absence) of a periodic signal, the “prohibiting output voltage” is generated and passed through the open P; luyuschie. pulses from the generator 2. A new cycle of calculating the autocorrelation estimation of the function and the detection of the periodic starts with increasing delay in block 13. Thus, the inclusion of block 13 in the device allows, without increasing the number of channels in the detector, not only increasing the probability of detection periodic signals compared to known devices, but also to detect periodic signals at such low signal-to-noise ratios, when the detection of these signals in known devices with the same number of channels may be impossible The claims of the signal detector comprising a synchronizer, a read pulse generator, a first amplifier and a second amplifier connected in series, an analog-digital converter, a multi-channel shift register, an analog-digital multiplier unit, an integrator block, a read block and an output block, and the generator output the read pulses are connected to the control input of the read block, the output of the first amplifier is connected to the reference input of the analog-digital multiplier block, and the output is synchronous the mash is connected to the clock inputs of the analog-digital converter and the multichannel shift register, characterized in that; In order to increase the probability of correct detection, a series-connected analyzer, a control unit and a controllable delay unit are inputted, the input and output of which are connected respectively to the input of the first and the input of the second amplifiers, while the output of the reading unit is connected to the input of the analyzer. and the output of the read pulse generator is connected to the second input of the control block. Sources of information taken into account during the examination 1. USSR Author's Certificate No. 421011, cl. G 06 F 15/34, 1974 (prototype).