SU860001A1 - Device for electronic circuit syhthesis - Google Patents

Description

one

The invention relates to automation and computing and can be used in the field of automation of electronic circuit design.

The closest in technical essence to the present invention is a device for synthesizing electronic circuits, comprising a serially connected model of the original circuit, a quality indicator measuring unit, a quality indicator analysis unit, a search direction selection unit and an increment organizing unit, an extremum testing unit serially and a control unit connected in series and a constraint checking unit, the output of which is connected to the second input of the quality indicator analysis unit, under the second output to the input of the extremum check block, the first output to the second input of the extremum meter, and the third output to the second input of the restriction check block, the second output of the extremum check block is connected to the first input of the control unit, the second output of the quality indicator measuring block

connected to the first input of the model of the source circuit l.

However, the known device cannot be applied to solve the problem of structural synthesis of electronic circuits, as this task requires a completely different formulation and, consequently, a different technical implementation; .

ten

The formulation of the task in this case is reduced to a trace. There is an extraneous electronic circuit model with a given set of input parameters that performs a specific logical function. It is necessary to obtain a circuit model that performs the same logical function, but with improved output characteristics with respect to some criteria (technical requirements).

To solve this problem, it is necessary to introduce the concept of a discrete computing environment (ICE), which is a collection of currents, each of which has a current limiting resistor and a power source. If between these points the outputs of the circuit components are included, then a controllable model of the initial electric circuit will be obtained.

whose work can be {e described by a system of Mdifferential equations, compiled by the method of nodal potentials. Here M is the number of internal Wylor csm, i.e. nodes that are not connected to a power source. Based on the concept of a LAN, it can be concluded that for a grounded node the circuit1. And the current limiting values for all the resistor and power source are zero. For a circuit node not connected to a power source, the value of the resistor tends to infinity.

In this space of nodes, it is necessary to provide for the possibility of expanding the model of the original circuit by connecting between its internal nodes a resistive-semiconductor structure having N terminals, as well as the possibility of rotation of the resistive-semiconductor structure in the space of internal nodes. Then the problem of parametric optimization becomes only a particular task of structural synthesis.

The purpose of the invention is the trailing of the functionality of the device.

This goal is achieved by the fact that the device contains a series-connected current limiting unit, a set of basic structure sets, a switch, a memory unit and a comparison unit, the second input of which is connected to the output of an extremum meter, and the first and second outputs to the second inputs of the corresponding memory block. control unit, the output of which is connected to the second input of the switch, the second outputs connected to the corresponding second input is the model of the initial circuit f, and the output of the incremental control unit is connected to the second input of the set of basic structures, the second and third outputs connected to the third inputs, respectively, of the extremum meter and the model of the original circuit.

The drawing shows a block diagram of a device for synthesizing electronic circuits.

The device contains a model, 1 ishim circuit (the model of the circuit is represented by an analog computer that dials the system M differential equations, where M is the number of internal nodes of the circuit), unit 2 measures the quality indicator, where the output characteristics of the circuit, optimizer 3, unit of comparison 4 are calculated , block 5 of memory, block 6 of a set of basic structures consisting of a semiconductor structure (diode, transistor, etc.) and N adjustable resistors connected to the KajfWOMy output of the semiconductor structure, which together with 7 ohm current limiting process is determined, and the switching mode type of semiconductor structure. The current limiting unit 7 consists of a power source and a variable resistance, for example a potentiometer, used to set the current produced by the power unit. Information about the nature of the change in parameters (resistors) is transferred to the model of the original circuit at the (M-I) input. Switching the contacts in the switch 8, which operates under the action of a signal acting only on its Nth input from the control unit, achieve their various combinations. In turn, the optimizer contains a control block 9, a constraint check block 10, a quality indicator analysis block 11, an extremum check block 12, a selection block 13, a search direction, an increment organizing block 14 and an extremum meter 15.

The synthesis of the circuits is carried out as follows.

If the system of equations describing the operation of the circuit is known, then on the AVM, model 1 of the original circuit is typed in the form of a system of M differential equations compiled by the node potentials method for each of the M internal nodes (the internal node is the node to which the voltage source is not connected) . The equations for the node formed by connecting the current limiter unit 7 and one of the semiconductor structure terminals are also typed on the AVM. In order to be able to change the model 1 of the original cs by connecting to the internal nodes of the various outputs of the semiconductor structure, it is necessary to add to the system in each equation in this way, the N terms corresponding to these conclusions.

As a result of solving this system, the most important characteristics of the circuit can be calculated: transient time, power consumed by the circuit, load capacity, noise immunity V, noise immunity V, and temperature

Hell

stability.

In switch 8, the contacts are pairwise closed aa, bb, ... corresponds to the initial state of the synthesized circuit. After starting the device, block 2 generates a test signal that is fed to the input of controlled model 1 of the original circuit, and control signals arrive at the block 10 to check the conditions of the specified constraints (technical requirements) on the previously listed characteristics. In response to the input signal V, the (Mil) -ro equation system is solved and the output characteristic H is generated, which is automatically measured by block 2 and fed to meter 15, as well as block 11, where the sum of the "1y deviation of the current characteristic from the given one is determined. is performed in block 11 according to the commands generated by control block 9. The calculated deviation value from block 11 in a binary-digital code is sent to block 13 to determine the further direction of the search. This is achieved by comparing the calculated deviation from the target with the value of the deviation in the previous optimization step and determining the sign of the difference. If the difference sign is negative (to minimize the tf characteristic, to maximize the characteristic the difference sign is positive), then this optimization step is considered successful, in this case, the meter 15 remembers the direction of the variable parameter at this step and proceeds to change the next controlled parameter of the block 6 in accordance with the previously selected search direction. This is accomplished by issuing the appropriate commands from block 14 to block 6. The resulting value of the controlled parameter coming from the Mth output of block 6 to the (M + 1) -th input of the model. 1 leads to a change in its state. If the difference sign is positive (negative), then this optimization step is evaluated as unsuccessful. In this case, unit 14 changes the search direction for this parameter and instructs unit 6 to change the state of model 1.

Block 10 serves to check the specified constraints on the output characteristics of the schegla measured by block 2. This is done to determine the health of the circuit, i.e. it is checked whether the synthesizing circuit performs the same logical function as the original circuit. If the characteristics are within the boundaries of their acceptable values, then from block 10 to block 11 a signal is received to allow the calculation of the magnitude of the deviation from the target. Otherwise, block 10 generates a signal prohibiting the calculation data, and sends a signal to block 13, which is evaluated by this optimization step in block 13 as unsuccessful.

Thus, the process of automatic extremum search is an iterative multistep process, the rate of convergence of which depends on the chosen optimization method and, therefore, on the structure of the optimizer 3. Therefore, a multi-channel optimizer can be used to efficiently operate this device.

The device stops as soon as possible contact closure options have been enumerated, which the control unit informs the signal from block 4, in which not only the extremum values are compared at each contact switching stage, but it is also checked whether the final state is reached in process j All contact switching. As a result of the operation of the device from block 5, the characteristic that meets the technical requirements, parameters and configuration is selected optimally.

 synthesized circuit.

 The use of the proposed device in the tasks of designing electronic circuits makes it possible, by excluding the manual synthesis method, to significantly improve the design quality, reduce the development time of electronic circuits,

Claims (1)

1. Copyright certificate SSPR 276523, cl..C 05. At 13/02, 1968 pototip).