SU822162A1 - Pseudorandom number generator - Google Patents

Description

one

The invention relates to computing technology and can be used in statistical modeling of random variables, the use of measuring transducers of random processes and systems of automatic control of processes and objects using a random signal.

A generator of uniformly distributed random numbers is known, which contains a shift register, a half-summator in a feedback circuit, and a periodic pulse generator 1.

However, this generator is characterized by the impossibility of controlling the stragistic characteristics of the generated random numbers.

The closest to the invention is a random number generator, comprising a series-connected source of random Poisson pulses, a shaping unit, a two-input element AND, an account: a chick, a memory register, a decoder, an MG switch, and a control unit connected to the distributor pulses, two outputs of which are connected to the reset inputs

the counter and the memory register correspond to ICTBBHHO, and the other two to the memory element, the output of which is connected to the second input of the AND 2 element.

The disadvantage of this device is the relatively low accuracy of the installation of the specified statistical characteristics of the generated random numbers as due to the presence

0 of the Poisson generator, which has, as a rule, an unstable output intensity, a stream of pulses, and due to the error introduced by the matrix switch

5 laws of distribution, approximating the latter with a certain degree of accuracy.

The purpose of the invention is to improve the accuracy of the generator.

The goal is achieved

0 in that the pseudo-random number generator containing the primary source of the pseudo-random signal, the output of which is connected to the counting input

5 counter, the output of which is connected to the information input of the memory register: t, the control input of which is connected to the output of the generator of clock j pulses and to the input of the delay element, the output of which is connected to the input reset of the counter, entered divider, switch and controlled pulse generator, output which is connected to the input of the primary source of a pseudo-random signal, and the input of the controlled pulse generator is connected to the first output of the switch, the second output of which is connected to the first input of the divider, the second input otorrhea connected to the output of register memory, the delay element output is connected to the third input of the divider, the output of which is the output of the generator.

The drawing shows a block diagram of the generator.

The generator contains a controlled generator of 1 (periodic) pulses, a switch 2, a primary source 3 of a pseudo-random signal, a counter 4, a register 5 pgilty, a divider b, a delay element 7, a generator of 8 clock pulses.

The first output of the switch 2 through a controlled generator 1 (periodic) pulses connected to the input shift of the primary source

3nitrandom signal, the output of which through the counter 4 and memory register 5 is connected to the input of the divider b, the control input of which is connected to the second output of the switch 2, and the start-up input - to the reset input of the counter 4 and the output of the delay element 7, whose input is connected to the output generator B and register 5 memory rewrite input.

The principle of the generator is to recalculate the pulses of a pseudo-random binary sequence for a predetermined time interval T, and the independent control of the moments is carried out by simultaneously switching the frequency of the controlled periodic pulse generator and the division factor of the divider.

The generator works in the following way.

At each triggering of the pulse generator 1, the next symbol of the sequence (one or zero) appears at the output of the primary source of the pseudo-random signal. Source 3 can be made on the basis of a shift register with a half adder in the feedback circuit. During the time interval T, the counter 4 is filled with a random number of pulses from the output of source 3. The duration of the interval T is fixed and is determined by the period of operation of generator 8. Counter 4 is reset to zero by each pulse of generator 8. Immediately before resetting the counter

4, the contents are rewritten into register 5, after which an arithmetic operation is performed dividing by a given number in the divider 6. Delay element 7 serves to match the operation modes of blocks 4-6 such that the contents of counter 4 are first overwritten by register 5 (generator pulses 8), and then reset the counter 4 and start the divider b (by the delayed impulse of the generator 8) i Using the switch 2, the frequency of the generator 1 and the divider -M in the divider b are simultaneously changed.

It is known that a pseudo-random binary sequence generator based on a shift gives a sequence of Bernoulli type, i.e. the number of occurrences of single characters in a sequence of length in E obeys the law Eernoulli

4 "-N

Pg (N) CjP (l-P)

where P is the probability of a unit.

If during the time T the t clock ticks of the generator 1 are performed, then the first two moments (expectation Um and variance D |) of the random number N written in register 5 are

fN EP: D PP (1-P)

Divisor 6 divides the random number N, written in register 5, by a constant coefficient M. In this case, mathematical:. the expectation and variance of the random number N at the output of the divider b is defined as

GM | P. D, | j;, P (l-P).

Simultaneous switching (using switch 2) of the frequency of the generator 1 and the divider M in the divider b so that | f const.

the variance of the output number N is changed with its constant expectation. Switching const allows you to change the expectation

with constant dispersion Df (.

Thus, after each period of operation of the generator 8, random numbers appear at the output of the device, with specified mathematical expectation and variance, the values of which can be independently set using switch 2. The accuracy of the installation of the elements is provided by a digital representation of the values M and E and the detected value R.

Claims (2)

1. Yakovlev V.V., Fedorov R.F. Stochastic computers L., Mashinostroenie, 1974, p. liS. 2. Authors certificate of the USSR 556471, cl. G 07 C 15/00, 1976  (prototype).