SU801227A1 - Device for galvanic isolation of symmetric dc circuits - Google Patents

Description

one

 The measurement is related to radio-electronics and can be used in mead- ing devices for suppressing high-voltage longitudinal noise from syphase DC signals and low-frequency currents.

The known device for the galvanic separation of symmetrical DC circuits contains a sequence. but connected balanced modulator, capacitive storage element and balanced demodulator.

However, the known device has a low permissible level of common mode noise.

The purpose of the invention is to increase the allowable level of common mode noise at the input.

The goal is achieved by the fact that in a galvanic separation device of symmetric DC circuits containing a series-connected balanced modulator, a capacitive storage element and a balanced demodulator, a balanced modulator is made of a single key connected in parallel with the device input, the capacitive triggering element is made of two balanced PC-differential circuits, in this case, the point of the joint resistors of these nenoft is connected to the common device, and the balanced ohmoulator is performed in two sequences the body of the combined keys connected in parallel with the output of the device, the key connection point being the common bus of the device.

The drawing shows a structural electrical circuit of the proposed device.

The device contains a balanced modulator 1, a capacitive memory element 2, a lance demutor tor.

Balance modulator 1 b consists of resistors 4 and 5 and key 6, capacitive storage element 2 consists of resistors 7 and 8 and capacities 9 and 1O, balanced demodulator 3 consists of resistors 11 and 12 and keys 13 and 14. The proposed device works as follows in a way. When the open key 6 is on the left plates of the containers 9 and 10, potentials arise, the value of which is relatively zero bus is equal respectively to -, p. Symbols. a. non. and where U is the voltage of the interference signal; “- the voltage of the payload. The keys 13 and 14 are closed and the potential is formed at the output terminals of the device, the value of which is strictly zero and does not depend on the magnitude of Ugv and PSI. When the keys 6 and 13 are closed, the potentials of the left plates of the capacities 9 and 10 are equalized. At the same time, the overdischarge current of the capacitors 9 and 10 flows through the corresponding circuit. If the time interval tl during which the switch 6 is closed and the switches 13 and 14 are open, is less than the value 7 R-, t7 КДС. where P,,, CQ are the resistance values and capacitances of the respective resistors 7 and 8, and capacitors 9 and 10, then the recalculation current of the capacitances 9 and 1O during f) does not change and is equal to

/ 114-

. . T.Sinf. r) Uftx

g - K7

The potential difference between the output k; 1 lemma is, therefore,

Uft.

A constant longitudinal disturbance voltage (common-mode voltage) can cause transverse disturbance at the output, which is difficult to distinguish from the useful signal and is equal to

TJi and -Irr -r -n.oInfLtg TA

I

vTii xra

- resistance

Where

leakage of capacitors 9 and 10, respectively.

Claims (1)

1. Control computers in process control systems, M., Mir, 1975, Vol. 1, p. 253-261, fig. 101, Trans. from English, (prototype). 74 At the end of the time interval, the key 6 is opened, and the keys 13 and 14 are closed. In this case, the potentials are restored on the plates of containers 9 and 10. The time interval required for restoring the initial potential distribution is not less than 7 (1 + Kc + +% + R). C where - The time constant R ,, С}. C must be 8–10 times greater than the key response spread over time b. If the AC voltage is applied, then the magnitude of the transverse interference is determined by the imbalance {"of the values of K. and Rg. CQ. The invention allows a substantial increase in the permissible common mode noise at the input.