SU780048A1 - Analogue storage - Google Patents

Description

one

The invention relates to an analog technique and is intended, in particular, to store instantaneous values of the signals under study at certain points in time.

The device can be used in high-speed analog-to-digital converters.

One of the main components of analog-to-digital converters, designed to convert variable voltage values into a code, is a sampling and memory unit.

The device l has found wide application in stroboscopic oscilloscopes. It contains a bridge circuit assembled on four diodes, the input of which includes a signal generator and the first resistor, and the output a first capacitor, a balancing transformer, the output terminals of the windings of which are connected to the points of connection of the cathodes and the anodes of the diodes, and the input terminals through the second and third resistors are connected to bias sources + Ef | and EP, respectively, and through the second and third capacitors to the strobe pulse generator. For satisfactory operation of the circuit, it is necessary that both arms of the circuit have the same parameters. .

The disadvantage of the device is

5 that the storage capacitor is charged through ohmic and differential resistance of the switching diodes, which leads to an increase in the sampling time, and

10 most and to increase the aperture time.

The closest in technical essence to the proposed device is an analog storage

5 device 2. The device contains a differential amplifier, switching diodes and transistors, a storage capacitor; which is connected to the gate of the field effect transistor. A differential amplifier assembled on two transistors and four resistors controls an accelerator assembled on two transistors, the bases of which are connected to

25 to the load resistors, respectively, and the emitters, via feedback resistors, are respectively connected to the power source + EP. The resistor and the base are connected to the collector of the second transistor

a key transistor, between which emitfepoM and the power source Efl is a resistor connected. Diodes and two capacitors are connected in series between the collectors of the first transistor amplifier and the key transistor. Point

the connection of the cathode and the anode of the diodes is connected to the storage capacitor and the gate of the field-effect transistor. The second output of the storage capacitor is connected to the housing. The collector of the first key transistor is connected to the collector of the second key transistor and the resistor, and the collector of the first transistor of the amplifier is connected to the collector of the third key transistor and resistor. The bases of the second and third key transistors are connected to the source of strobe pulses. The drain of the field-effect transistor is connected to the source +, .а a resistor is connected between the source - E „and the drain.

The drawback of the device is the high requirements with respect to the symmetry of the parameters of the circuit shoulders. (With center-alignment of the parameters of the shoulders of the arm in k; which arm includes trimming capacitors), and also relatively low frequencies. circuitry due to the presence of diode capacitances through which the input signal passes to the output of the circuit when the second transistor of the amplifier and the first key transistor are closed

The aim of the invention is to increase the speed of the device and its simplification.

The goal is achieved by the fact that in an analog storage device containing a storage element, for example, a capacitor, one plate of which is connected to the zero potential bus, the other plate of the capacitor is connected to the input of the source follower for the yarn,. the output of which is connected to the output of the device; a differential amplifier; the inputs of which are connected to the inputs of the device, keys, nonlinear elements, control bus and pt-bus.

an initial voltage level recovery stage, a differentiating RC-circuit and three voltage dividers, the first inputs of which are connected to the power bus, the second inputs of the voltage dividers are connected to the zero potential potential, and the output of the first voltage divider. not with the input of the primary key and through the first nonlinear element with the output of the differentiating RC chain, the input of which is connected to the control bus, the output of the second divider is connected to one of the inputs of the second key, the other input of the second key is connected to the output of the differential amplifier

and the output of the first key, the output of the second call is connected to another capacitor plate and the output of the cascade of the initial voltage level, the output of which is connected to the output of the third voltage divider and the second nonlinear element with the output of the differentiating KS chain.

The drawing shows a functional diagram of the proposed device. It contains a storage element, for example, a capacitor 1, a differentiating RC-chain 2, a voltage divider 3-5, keys 6 and 7, an initial voltage level recovery stage 8, a source voltage follower 9, a differential amplifier 10, a power bus 11, control bus 12, non-linear elements 13 and 14.

The device works as follows.

In the initial state, when no switching pulse is applied to the cord 12, the transistor of the key 6 is open, and the transistor of the key 7 and the transistor of the cascade 8 are closed. The input signal is amplified by a differential amplifier and a key transistor b.

When a switching pulse arrives, the front edge of it through the nonlinear element 13 is supplied to the bases of the transistor of the switch b, which is closed, and the transistor of the switch 7 opens.

The capacitor 1 is charged through the transistor of the key 7 by the collector current of the transistor of the key 6, the value of which depends on the input signal. After the potential of the base of the tra, the key of the transistor 6 becomes less than the potential of the base of the transistor of the key 7, the capacitor 1 holds the memorized voltage. After the action of the switching pulse, it decays through the non-linear element 14 and the capacitor 1 is applied to. the base of the cascade transistor 8. The said transistor opens, and the capacitor 1 is quickly discharged to potential. cial case The voltage value on the capacitor 1 is repeated by the source follower 9 and feed from the input to the analog-digital converter.

The proposed device has several advantages over the prototype. First, changing the parameters of the differentiating chain 2 and the parameters of the voltage dividers in the bases of the transistors of the keys 6 and 7, you can simply change the sampling time, and the saglism and aperture time of the analog-to-digital image. Secondly, the transistor key 7 works on the open and does not go into saturation mode, which makes it possible to pea maximize the speed

Claims (1)

Claim An analog storage device containing a storage element, for example, a capacitor, one lining of which is connected to the zero potential bus, the other lining of the capacitor is connected to the input of a voltage follower, the output of which is connected to the output of the device,