SU759968A1 - Device for measuring orthogonal components of signal - Google Patents

Description

The invention relates to the field of measurement technology using digital filtering and can be used in radio control, radio navigation, as well as in other areas of technology where it is necessary to measure the orthogonal components of the signals against the background of noise. .

A device for measuring orthogonal components is known, which contains a crystal oscillator, a frequency divider with a variable division factor, a code-analog converter, an encoder, a control unit, an analog-code converter, multiplication blocks, and reversible counters {ДЗ ·

A disadvantage of this device is the limited frequency range, which is due to the time of the operation of the product of the codes of signal samples to the codes of orthogonal functions.

ten

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A device for measuring orthogonal components is known, which maintains an analog-to-digital converter with serially connected conversion units and a register, AND logic elements, OR logic elements, an inverter, a counter, consisting of triggers 30

25

first and second digits, and two accumulating adders £ 2].

A disadvantage of this device is the limited range of frequency analysis associated with single-channel and the implementation of a multi-channel device leads to an increase in the number of equipment. Multi-channel appears, if necessary, overlap. a range of analyzed frequencies near a narrowband bandpass digital filters. When implementing a multichannel device, the amount of hardware increases in proportion to the number of channels, since the coding frequency is rigidly associated with the frequency of the reference signal. In addition, when implementing a multichannel device, the systematic component of the error of the ADC will enter into the error in determining the orthogonal components of the signal, which will lead to the error in calculating the signal frequency.

The purpose of the invention is to expand the range of frequency analysis and simplify the technical implementation of multi-channel signal processing.

The goal is achieved by the fact that a device containing an analog-to-digital converter, the first register, the first

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and the second accumulating adders and the control unit connected to the analog-digital converter are equipped with an information shift unit, a shift sign generation unit, a sign analysis unit, a second register, first, second and third adders, first and second code inversion units, a sign generation unit the sign and the first and second additional blocks of the shift, and the information output of the analog-to-digital converter is connected to the inputs of the information shift block and the shift sign generation unit, the output of which is connected with the control input of the information shift block and through the second register with the control inputs of the first and second additional shift blocks. The output of the information shift block through the first register is connected to the first input of the first adder, the direct and inverted outputs of the first and second adders are connected respectively to the inputs of the first and second inversion blocks of the codes, the outputs of which are connected respectively to the inputs of the first and second additional shear blocks and the first inputs of the first and second adders. The outputs of the first and second incremental shift blocks are connected respectively to the second inputs of the second and first adders and information inputs of the first and second accumulating adders. The sign output of the analog-digital converter is connected to one of the inputs of the sign analysis unit, the second input of which is connected to the second output of the control unit, and the output is connected to the sign inputs of the first and second inversion blocks of the first and second accumulating adders. The third and fourth outputs of the control unit are connected respectively to the control inputs of the second register and through a serially connected third adder, the output of which is connected to the input, and the sign characterization unit подсоедин are connected to the control inputs of the first and second code inversion blocks.

........... A block diagram of the device is presented.

in the drawing.

‘The device includes analog-to-digital, converter (ADC) 1, block 2 of information shift, block 3 of formation; the sign of the shift, unit 4 analysis znaka, the first and second registers 5 and 6, the control unit 7, the first, second and third adders 8, 9 and 10, the first and second blocks 11 and 12 code inversion, block 13 of the formation of a sign, the first and the second additional shift blocks 14 and 15, the first and second accumulating adders 16 and 17. '

The device works as follows.

One of the inputs of the ADC 1 receives a signal and (ΐ), and the other input from the control unit 7 is a series of pulses \ following with an interval T determining the moments of taking samples of the signal. On the n-bit sampling ADC output code X 1 is formed _to corresponding to the largest sample module, and a sign of the sample mark W _n X _k.

Code (X ^) is fed to the inputs of blocks 3 of the formation of signs of shift and block 2 of information shift. The block of formation of the sign of the shift analyzes the input code (X _to ) and determines the position of the highest unit in the bit grid. In the presence of the highest code point unit in the lower bits of the discharge grid, block 3 forms a shift command K _p , arriving at shift unit 2, in which the code (X _c ) is shifted by the corresponding number of bits P until the discharge grid is completely filled. The generated code (X _к ) 2 ° goes to the first register 5, where it is remembered for the time T. The shift commands Kp are remembered at the same time in the second register 6.

C register 5 code (X _to ) 2 ^P is fed to one of the inputs of the adder 8, the output of which is connected to the first block 11 inversion codes, where the command from block 13 forming the sign of the sign. or from block 4 of the analysis of the sign, direct or reverse codes are formed, the summation of which in adders is equivalent to subtraction.

The output of the first block 11 of the inversion codes is connected to the input of the first additional block shift 14, which performs the shift codes. To the second input of the adder 8 is connected to the output of the adder 9, through the second block 12 inversion codes and the second additional block 15 of the shift. Blocks 14 and 15 are controlled in accordance with the signs of the shift coming from the second register 6. To the first input of the adder 9, the output of the first additional block 14 of code shift is connected, to the second input-output of the second block 12 code inversion simultaneously connected to the input of the shift block 15 codes.

The sampling sign Х _К (3 _М Х _к ) from the output of the A / D converter 1 is fed to one of the inputs of the sign analysis unit 4, on the other input of which the control unit 7 outputs a sign of a quarter of the support function · Зц <3 ^. ·

The sign analysis unit 4 forms a sign corresponding to the sign of the algebraic product of the sample sign and the sign of the support function. The formed feature is fed to blocks 11 and 12 of the inversion of codes, on the outputs of which, in accordance with it, direct or reverse codes are formed, which are fed to accumulating adders 16 and Ι 7.

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The control unit generates reference current value fuktsii so5sH angles _to and δίηοίχ, and the necessary constants are applied to inputs of the third adder 10. At the output of the adder 10 is connected a block 13 the sign of the formation of feature 5 Bani.

Coming to the input of the adder 10, the values of the current angle of the support function are summed with the constants equal to a ^{= 2: 1} in accordance with the equations

Stage I

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where I = ± 1; ! - iteration number, ί = 0, 1, 2 ,. .., p-1,

n is the number of iterations.

Initial conditions: c / - ₀ =, _{O o} = 0

X _about = <X _K ) 2 ^P. 20

Block 13 of the formation of the sign

the sign forms the / ¹ sign arriving at the code inversion blocks. Adders 8, 9 and blocks 11, 12 inversion of codes carry out operations of summation of 25 codes and their inversion in accordance with the equations

Have stage

x · = χ · <- "2. % ·.

ί · ^l £.

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The input of the adder 8 is entered code (X _to ) 2 ^p , to the input of the adder 9 - code equal to 0, to the input of the adder 10 - code 35 C ^ ,. After η iterations, the output of the adders 8, 9 is the product of K (Χ _ν ) 2 ^P (s ί pA _k ) I K (X _c | 2 ^p (co5 <L _k )), respectively. When performing iterations, the inversion blocks of the codes are controlled by 40 sign „formed

block 13, blocks shift 14 and 15 are controlled by commands from control block 7, which form shifts 2 ' ^b . The obtained product codes from the output of 45 adders 8 and 9 are sent to blocks 11 and 12 of the code inversion, respectively, at the output of which direct or return codes are formed in accordance with the sign received from block 50 of the sign analysis, i.e. the sample sign and the reference function sign are taken into account. Codes КХ _К 2 ^ρ δίηοΙ _κ and ΚΧ, ς- 2 ^Р Soz ** · arrive at blocks 14 and 15 of the shift, where the command from register 6 performs the required shift by 2 ' ^p discharges. Formed codes ΚΧ _κ & ΐηοί _κ and KX _to so5 <X _to from the output of blocks 14 and 15 of the shift arrive at accumulating adders 16 and 17, which produce the following operations:

K-5 Ν-1.

A “K 1 X _y 5 ϊ η and B =. K U. X с05й „,

cGo ^to KO ^{4 k}

where N is the number of samples.

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The proposed device allows you to extend the frequency range of the studied signals in multi-channel processing and reduce the number of equipment in multi-channel measurement systems for measuring the amplitude and phase of the signal with high accuracy,

Claims (1)

Claim A device for measuring orthogonal components of a signal, containing an analog-to-digital converter, a first register, first and second accumulating adders, and a control unit connected to the analog-to-digital converter, distinguishing it from me in order to extend the frequency analysis range and simplify the technical implementation in multichannel signal processing, it is equipped with an information shift unit, a shift sign generation unit, a sign analysis unit, a second register, first, second and third adders, first and second Inverted blocks of code inversion, a sign forming unit and the first and second additional shift blocks, the information output of the analog-digital converter connected to the inputs of the information shift block and the shift sign generation unit, the output of which is connected to the control input of the information shift block and the second register with control inputs of the first and second incremental shift blocks, the output of the information shift block through the first register is connected to the first input of the first adder, direct and inverted outputs ervogo and second adders are connected to. oppressively with the inputs of the first and second blocks of code inversion, the outputs of which are connected respectively to the inputs of the first and second additional shift blocks and the first inputs of the first and second adders, the outputs of the first and second additional shift blocks are connected respectively to the second inputs of the second and first adders and information inputs: the first and second accumulating adders, the sign output of the analog-to-digital converter is connected to one of the inputs of the sign analysis unit, the second input of which is connected to the second the output of the control unit, and the output of ;, is connected to the sign inputs of the first and second inversion blocks of the codes of the first and second inversion blocks of the codes of the first and second accumulating adders, the third and fourth outputs of the control unit are connected respectively to the control inputs of the second register and sequentially connected third adder , the output of which is connected to the input, and the forming unit recognizes ........ '7 Each sign is connected to the control inputs of the first and second blocks of the InSier codes. '............... -