SU748786A1 - Device for control of parallel inverter with inductive power-diode compensator - Google Patents

Description

The invention relates to a conversion technique, in particular, to a DC voltage conversion device, using a current inverter. Devices are known that contain an inverter bridge and an inductive valve compensator with control units for the valves of the inverter bridge and the compensator 1, 2. The disadvantage of such schemes is the instability to short circuits, which is expressed in the inverter tipping over, the absence of an emergency current in short circuits, the loads when the inverter is in autonomous mode, which leads to non-selective protection performance. The device for controlling the parallels is the closest to the technical essence of this invention an inverter with inductive-to-valve: a valve with an inverter, containing current sensors for the inverter valves, linear voltage sensors, control units for the inverter, and a compensator from the channel by the number of valves, each of which includes uprayen pulse shapers and a logic unit associated with current sensors and an inverter control unit h. . In such a device, the irreversible process of overturning the inverter is eliminated, conditions are created for the selective protection operation, but the restoration of the normal operation of the inverter after the elimination of the short circuit is not ensured. Non-phase relative to the output voltage. Inverter switching on of the compensator valves after switching off the short-circuited circuit may result in disruption of the phase alternation and breakdown of the inversion. The purpose of the invention is to increase the reliability and improve the dynamic characteristics of the inverter. To achieve this goal, the logic unit is additionally equipped with AND, OR-NOT elements, two OR elements and a delay element with two inputs, and each channel of the compensator control unit is equipped with AND-AND elements, and the inputs of the first OR element are connected to the outputs of current sensors , the inputs of the element OR NOT with the outputs of the sensors, their outputs are connected to the inputs of the element AND logic block, the output of KOTOpo.ro is connected to the first input of the delay element, the second input of the delay element is connected to the output of the second IL element The inputs of which are connected to the outputs of the pulse shapers of the channels of the compensator control system, the output of the delay element is connected to the first input of the elements AND of each channel of the compensator control unit, the second inputs of which are connected to the outputs of the IS channels of the same channels, while the inputs of the AND-N.E elements are connected to the outputs of current sensors of voltage, and the outputs of elements and channels of the control unit of the compensator are connected to the inputs of pulse shapers.

FIG. 1 shows the inverter circuit; FIG. 2 is a schematic of the logic connections of the sensors of the power supply and power supply with control units.

The device contains inverter gates 1-6, inverter control unit 7, logic block 8, compensator control block 9, software device 10, compensator valves 11-16, compensating tanks 17, compensator reactors 18, smoothing reactor 19, software 20, sensors 21 -26,; voltage sensors 27-29, elements 3032IL, elements 33-34, and element. 35 OR NOT, element. 36 AND-NOT, drivers of 37-38 pulses, element 39 of signal delay, 6 channels 40-45 (by the number of gates) of an inverter control unit, 6 channels 46-51 (by the number of gates) of a block

compensator board.

The device works as follows .az. .....

The signals of current sensors 21-26, passage 6 of each channel of the control unit by the inverter through element 32 OR to the controller 37 need prevent the pulsing of the control of the inverter valves, thereby ensuring the necessary sequence of switching on the inverter valves in all operation modes of the inverter and excluding the possibility of the inverter tipping over.

The 1st valve is turned on,

 1 1 3 3 45 6 channels in which

wherein ; . prohibition of 4.5 5.6 6.1 1.2 1.2 2.3 3.4

  Sensor Signals 27-29 Direct

as well as current sensor signals 21-26

bs. dull on the elements

: 5 Ypi-Neu and 30 OR, further sa element

33I logical block. During normal operation of the inverter at the output of the element 30 - a single signal,

the output of elements 35, 33, 39 is zero, the output of elements 34 of each channel of the control unit of the compensator is also a zero signal, therefore, in normal mode, the logic circuit does not affect the operation of block 9 of the control of the compensator. When an external short circuit occurs, the signals of the voltage sensors 27-29 disappear, signals appear at the output of elements 35, 33, 39, 36, 34, which prohibit the impulse drivers 38 of all channels of the compensator control unit.

After switching off the short circuit; the ny prohibition continues to operate due to the delay element 39. A logic circuit analyzes the state

Inverter: detects the inverter valves turned on and compares the voltages on the inverter buses. Depending on the inverter valves and the development of voltage tires, the prohibition on the formation of pulses is lifted, starting with the control pulse of the compensator valve, the activation of which contributes to the favorable development of the correct voltage sequence on the inverter tires.

Thus, the device allows using logical links to eliminate the arbitrary activation of compensator valves after disconnecting short circuits, which ensures fast restoration of the normal mode in the inverter, improves reliability and improves the dynamic characteristics of the inverter, yMeHbDjaeT breaks in the power supply of consumers associated with asari in load chains.

Claims (3)

1. Kovalev F.I., Mostkova G.P., Chvanov V.A., Tolkachev A.I. Stabilized autonomous inverters with sinusoidal output voltage, M., Energie, 1972, p. 14-18, 93-96. 2. Kjeld Tharborg New type of three-phase thyrtstor invertrer, ASEA, Journal, 1972, 1.9-1Y, trans. ONTI VEI, 4801. 3. USSR author's certificate No. 521641, cl. H 02 R 13/18, 1969.