SU743170A1 - Square-wave pulse generator - Google Patents

Description

(54) GENERATOR OF RECTANGULAR PULSES

one

The invention relates to radio engineering and can be used as a master oscillator in digital devices and automatics devices.

A known generator of rectangular pulses, containing an asynchronous RS flip-flop, the first and second logical elements NAND, time specifying. tO RC circuits and acceleration diodes 1,

This generator generates a sequence of pulses of constant period and duty cycle.

The purpose of the invention is to provide adjustment of the period and the duty cycle of the output pulses.

To achieve this goal, an in-square pulse generator containing an asynchronous RS-flip-flop, the first and second logical elements AND-NOT, RC down-time, accelerator diodes connected in parallel with the time resistors of the driving RC circuits, an inverter is inserted the input of the inverter is connected to the input of the first NAND logic element and connected to the unit, the output of the RS flip-flop, and the output to one input of the second NAND logic element, and the other input of the second NAND logic element is connected to the zero output of the RS trigger, and m master RC circuits are connected between the outputs of the NAND logic elements and the set-up inputs of the short-circuit trigger. .

The drawing shows a schematic diagram of the device.

The device contains an asynchronous RS-flip-flop 1, the first and second logical elements AND-NOT 2. and 3, the time specifying RC circuits 4 and 5 consisting of resistors 6 and 7, capacitors 8 and 9, diodes 10 and 11, inputs and outputs 12-25.

A square pulse generator works as follows.

When the supply voltage is applied to the generator circuit, the capacitors 8 and 9 of the time of the driver elements 4 and 5 are not charged. From the outputs of the time of setting the elements 4 and 5, the zero potentials are supplied to the installation inputs 23 and 18 of the RS flip-flop 1, and high voltage potentials appear at its outputs 24 and 25. From the output 24 of the RS flip-flop 1, a high potential is fed to the input 19 of the input logic element AND-NOT 2 and

At the input 12 of the inverter 8. At the outputs 20 and 13 of the logic element 2 and the inverter 8, low potentials appear. From the output 13 of the inverter 8, a low potential arrives at the input 15 of the AND-NE logic element 3, the second input 14 of which receives a high potential Output 25 of RS flip-flop 1 in accordance with the logic function performed by logic element 3 and at its output 16 a high potential appears, which the input time of the driver element 5 enters. The capacitor 9 is charged through the accelerating diode 11 to this potential. From the output 17, the time of the driver element 5, a high potential arrives at the installation input 18 of the QC-flip-flop 1. At the output 24 of the RS-flip-flop 1 a low potential appears, and at its output 25 the high potential remains. From the output 24 of the RS flip-flop 1, a low potential is supplied to the stroke 19 of the logic element 2 and to the input 12 of the inverter 8, At the outputs 20 and 13 of the logic element 2 and the inverter 8, high potentials appear. From the output 5 of the logic element 2 high potential flows to The input 21 is the time of the driver element 4. The capacitor 8 is charged through the accelerating diode 10 to the level of this potential and at the output 22 the time of the driver element 4 appears high potential that is fed to the installation input 23 of the RS flip-flop 1. From the output 13 of the inverter 8 high potential enters n-and-you the stroke of the generator of rectangular pulses and to the input 15 of the LO1ic element 3; Since at the input 14 of the logic element 3 there is already a high potential, which is supplied to it from the output 25 of the RS flip-flop 1, the output 16 of the logic element 3 causes a low potential that arrives at the input, the time of the setting element 5. Accelerating diode 11 it closes and the capacitor 9 starts to discharge through the resistor 7 - at the output 17 the time of the driver element 5 and at the installation input 18 of the RS flip-flop 1 the potential starts to decrease. When the potential decreases to the trigger threshold of the RS flip-flop 1 at input 18, the flip-flop switches and at the output 24 of the RS flip-flop 1 a high potential appears, which is fed to the input 19 of the logic element 2 and the input 12 of the inverter 8, at the output 25 of the RS flip-flop . 1, a low potential appears, which is fed to the input 14 of the logic element 3, at the output 16 of which, a high potential appears. At the outputs 20 and 13 of the logic element 2 and the inverter 8, the following potentials appear. From the output 13 of the inverter 8, a low potential arrives at the input 15 of the logic element 3.

to the output of the square-wave generator.

In this way, a pulse is generated at the output of the generator of rectangular pulses, the duration of which is determined by the time of the driver element 5 connected between the output 16 of the logic element 3 and the setup input 18 of the RS flip-flop 1, and does not depend on the time of the driver element 4.

From the output 16 of the logic element 3, a high potential arrives at the input. During the setting element 5, the capacitor 9 is charged through the accelerating diode 11 to this potential. At the same time, from the output 20 of the logic element 2, the low potential arrives at the input 21 of the time of the setting element 4, the accelerating diode 10 closes, the capacitor 8 through the resistor b begins to discharge; at the output 22, the time of the driver element 4 and at the installation input 23 of the RC flip-flop 1 is reduced. When the potential reaches the trigger threshold of the KZ-trigger 1 at input 23, the trigger switches and at its output 25 a high potential appears, which enters input 14 of the logic element 16, and at output 24 RS-flip-flop 1, a low potential appears to the input 19 of the logic element 2 and to the input 12 of the inverter 8. At the outputs 20 and 13 of these logic elements, high potentials appear. From the output 13 of the inverter 8, a high potential arrives at the input 15 of the logic element 3 and to the 1st input of the square pulse generator.

Thus, a pause is generated at the output of the generator of rectangular pulses, the duration of which is determined by the time of the master element

4, connected between the output of the logic element 2 and the setup input 23 of the RS flip-flop 1, and does not depend on the time of the driver element 5. Since the duration of the pulse at the output of the generator of rectangular pulses is determined by the time of the driver element

5, and the duration of the pause between pulses is the time of the driving element 4, then we have a case of independent adjustment of the time parameters of the signal at the output of the generator of rectangular pulses.

The prepaid square pulse generator can be used in digital automatics digital automatics circuits, pulsed technology devices, software-controlled machine tools, in television, and in discrete communication systems as a master oscillator with adjustable time parameters of a pulse train over a wide range.

Claims (1)

1. USSR author's certificate No. 496657, cl. And 03 K 3/28, 1973 (prototype). five n; - I 31 r1g cV-% W - .rJ