SU705468A1 - Digital integrator - Google Patents

Description

The invention relates to the field of automation and computer technology and can be used in adaptive control systems and specialized computing machines. When solving difference equations and implementing extreme control algorithms, accumulation schemes are used to perform the operation of summation, averaging, automatic step change of parameters. The exponential smoothing device used for stepwise change of parameters when registering variables on a logarithmic scale consisting of two integrators is known. used as analog elements of memory, resistors and switches, in which the output of the first integrator is connected to the input the second, and the output of the second through the divider is connected to the input of the first, while the delayed output signal with a certain weight is summed on the peo integrator with the input signal flj., 1 The disadvantage of this device is that the second intensifier is passive, since only to rewrite the signal from the first integrator and its delay. It is also known to integrate a device that sequentially combines input and output signals at equal intervals of time. It contains two analog storage devices, the comparator | reversing keys on the inputs and outputs of the CAM 2. The disadvantage of this device is great complexity, since each analog storage device is an amplifier with resistors, a key, a rectifier and a storage element on a magnetic core. The closest to the invention is a device containing memory

blocking, Each of the Koropbjxs is made on an operational amplifier, the input of which is connected to the memory element and one output of the feedback resistor, and the outputs of the storage units through the first switch and the variable scale resistor are connected to the integrator's input, the second switch connected to the integrator, and the sensor time intervals connected to the control inputs of the switches.

The disadvantage of the prototype is its complexity and lack of accuracy, since, due to the fact that the storage units invert the sign, a third amplifier is necessary for the operation of the device.

The purpose of the invention is to improve the accuracy and simplify the device.

The goal is achieved by the fact that the discrete integrator contains an additional variable scale resistor, and in each storage block a key is inserted, the switching contact of which is connected to the output of the operational amplifier, the closing and opening contacts of the key of the first storage block are connected respectively to the storage element of another reverse resistor output connection of the operational amplifier of this unit, and the closing and opening contact of the key of the second storage unit are connected respectively to another the output of the feedback resistor with the storage element of the second storage unit, wherein the opening contact of the key of the first storage unit and. the closing contact of the key of the second storage unit is connected to the terminals of the additional variable scale resistor and to the inputs of the second switch.

The drawing shows the scheme of the proposed discrete integrator. Oa contains: a storage unit 1, a storage unit 2, a variable scale resistor 3, a first switch 4, an additional variable scale resistor 5 a second switch 6. A storage unit 1 consists of an operational amplifier 7 with a feedback resistor 8, a storage element 9 and 10. The storage unit 2 consists of an operational amplifier AND with a feedback resistor 12, a recording element 13 and a switch 14.

The time slot sensor 15 controls the keys ..

Discrete integrator - the filter implements the algorithm:

  in (-T).

1 1,2,3, ...,

IJBb.)

- output voltage

0 where at the time of reference ii;

Waxhiv

- input voltage at time tj;

.-t) is the output voltage of the previous countdown (); T is the quantization interval; (- transfer coefficient

input signal; K2 - transfer coefficient

output signal. In the initial state, the switch 4 and the key 14 are in the lower position, the switch 6 and the key 10 are in the upper position. The output signal is read from the amplifier 7 of the storage unit 1. The input signal is fed through a resistor 3 and a switch 4 to the input of the amplifier 11 of the storage unit 2. At the same time, it is multiplied by a factor K selected by the variable resistor 3 and resistor 12 and satisfying the equality the coupling of the amplifier 11 is broken and from the resistor 12 to the ago input is supplied a b1 input signal from the storage unit 1 via the variable resistor 5, which together with the resistor 12 of the output signal

. is in tracking mode. On his way out

an error voltage is generated, the magnitude and sign of which are determined by the input signals. This voltage, via a switch .14, is applied to the input of the storage element 13. Negative feedback is provided in the recording loop. Under the action of the control voltage, the memory element 13 triggers this error, as a result of which the currents in the input circuit of the amplifier 11 are equalized.

Claims (3)

In the next cycle, the storage unit 1 is transferred to the tracking mode (recording), and the storage unit 2 is transferred to the read mode. The switch 4 and the key 14 are moved to the upper position, and the switch 6 and the key 10 are moved to the lower position. The recorded signal is read through switch 6 from the output of amplifier 11. The input signal goes through resistor 3 with weight K switch 4 to input of amplifier 7. The feedback through resistor 8 is broken. The output signal from the storage unit 2 with the weight through the variable resistor 5 and the resistor 8 is also fed to the input of the amplifier 7. The total voltage from the output of the amplifier 7 is fed to the input of the storage element 9, which is running this signal. After the next all-triggering of all contacts, the entire hub is repeated. If the resistance of the variable resistor 5 is equal, then the output signal transfer ratio K-, / СЯ 6-vTZjVR | R 81 Kgttl the device operates in the discrete integration mode. At the output, we have:. Due to the fact that in the proposed device, the resistors 8 and 12 are used in the recording mode of the output signal as input, and in the read mode of the recorded signals as feedback resistors, the automatic transmission of signal transfer factors by means of memory blocks is achieved. 1 and 2, equal to one. The constant integration time depends on the K / J input signal transfer ratio and the quantization interval T and is equal to T. When using the device in adaptive systems, when the object is unsteady: it is not worth it, it does not make sense to take the results of experiments with the same weight, since the value of the old information is much lower than the new one, because the strict data may not correspond to reality. In these cases, the algorithm for forgetting old values is needed. In the algorithm with exponential memory, the terms that are included in the 6th time are taken with a weight that would exponentially / as they move away from the moment -fc. . Similar to this algorithm and the formula of the recurrent equation of the first order smoothing smoothing, PIC ICGI-OS, the proposed discrete integrator implements exponential smoothing algorithms: (t, r-ocu / 4.), 7 8 where cC is the smoothing coefficient. Since the memorized elements 9 and v 13 in the write mode compensate for the input signals, at the output of the amplifiers 7 and C in the read mode, output signals of the same polarity as the input signals are formed after inverting. Therefore, the proposed device in the third inverting amplifier does not need. The proposed discrete integrator has several advantages over a device for sliding averaging a variable parameter. Due to the presence of keys at the outputs of each of the amplifiers of the storage units and the connection between them through a variable resistor, when using the device in the integration mode (the resistor 5 is equal to zero), the transfer coefficients between these units are automatically equal to one. It also makes it easier to use the device in the smoothing mode, as it requires fewer settings. The proposed device has the same functionality as the prototype, however, it contains 1 amplifier and 3 less resistors. Claims of the invention A discrete integrator containing memory blocks, each of which is made on an operational amplifier, to the input of which is connected a memory. A single element and one output of the feedback resistor, the inputs of the storage units through the first switch and the variable scale resistor are connected to the input of the intranitor, a second switch connected to the output of the integrator and a time sensor connected to the control inputs of the switches, characterized in that, c The purpose of the device is to simplify the accuracy of the device, it contains an additional variable mass resistor, and in each storage unit a key is inserted, the switching contact of which is connected to the output peradionno. closing the opening contacts of the key of the first storage unit are connected respectively to the storage element and another output of the feedback resistor, operating unit 770. , -. -. the amplifier of this unit, and the closing and opening contacts of the key of the second storage unit are connected respectively to another feedback resistor and with the storage element of the second storage unit, with the opening contact of the key of the first storage unit and the closing contact of the key of the second storage unit connected to the signals of the additional variable scale resistor on the inputs of the second switch 8 Information sources taken into account during the examination 1. Korn G., Korn T. Electronic analog and analog-digital computing systems -Mir, M., 1968, p.1O4. 2. Authors certificate of the USSR 271126, cl. Q 06 G 7/18, 1968. 3. USSR author's certificate number 2655,74, cl. G 06 7/12, 1968 (prototype). Well Jf I