SU661739A1 - Staircase voltage shaper - Google Patents

Description

(54) STAMP VOLTAGE FORMER

one

The invention relates to a pulse technique and can be used to obtain a step voltage both with a constant increment value and with an increment that increases according to the exponential law.

A stepped voltage driver is known, which contains a capacitor integrated with an impedance connected to the output of a transistor switch controlled by a pulse-width modulator 1.

The disadvantage of such a former is the complexity and limited scope. .

Closest to this invention is a driver comprising an integrating capacitor connected to the output of a transistor switch and a capacitor storage cell connected through a controlled switch to the potential plate of the integrating capacitor 2.

The disadvantage of this former is the complexity and, therefore, low reliability, as well as the inconvenience of the duration of the horizontal portion of the stepped voltage being formed.

The aim of the invention is to increase reliability.

To do this, a step voltage driver containing an integrating capacitor connected via a first key to a constant voltage source, a memory cell, the input of which is connected via a second key to an integrating capacitor, and a switching power source whose output is connected to the control inputs of the memory cell and a second key, an inverter, a current-stabilizing, two-pole, and an additional key are inserted, the input of the current-stabilizing two-pole is connected to the output of the first key, and the output is from home memory cell via a further key, a control input coupled to an output inverter having an input connected to the output pulse power source; In addition, in order to obtain the output signal as an exponential function of time, the current-stabilizing two-pole is made in the form of a resistor.

Claims (2)

FIG. 1 shows the electrical circuit of the proposed shaper; in fig. 2 - time diagrams of his work. The driver contains a switch 1, an integrating capacitor 2, a source of constant voltage 3, a capacitor storage cell 4 formed, for example, matching amplifiers 5 and 6, a capacitor 7 and a transistor switch 8, an inverter 9, a switching power supply 10, a switch 11 on a transistor and a charging circuit formed by a current-stabilizing two-terminal 12 and a switch 13 on the transistor. The positions 14-19 (Fig. 2) denote the considered time points. The matching capacitors of the capacitor memory cell have high input and low output impedance, and the total transfer coefficient K Ki -Ka is more than one, where K (is the transfer coefficient of the matching amplifier 5, Kg is the transfer coefficient of the matching amplifier 6. In the initial state, the key 1 is closed and the capacitor 2 is charged from source 3 to voltage E (Fig. 26). Under the action of a pulsed supply voltage from source 10 (Fig. 2a), keys 8 and 11 are periodically opened for time t. As a result, the output of the generator A constant voltage is established by the value of KE (Fig. 2c), where E is the source voltage 3. Key 13 operates in antiphase with keys 8 and 11, since the gate power is supplied to its gate through inverter 9. When the key G is opened at the moment time 14, the linear charge of the capacitor 2 begins through the closed key 13 and the current-stabilizing two-terminal 12 from the source with the voltage KE (Fig. 26). The keys 8 and 11 are open at the same time. At the time point 15, the key 13 is opened and the keys 8 and 11 are closed , as a result of which the charge of the condenser 2 Pr decreases, and the values of voltage ustanovivschees on capacitor 2 at time 15, is rewritten in memory cell capacitor 4. When this occurs stepwise increment of the voltage at the device output (FIG. 2c). At time 16, the key 13 is again closed, and the keys 8, AND are opened and the capacitor 2 is recharged by the same amount as in section 14-15, since the charging current is stabilized by a two-pole 12. Next, the processes are repeated with the frequency of the pulsed power supply voltage, and a step voltage is obtained at the output of the shaper with a constant increment value {fig. 2c). When key 1 is closed (time 17 in Fig. 2), capacitor 2 is quickly discharged to voltage E and the circuit is ready for the formation of a new step voltage cycle. If it is necessary to form a step voltage, the magnitude of the increment of which increases according to the law of exponential function, a current-limiting resistor is used as a current-stabilizing two-pole. The value of the resistor is chosen from the ratio RC t, where R is the value of the current-limiting resistor, C is the capacitance value of the integrating capacitor, and t is the duration of the control pulses. The operation of the former in this case is explained by the diagrams shown in section 18-19 of FIG. 2 (plots in section 18-19 Constructed for a smaller value of the total transmission coefficient than for the plot in section 14-17). Claims 1. A step voltage shaper comprising an integrating capacitor connected via a first key to a constant voltage source, a storage cell, the input of which through a second switch is connected to a treating capacitor, and a switching power supply, to the output of which the control inputs of the storage cell are connected and a second key, characterized in that, in order to increase reliability, an inverter, a current-stabilizing two-pole and an additional key are inserted into it, and the input is current-stabilized A two-port network is connected to the output of the first key, and the output is connected to the output of the storage cell with an additional key, the control input of which is connected to the output of the switching power supply. . The former according to claim 1, characterized in that, with the purpose of obtaining the output signal as an exponential function of time, the current-stabilizing two-terminal circuit is designed as a resistor. Sources of information taken into account during the examination 1. USSR Author's Certificate No. 414723, cl. H 03 K 4/62, 1974. 2. USSR author's certificate No. 549882, cl. H 03 K 4/62, 1977. No. Fl 1pl1i tplshg %and t