SU642721A1 - Analogue integrator - Google Patents

Description

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The invention is intended for analog computing and measuring devices that require logical adjustment by changing modes.

Analog (integrators with logical control of modes using electronic keys are known and are used, for example, in analog machines with a periodization of solution 11}.

The disadvantage of such integrators is the low accuracy of integration.

Closest to the proposed integrator, which contains a differential amplifier, the output of which, through two successively connected resistors of initial conditions, is connected to the initial conditions of the initial conditions, the common output of the initial conditions resistors through the first spreading key is connected to the inverse of the differential amplifier, connected through sequentially connected locking key and integrating capacitor with outputs of r of a booster amplifier, common {w output of integrating capacitor and locking key of c The star

the disconnecting key is connected to the zero potential bus and through large-scale resistors to the integrator inputs {2.

When a key is closed when inputting the initial conditions, connecting the output of the scale resistors and the integrating feedback capacitor to the zero potential bus (this resistance is of the order of tens or hundreds of ohms), the voltage drops from the integrator input currents and the charging current For each capacitor, and as a result, an error occurs in the initial conditions, which leads to a decrease in the accuracy of integration.

The aim of the invention is to improve the accuracy of integration by reducing the error of setting the initial conditions.

Claims (2)

This is achieved by introducing additional resistors and a switch into the proposed integrator, with a non-perfect input of a differential amplifier connected in parallel to the first auxiliary resistor and an additional closing switch connected to the zero potential bus and through the second terminal to the common resistor of the scale resistors. The structural scheme of the proposed analog integrator is shown in the drawing. The integrator contains the resistors of conditions 1 and 2, some of the outputs corresponding to the source of the initial conditions and the output of the differential amplifier 3, and the other terminals combined together with the inverse of the 1M input of the differential amplifier 3 through a disconnecting key 4. The additional resistor 5 is connected between By using the differential input of the differential amplifier 3 and the zero potential bus, the switching key 6 is connected in parallel to the resistor 5, the disconnecting switch 7 is connected between the junction point of the scale resistors 8, orogo additional resistor 9, the disconnecting switch 10 connected to the inverse input of the differential amplifier 3, the integrating capacitor 11 and the zero potential bus. The voltage error of the initial voltage and the voltage drop across the wrench 7. To the non-spherical input of the amplifier, the divider formed by the resistors 9, 5 is supplied with a half of this voltage (the resistances of the resistors 9 and 5 are equal). But since in the feedback loop provided by the inverted input, there is a divider Of the resistors D and 2, whose resistance is equal, the amplification of the non-spurious input is two, and the error voltage at the output of the differential amplifier is equal in magnitude and sign to the voltage on the key 7. Therefore, the voltage of the initial conditions, equal to the potential difference at the terminals of the integrating capacitor P feedback, the error voltage does not enter and the installation of the initial conditions will decrease significantly. In the mode of 1, the integration of the state of all the keys in the device is reversed and non-inverted, which is transmitted through the key 6 with a note of zero potential, does not affect the operation of the device. Resistor 9, connected in this mode between the integrator's summing point and the zero potential, also has almost no effect on the operation of the circuit. In the proposed device, due to the introduction of a small number of additional elements, it is possible to increase the integration accuracy by reducing the potential for entering the initial conditions due to the finite resistance of the electronic key through which the feedback capacitor is charged. Analog integrator containing a differential amplifier, the output of which is connected to a voltage source with initial conditions through two series-connected resistors of initial conditions, the common output of the conditions start-up resistors through the first disconnecting key is connected to the inverse input i of the differential circuit connected via serially connected closing key and integrating capacitor with the output of the differential amplifier, the common output of the integrating capacitor and the locking key through the second. The disconnecting key is connected to the zero potential of the potential and, through the scale resistors, to the integrator inputs, characterized in that, in order to increase the integration accuracy by decreasing the mounting error of the initial conditions, additional resistors and a key are introduced, and a non-inverted input of the differential amplifier through parallel to each other, the first additional resistor and the additional closing switch are connected to the zero potential bus and, through the second connection resistor, to the common pin of the main cut sources. Sources of information taken into account in the examination 1. A collection of articles Hybrid number system FBC-100. The equipment and principles of its nocTpoeinoi, Institute of Management Problems. M ,, 1974, p. 70 2. Korn G., Korn T. Electronic analog and analog-digital computers M., Mir, 1968, p. 56.