SU635436A1 - Spectrum analyzer - Google Patents

Description

A melting register 5, consisting of / V / 4 flip-flops, is set to the zero state. The count 7 weight function is also set to the zero state. The signals from the outputs of the decoder 8, connected to the outputs of counter 7, shift the shift mode in register 5 and set the sign selector 1 of the analyzed signal to the state corresponding to the pattern of the analyzed signal without changing sign. Under the action of the first sampling pulse from the generator 6 (K-O), the zero bit of the register 5 is set to the "Log. 1, and the signal aligned with the zero-bit output of register 5 transfers the key, for example 2i, to the closed state. As a result, the sample f (KT) with the normal number goes through the weighting resistor, for example, 3i to the input of the adder 4. This corresponds intelligently, / 2g.

 one

life / weight

N

Subsequently, the described cycle repeats (at the rate of arrival of sampling pulses from generator 6) for all samples with sequence numbers ... (L / 4 - 1), which are sequentially accumulated, with corresponding weights in adder 4 (i.e. up to time point K (NI4-1), when in (L / 4-1) -th bit of the register 5 is set "Log. 1, and the key Zp is closed).

Under the action of the N / 4th sampling pulse «Log. 1 is rewritten from the (L / 4-1) th register register 5 to the VU / 4th bit and simultaneously to the counter 7. At the same time, all the keys are 2i-2 "groups 2 are open and this state corresponds to the multiplication N / 4 -K samples for zero weight (hardware multiplication is not performed).

The signal from the output of counter 7 is fed to the inputs of the decoder 8, and the outputs of the decoder 8 generate control signals that set the reverse shift mode in register 5 and the inverted sampling mode of the analyzed signal in block 1.

Under the action (N / 4 + 1) of a sampling pulse from generator 6, “Log. 1 is unrecorded from the (N / 4) -ro bit in the (N / 4-1) th bit of the register 5. This triggers the key, for example 2 ", and (V / 4-il) -H, the signal is sampled through (N / 4-1) -th weight resistor, for example Zp. to the input of the adder 4. In the following, the described process is repeated in the reverse order (shift in the opposite direction) until time point N / 2, when the direction of the shift in register 5 is reversed. In this case, in block 1, a mode change does not occur, which is associated with the 4

2tK

on the interval

cos

.

Further, the process is periodically repeated 5 until time K, N-1. In this case, the device is reset, and at the output of the adder 4, (as a result of performing 4 weighing cycles), an end result is formed, which

10 with an accuracy of the scale factor is proportional to the orthogonal cosine component in the spectrum of the analyzed signal at a fixed frequency lo. The orthogonal components of the spectrum can

15 be computed at all over the 0 ... N-1 frequencies by running the spectr analyzer in the form of a parallel set of the described devices without increasing the volume of control and switching elements.

0 Introduction of the counter spectrum analyzer to the sign of a harmonic weighting function and decoder, as well as new functional connections, distinguishes the proposed analyzer from the prototype in that

5, when analyzing signals with arbitrary base N, the number of precision weight elements and switching elements is reduced four times regardless of the value of L. Such economy of equipment is achieved by four times using the same and the same volume of switching and weighing elements in calculating each of the determined orthogonal components of the spectrum. Last thing

5 leads to a reduction in mass and size, and it can significantly simplify and increase the reliability of such a spectrum analyzer.

Claims (2)

1. US patent number 3466431, cl. 324.77, onlib. 1969. 2. USSR author's certificate number 438939, cl. G 01R 23/00, 1974.