SU610175A1 - Associative storage - Google Patents

Description

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The invention relates to computing.

A known associative memory device (CAM), which contains a drive, a poll register, detectors i.

A disadvantage of this device is the complex firmware of the storage array matrix.

The closest to the technical essence of the invention is an associative memory device containing a p & poller poll, the output of which is connected to one input of a logic unit connected to the detectors, a memory unit connected to a pulse distributor connected to the control unit 21

A disadvantage of this device is the low speed associated with the need to regenerate information in the memory block after each read cycle.

The aim of the invention is to improve the speed of the CAM,

For this, the device contains an additional RAM block, an additional pulse distributor connected to the control unit and OR elements, whose inputs are connected respectively to the information outputs of the RAM, and the outputs to the other inputs of the logical block, information outputs of each the RAM blocks and the outputs of each of the pulse distributors are connected respectively to the inputs of another RAM block.

In the drawing, the diagram of the proposed ACU is functional.

The CAM contains a block of 1 RAM, an additional block 2 of RAM, a poll register 3, complete in the form of a ring shift register, the output 4 of which is connected to one of the inputs of logic block 5 connected to children 6, the distributor 7 pulses, additional dispenser 8 pulses. The composition of each of blocks 1 and 2 includes the pulse formers of the notes 9 and 10, the pulse formers of reading 11, the matrix 12 and 13, executed, for example, from ring magnetic hearts. The device also contains OR 14 elements and a control unit, part of which (trigger 15 and elements 16 and 17) is shown in the drawing. The inputs of the valves 7 and 8 are connected respectively to the outputs of the elements And 16 to 17. The inputs of the elements OR are connected respectively to the information outputs of blocks 1 and 2, and the outputs to the other inputs of block 5, Information outputs of each of blocks 1 or 2 and each of pulse distributors 7 and 8 are connected respectively to the inputs of another block 2 or 1. The device operates as follows. Suppose that in the initial state the information is recorded in matrix 12, and matrix 13 is cleared (stores zero information), trigger 15 is in state 1, Register 3 is recorded in the search image. In all detectors b recorded. The operation of the device begins with arrival of pulses at the input of the distributor 7. Through the formers 11, the bit is read out from the matrix 12. At the same time through the drivers 9 and 10, the information is recorded into the corresponding bit, the matrix 13 by the coincidence of the half currents. In parallel with the rewriting of information from the matrix 12 and 13 through the elements OR 14, the signals arrive at the input of block 5. Block 5 implements the logical function addition modulo 2 (excluding the IL of the corresponding bits of matrix 12 and register 3. Discrepancy of the search code: sample with the content the corresponding bit of the matrix 12 sets the detector 6 to the state O. Next, the next digit of the words from the matrix 12 is copied to the matrix 13. The contents of the poll 3 are shifted to the left by 1 bit. The device operates in this way for mp cycles, (where mn is the number of matrix bits), until all the bits of the polling feature are compared with the information stored in matrix 12, after mn cycles all information is stored in matrix 13. In matrix 12, all zeros are written, since reading is done full current. At the end of the associative sampling cycle, the signal will be only in those detectors 6 where a complete match of the codes of the recorded words with the interrogation sign occurred. When you access the CAM - by the new interrogation attribute - the information is copied from matrix 13 to matrix 12 Signals through the elements OR 14 are received in block 5, etc. Another example of a possible implementation of a CAM is the implementation of all its elements based on an integrated technology. In this case, instead of the matrix of ferrite cores, a matrix of storage elements on MOS transistors is used, made in the form of a large integrated circuit. The storage element of such a matrix is a dynamic memory cell with information destruction when read. In this case, the regeneration cycle is absent, and the stored information is cyclically rewritten between matrices. In general, the AMS will function as described above on magnetic cores with degradable scattering. An inventive memory format, comprising a polling register, the output of which is connected to one input of a logic unit connected to the detectors, a random access memory unit connected to a pulse distributor connected to a control unit, in order to increase speed device, it contains an additional block of RAM, an additional pulse distributor connected to the control unit, and OR elements whose inputs are connected to the infor To the operational outputs of the RAM blocks, and the T outputs to the other inputs of the logic block, the information outputs of each of the RAM blocks and the outputs of each of the pulse distributors are connected respectively to the inputs of the other RAM block. Sources of information taken into account in the examination: 1. USSR author's certificate No. 290322, cl. G-11 C 15/00, 1969. 2.ZEEE tra-nsacttOns from Electronic Computers, 1965, Vol. 14, No. 4, pp. 60O-6O5.

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