SU598242A1 - Timer - Google Patents

Description

(54) TIME RELAY

The invention relates to the field of automation and can be used to obtain time delays in automatic control devices. Known devices using the principle of repetition and containing time specifying 1 C-circuit, thyristor, resistor, diode, command contact. However, such devices have insufficient reliability. The time relays are known, which contain the time specifying the CA circuit, the threshold circuit on the transistor, the executive relay, the command relay, the diode and the resistor 12. The disadvantages of these devices are low reliability and increased power consumption. The purpose of the invention is to increase reliability and reduce consumption of redness. To do this, in the device containing the master RC circuit, the output of which is connected to the input of the threshold cascade on the transistor, in the collector circuit of which the actuator is connected, the emitter is connected to the positive power supply bus through the closure contact of the command relay, diode connected with the anode with the positive a power supply bus, a resistor connected at one end to the free plate of the time of the driving capacitor, a two-stage amplifier with galvanic coupling on transistors of different conduction types and an additional In this case, the base of the input transistor is connected to the output of the NS circuit, the emitter is connected to the cathode of the main diode, the free output of the resistor is connected to the collector of the output transistor of the amplifier, and an additional diode is connected between the capacitor and the emitter of the threshold transistor. The drawing shows a schematic diagram of the proposed device. The device contains the EC master circuit on resistor 1 and capacitor 2, threshold cascade on transistor 3, executive relay 4, make contact 5 of command relay, diode b, resistor 7, two-stage amplifier with galvanic coupling on transistors 8, 9 of different conductivity types and resistors 10, 11, additional diode 12, diode 13, shunt the winding of the executive relay.

The system works as follows.

When the voltage is applied, transistors 8 and 9 are unlocked. Capacitor 2 is charged across the minus power supply circuit - junction collector emitter of transistor 9 - resistor 7 junction base - emitter of transistor 8 diode b - plus power supply bus.

The amplifier modes are chosen such that transistors 8, 9 are in saturation mode and the capacitor charge time is almost completely determined by the values of resistor 7 and capacitor 2. After charging the capacitor, only the leakage current of the capacitor flows through the circuit.

The time delay is calculated from the moment the contact 5 is closed. The capacitor 2 is recharged along the circuit; resistor 1 - source bus - including contact 5 - diode 12. The voltage on the capacitor 2 at this time is closing to the threshold stage on transistor 3, and for the amplifier to transistor 1 8, 9 the current through the electromagnetic relay 4 and the resistor 7 does not flow . When the voltage on the capacitor 2 decreases to the threshold of unlocking the transistor 3, the latter opens, the electromagnetic relay 4 is triggered, and the recharging of the capacitor 2 stops. The transistors 8, 9 of the octcotes are locked, since the transition base-emitter of transistor 8 is shunted by the transition emitter-base of transistor 3, having a smaller threshold value of unlocking. The diode 12 connected in the recharge circuit in series with the capacitor, the voltage of which, summing up with the voltage on the capacitor 2, is equal to the unlocking voltage of the threshold stage, eliminates the polarity of the capacitor 2. When contact 5 is broken, the power supply of transistor 3 is broken relay 4 releases, transistors 8, 9 are unlocked, capacitor 2

it is charged through resistor 7. The device is ready for re-exposure.

Introduction of an additional two-fold amplifier to the time relay circuit reduces shear power, because during the holding time the current through the charging resistor does not flow, the key operating mode of the amplifier increases the reliability of the device and

0 this time preparation of the time relay can be minimized.

Claims (2)

1. Japanese Patent No. 15613, class 98 (5), 5 1972. 2. Author's certificate number 399021, cl. H 01 H 47/18, 1971.