SU595735A1 - Apparatus for testing logical circuits - Google Patents

Description

The invention retreats to computer technology and can be used in all areas of the national economy to troubleshoot logic circuits built on discrete elements, semi-hybrid and integral. Devices for software test monitoring logic circuits are known, containing blocks of input signals, reference output signals, comparisons, data entry, switching, fault indications, controls 1, 2. The disadvantages of the known analogs are reduced to a small depth of searching for faults, which is determined by limited diagnostic features of test programs. The closest solution to the invention is a device for controlling logic circuits containing an electromechanical switch connected to controllable circuits, an input unit whose outputs are connected respectively to the first inputs of the first task register and the control unit whose second input is connected to the output of the first logic comparison circuit. , and the outputs of the control unit are connected to the input unit of the switch switch, the display unit, the input unit, the first formative transformer and the second input of the nerve register task, the output of which is connected to the first input of the first logic circuit compared via a switch-shaper with controllable circuits, connected to the first input of the first commarator-former, the output and second input of which are connected respectively to the second input of the nerve logical comparison circuit and the output of the reference command signals 3. The fault diagnostics in this device is produced by comparing the D1 of the intervening signals from the output of the comparator-former with the signals coming from register assignment. The result is compared to the control unit and the display unit. If the comparator generates an inconsistency signal, then in the display unit on the display, the "Not valid and the address of the defective item is displayed. Due to the imperfection of methods n algorithms in existing devices, it is not possible to localize the place of inconsistency to a separate removable element. Therefore, the existing diagnostic devices allow you to select and display in any way a specific south-nesravny element ONLY a group of suspected elements. The search for a specific search element is subsequently performed manually by the operator using international schemes and tables.

faults with the use of full-length equipment.

The purpose of the present invention is to increase the reliability of control of nonsensitivity, as well as the increase in the speed of the device.

The goal is achieved by those. that a second registrar of assignment is entered into the device, a switch, a second logic circuit and a second generator-shaper, the inputs of which are connected to the electromechanical terminal p to the outputs of the unit given reference signals n the uravlein unit, and the outputs to the first input of the second logic comparison circuit, the second the input of which is connected to the output of the second registra of the task, the inputs of which are connected respectively to the outputs of the input unit, the control unit, the inputs of which are connected respectively to the output of the second circuit logical about eravnenn and ierskl 0chatelem.

Figure 1 shows a block diagram of a device for monitoring logic troubleshooting.

The device contains an input unit 1, a commotor-driver 2, the first register 3 of the master, the second register 4 of the master, the block 5 of the control, the secondary circuit 6 of the logical copy, the second circuit of the logical 7, the forms 8, the second comparator shaper 9, block 10 indkatzpp, controlled (diagiostable) circuit And, block 12 zadapi of standard signals, electromechanical (multi-contact control) probe 13, button 14 of the switch.

The input unit 1 is intended for input into the device of control programs for finding the fault location.

Switch-shaper 2 provides the odds for: calibration and calibration of the form and ampoule of computers that are sent from the Register of Permanent Register 3 tasks and their assignment to the contacts of the diagnosed circuit 11.

The first setting 3 of the reference is not valid for storing test data 1and-1 information about the state of the inputs and outputs of the diagnosed circuit and its output but the signal from the control unit 5 to the commutator transformer 2 and the first logical comparison 6.

The second regetter 4 sets the nrednazchachep for storing the information in the form of the input and output nrover of the 1st element and transfers it to the second 7 of the logical comparison of the signal from the block 5 like.

The control unit 5 generates the control signals and synchronizes the operation of the entire device depending on the signals that are loaded to it from the input unit 1 and the circuits 6 and 7 of the drive.

The first logic circuit 6 is preassigned for comparing discrete signals, and is available through the first collar-driver 8 from the outputs of the diagnostic circuit 11 with the throw signals stored in the first register 3 of the job.

The second logic comparison circuit 7 compares the discrete signals received through the second comparator driver 9 and the control P1, ui 13 from the sources of the element being tested, is located on the corresponding circuit of the corresponding circuit. bit dah second regnstra 4 tasks.

The first compiler 8 is the output for comparing the output

signals of the diagnosable circuit 11 with a calibrated ur, the rams of permissible transparent signals of logical zeros and sets, specified by the block 12 n for transmitting logical signals generated by the equalization of the output signals with the reference signals to the first circuit 6

The second comparator driver 9 is designed to compare the I levels of the sigals on the outputs of the target element to e; an aggregate of my circuit from the dial 11 to the levels up to 1 valid signals of logical signals with units, specified by the block 12 and for transmitting; scheme 7 cpaBHCHJiJi Sigals, but the results of Eravnei

s.nmaemyh signals with reference.

Block 10 1; idikatsnp contains tgblo for 15 luminescence of the inscription "Good or false"; 1, en ny four-bit address display. The first two bits of the pre-order are specified by the address of the defective elemept, the second two are for the specified address of the nerve of the group of suspected elements and failure, to which the multi-contact test probe 13 should be attached.

Circuit 11 is a typical replacement element (TEC), on which hybrid plenum integrated circuits of various degrees of integration are installed or direct elements to which a test probe 13 can be attached.

Unit 12 provides comparators-formers 8 and 9 with the level of permissible ziache11N1 1 logical signals in ieii n unit.

Myogocouaccurate coitrol niyn 13 and | is a Pui. LeFsTpoMexainiiiecKoho type and and a hypoxia for an innpopMacc with conclusions of the suspected 1) failure of an element of a diapaged by scheme 11.

The switch kiopka 14 provides a contact pair that operates on a circuit designed for the input from block 5, and the command command is 5 allowed 1: This is not the case in block 9. Control and diagnostics of the program ССТ01Г1 from the test sequences. Each test sequence contains the failed element or indicates the group of elements among which the failed one is found.

The test sequence includes information about the levels of the signals at the inputs and outputs of the diagnosed circuit, about the distribution of contacts on the input and output, about the permissible levels of calibrated signals and about the address of the element being tested. If the sequence allows only to indicate a grub of suspected elements, then the program includes addresses of the suspected to failure elements, arranged in a certain order, as well as information about logical states on their findings.

The device works as follows.

From the input unit 1, information about the logical states of the inputs and outputs of the diagnosed circuit 11 is recorded in the first register 3 of the tasks. Through the control unit 5, the switch-driver 2 records information on the separation of the contacts of the diagnosed circuit 11 into input and output, as well as the levels of the signals outputted to the circuit. In FicpBbm, the comparator-shaper 8, through the control unit 5, provides information on the choice of standards for the upper five limits of the analyzed parameter.

If the test sequence allows the fault to be localized to the element, in block 10 of the display, the measurement of the detected faulty element is recorded. If the test sequence only allows detection of a group of elements, one of which is faulty, then in the display unit 10, the numbers of the suspected failure elements are recorded in the order in which they should be checked, and the second register 4 of the task records the information logical states of the conclusions of these elements in the same way.

In the second com-airator form. The processor 9, through the control unit 5, records information on the choice of standards for the upper and lower limits of the analyzed parameter.

The contents of the first register 3 task by command from control block 5, generated by the signal from input block 1, are generated in the form of sigals calibrated in shape and amplitude and switched by commutator commutator 2 at the same time on all contacts of the diagiospecting circuit 11. At the same time, the same information from the first register 3 the task arrives at the first logical comparison circuit 6.

The output signals of the diagnosed circuit are placed in the first compressor-for-op iprovider 8 for comparison with calibrated levels of allowable values of zeros n units. In this case, the circuit generates a signal permitting the equation in block 6, if it is real, the imperials lie within the limits determined by reference indications from block 12.

Logical sigals, formed in the form and amplitude, are sent by a command from block 5 to the first logic comparison circuit 6, where they are compared with the signals, post} from the first registrar 3 za.ann.

The result is computed} Snp is entered into control block 5. If g: .1g1 the test circuit according to this test sequence is working normally, unit 5 manages

signal for the next test sequence. Repeat the cycle until a faulty element is detected or until the end of the program. At the end of the program, block 5} correcting by spgnalu pz of block 1 of BiBO gives the block 10 on the idicatspi command in block 10 to display the “Goden.

In the case of a first comparison of the 6th logic signal comparing the signal with a mismatch, the control unit generates a signal according to which in the first two bits of the 10th unit the address of the successive element is displayed if the system allows it to be detected. Illuminated address of the source element means the end of the address.

If the diagnostic ability of the test sequence is insufficient for specifying the address of a specific failed element, 10 in the mountains, -i, and the bits of the block 10; the command for the command of the block 5 of the circuit will display the address of the first group. on the refusal of the z.tyentov. The iipH operator connects the control probe 13 to the specified element, and, after verifying that the switch button 14 is correct, pushes the control command 1 from block 5 control 1 to allow comparison of the checked element from the reference Ml to the values of the logic level bullet p ednntsts.

Block 5 prapnsn.1; it works out like this: 1-: e commander for transmitting the results of the second comparator apalz pz 9 p of the second pei-peter 4 backwards, from 1 sec to the right direction. na second exem 7 logical srash.spp. The result of the comparison is transmitted to control unit 5.

If the element being checked is 1t pegreplenny, then the control unit 5 generates a command to flash in the first two digits of the block 10 of the address of this element. and uj of the second two digits occurs hashsps addressing the same elept. Check) ia this zakopcheNA.

If the power supply is checked, then the unit 5 of the control generates a coma. on which in the second two bits of block 10

You will highlight the address of the following element, to which you need 1p1 copywriting test probe 13. Tccl repeat until lic will be o6n, py; -i; en refusal of the item pz group;; suspicion 15as: First failure.

Thus, the proposed US.; A property for Coptrol logical cxeN provides a search for a specific 11elepteme, less: f1e fia time

localization of a specific emergency unit