SU578644A1 - Digital integrating computer - Google Patents

Description

The invention relates to digital computers and can be used to numerically solve systems of ordinary differential equations, to solve problems that can be reduced to systems of ordinary differential equations, and also to simulate automatic control systems.

A digital differential analyzer 1 is known, which is used to calculate functional functions, converting them into a system of differential equations:

The closest to the invention of the technical essence is a digital integrating machine 2 comprising an etching unit, the first output of which is connected to the control inputs of the information input unit, the memory unit and the information output unit, the output of the information input unit is connected to the input of the memory unit, output which is connected to the input of the control unit.

A disadvantage of the known device is low speed.

The aim of the invention is to improve the speed of the digital integrating

cars.

The goal is achieved by the fact that a register block, two switches, a switch control block and g decision blocks are entered into a known machine, the information input / output of the register block is connected to the information input / output of the memory block, the first input of the register block is connected to the second output of the block control, the second input is connected to the output of the first switch, the first output is connected to the second input of the information output unit, and the second output is connected to the first input of the second switch, the second input of which is connected with the first output of the switch control unit, and the output with the first inputs g of the decision blocks, the second inputs of which are connected to the third output of the control unit, and the outputs to the first input of the first switch, the second input of which is connected to the second output of the switch control unit, input which is connected to the fourth output of the control unit. The drawing shows a structural diagram of the proposed digital integrating machine.

Input device 1 is used to enter numerical and programmnoy information. The inputs of the input device are connected to the inputs of the source device 2 for transmitting numerical and program information.

The outputs of the storage device 2 are connected to the inputs of the block 3 of registers for transmitting numerical information into it, which is necessary for calculating the value of the next simple function, as well as its increments for a given value of the argument. In addition, the outputs of the storage device 2 through the control device 4 are connected to the switch control device 5, which is intended to organize such a connection to the registers of block 3 and decisive blocks 6, which allows to form a single computing device for calculating the value of the next simple function and its increments. Moreover, the inputs of the switch 7 registers are connected to the outputs of the block 3 registers, and the outputs of the switch registers are connected to the inputs of the deciding blocks 6. The outputs of the decisive blocks 6 are connected to the inputs of the switch 8 of the decision blocks, the outputs of which are connected to the inputs of the block 3.

Output device 9 is designed to output information from a digital integrating machine on signals from device 4, control, for which the outputs of block 3 are connected to the inputs of output device 9.

Digital integrating machine works as follows.

Program and numerical information, necessary for solving the task, consisting of codes of functional symbols and addresses of arguments, as well as initial values of functions and arguments and their increments, is recorded into input device 2 via input device 1. After all the information has been entered. recorded, by a signal from the control device 4, the code of the next function symbol, as well as the address of the next function and the address of the arguments are recorded from device 2 into device 4.

In accordance with the addresses of the function and the arguments of the signal from the control unit 4, the values of the function, the arguments and their increments calculated in the previous decision steps are recorded in block 3 from device 2.

In accordance with the code of the next functional symbol, the device 5 controls the switches through 1COMM (register 7 registers connects the outputs of those registers in which the values of the arguments and their increments of the 1st integrator are written (i-, 2 ... m), with the corresponding inputs of the t-ro decision block, the outputs of those registers in which the values of the arguments and their increments of the ith multiplier block (, 2, ..., p) are written, with the corresponding inputs of the (m + i) -To decision block, the outputs of those registers in which the arguments and their increments of another k-ro block are written (, 2, .... ., p) with the corresponding inputs (m + n + k) -YO decision block.

According to the signals from device 4, the first tons of the deciding blocks are tuned to the execution of the integrator algorithm, the next n decisive blocks are tuned to the execution of the algorithm of the multiplying block, the subsequent p blocks are tuned to the other

the corresponding algorithms of the digital integrator to compute a given simple non-hypertranscendental function, so that the entire digital integrating machine contains r m + n + p decision blocks.

The switch control unit 5, through a switch block switch 8, connects the outputs of the decision blocks to the inputs of the registers so that the output value g-ro of the decision block, which is the argument of the |

the deciding unit is placed in the register allocated for storing the corresponding argument of the 1st decisive unit.

After performing the above masking setup for calculating the next simple fuction, | according to signals from device 4, each decision block executes the algorithm specified by it.

The calculated value of the function is sent to memory 2, then the operation cycle is repeated.

The proposed digital integrating machine turns out to be 2-5 times more productive than the prototype, since it consists of 5--12 decision blocks working in parallel.

Claims (2)

1. Kaliev AV Theory of digital integrating machines and structures. M., “Soviet Radio, 1970, p. 17-18. 2.Sb. Automation in design, ed. D. Kalahina. M., “World 1974, p. 103-111.