SU577675A1 - Number-to-pulse repetition period converter - Google Patents

Description

(54) CODE CONVERTER

IN THE PERIOD OF REPETITION №4PULSOV

one

The invention relates to a measurement technique and can be used to convert a parallel binary code of a number during a pulse repetition period.

A number of devices are known for converting a number code during a repetition period of pulses containing a counter, recording gates associated with the counter inputs, a source of calibrated frequency, and triggers to logic circuits.

A known code converter in a pulse repetition period, comprising a counter, a trigger, recording gates, a recording resolution node, a calibrated frequency source with output, a counter output, a delay element output, an output of the recording resolution node l} from the code number

 .

OUT

which leads to significant conversion errors for small values of the numbers Hjx. For example, when W% «3 relative error

fr "- 100% 33%, with Nta 2 the relative strength & 50%, and for Ex: I, the relative error of fts is 100%.

In addition, at different frequencies f (the source of the calibrated frequency also varies, the absolute attenuation of AT is inversely proportional to the law, which is also a drawback of the device.

The aim of the invention is noBUi e accuracy.

This is achieved by the fact that a practitioner of | code in the repetition period

pulses, a source of calibrated frequency, a counter, recording gates, connected to the counter inputs, two additional NOT elements, two digital differentiating elements, an OR element and a counting trigger, the counter output through the first digital differentiation element and the first element NOT connected to control inputs of recording gates

Claims (1)

and to the clock input of the counting trigger, another input of which is connected to the output of the first digital differentiating element, the output of the counting trigger through the second digital differentiating element and the second element Ht; connected to one of the inputs of the OR element, the second input of which is connected to the output of the source of the calibrated signal, and the output of the element OR is connected to the input of the counter. The drawing shows the structural diagrams of the proposed Converter. The converter circuit contains a reference 1 of a calibrated frequency, OR 2, counter 3, the first digital differential element 4, the first element of the NB 5, the counter trigger b, the second digital differential element 7, the second element HE 8, the recording gates 9. The code converter works in a pale way. at the moment to at the output of the counter 3 p o, there is a pulse of the output sequence, equal in duration to the pulse; output source 1. At time t | this pulse ends at the output of element 4. A short inverse pulse of duration t appears. This impulse is set to R to the zero-state trigger 6 and through the first element NOT 5 writes the LJ number in the reverse code to 4 counter 3c using 9 switches. Upon completion of this pulse at the moment ta, trigger 6 triggers with some delay (t) and is set to one: at the beginning of its run time, the inverse pulse at AND input ends, which allows trigger 6 to change its state after the end of the pulse at the clock input. On the falling edge of the pulse from the output of trigger b at the output of element 7, a pulse of duration T is formed, the same as at the output of element 4. This pulse with a delay determined by the operation of the second element HE 8 (t - t) and the element OR 2 It enters (.t) to the input of counter 3 in the pause 1Ipulses from the output of source 1. The entangled number in counter 3 increases by one until the appearance of the first source code 1 after writing the number ББх and the number contained in counted 3 becomes equal (2 -Nftc), n - the number of bits in the counter. With the arrival at the input of the counter 3 of the pulses of source 1, the contents of the rut 3 increases, and when Hte passes pulses at the output of the rut 3, a pulse appears. The repetition period of the output pulses is, ochidically, directly proportional to the number and, and equal to. $ Te Claims of Invention A code converter in a pulse repetition period containing a source of calibration frequency, recording gates associated with counter inputs, in that Precision accuracy, in addition Two elements are NOT included, two two different differential ones 1NFD, dJieiweHT OR and a counting trigger, and the output of the counter through the first digital differentiation element to the first element NV is connected to the control input A record valve and to the clock input of the counting trigger, another input of which is connected to the first digital differential element, the output of the counting trigger through the second digital differentiation element and the second element is NOT connected to one of the inputs of the OR element, the second input of which is connected with the output of the calibration frequency source, and the output of the OR element is connected to the input of the counter. Sources of information taken into account in the examination: 1. USSR Copyright Certificate 375787, M., Class H 03 K 13/20, 1970.