SU560325A1 - Pulse generator - Google Patents

Description

one

The invention relates to automation and computing technology and can be used in the construction of computer synchronization devices.

Known generator on two triggers, on integrated circuits. It generates two sequences of the same frequency and is implemented on four integrated circuits 1.

However, the formation of several pulse sequences using such a generator is impossible.

The purpose of the invention is to create a mode of auto-oscillations with different frequencies.

This is achieved by the fact that, in an image generator containing OR-NOT elements, there is a delay line, the output of the first OR-NOT element is connected to the input of the first delay line and to the first input of the second OR-NOT element, the output of which is connected to the first input of the first OR element -NO, the outputs of each element OR are NOT connected respectively through the second and third delay lines to the second inputs of the specified elements OR NOT.

FIG. 1 shows the block diagram of the proposed pulse generator; in fig. 2- time diagram of the pulse generator.

The generator of the pulses contains the elements OR NOT 1 and 2, the delay lines 3, 4, 5.

At the first moment after switching on the pulse generator, a positive potential is formed at the output of the OR-NOT 1 element; at the output of the OR-NOT 2 element,

negative (with equal probability it can be considered that a negative potential is formed at the output of an OR-NOT 1 element at the first moment of time, and a positive potential at the output of an OR-NOT 2 element, but this does not matter for the description of the generator operation). The potentials at the outputs of the elements OR-NOT 1 and 2 in a static are mutually inverted, since the potential from the output of the element OR-NOT 1 is fed to the input of the element

OR-NOT 2, and the potential from the output of the element OR-NOT 2 -to the input of the element OR-NOT 1.

To describe the operation of the generator, we accept the condition; delay time delay line 3

less than the delay time of the delay line 4 (in principle, and vice versa, and equality of delays).

The negative potential at the output of the element OR NOT 2 is maintained for

time from ti to tz equal to the delay time of the delay line 4. After a negative potential appears at the input of the element OR-NOT 2, a positive potential appears at the output of the delay line 4 at its output. This positive potential is inverted by the element OR-NOT 1, and a negative potential appears at the output. The negative and potential at the output of the ILR1-NOT 1 element remains IB for a time from 2 to tz, equal to the delay time of the delay line 3. After a negative potential appears at the input of the OR-NOT 1 element, a positive potential appears at its output. At the output of the element OR-NOT 2 for the time i - i there remains a positive note, since the output of the delay line 4 still continues to reach the negative and theoretical. At time t, the negative potential from the output of the delay line 4 ends. At the output of the element OR NONE 2, a negative potential is established, at the output of the element OR NONE 1 - positive. The circuit returns to its original state, and the regenerative process described above begins to cycle there again and again. Using the delay line 5, a narrow pulse from the output of the element Р1ЛИ-НЕ 1 can be arbitrarily shifted (and accurately centered) with respect to both positive and negative wide drops from the output of the element OR-NOT 2.

Claims (1)

1. Nat United States No. 3350659, CL. 331-57, 1967. J f .i