SU529547A1 - Fantastic pulse generator - Google Patents

Description

one

The invention relates to a pulse technique.

A fadron is known, which contains a time - driving capacitor, a discharge resistor, a key and a cascade transistor, ejected on MOS transistors, an inverting cascade, an additional key transistor cascade l.

However, such a generator is complicated.

Also known fadron, consisting of an integrator Muller, performed on two transistors, the base of one of which is connected to the master circuit time of a concentrator and a resistor connected to the output of the Muller integrator, and an MDP-type amplifying transistor, whose drain is connected through a resistor to a power source and through a transition circuit with a gate of the corresponding transistor of the integrator Muller, the substrate is connected to the common bus, and its drain is connected to the source of the second transistor of the integrator Muller, and the gate is connected to the source com bias 2.

This generator has an insufficient duration of the generated oscillations and

very long return time.

The aim of the invention is to increase the duration of the yrhpfugal impulses with a reduced time-reversal.

This is achieved by introducing a MDP type transistor into the Muller integrator, the output of which is connected to a common bus, the source is connected to the receiver: a mixing source, and the drain and gate are connected between themselves and connected to the second gate of the Muller integrator.

In the drawing of an electrically assembled electrical circuit for the proposed fadron generator.

The generator contains a Muller integrator consisting of series-connected transistors 1, 2 of the MOS-type. the resistor 3, the time of the charging capacitor 4, the resistor .5 of the additional transistor 6, the healer is the voltage of the resistors 7. In, the transistor 9 and the resistor 10: 11.12,1.3 - inputs, ia, which are supplied with voltage and offset, 14 - input to which input C 1hal is fed, 1.5 - generator output. The generator works as follows G & pasov /. In the absence of a signal, the input 14 of the transistors 1, 6 and 9 are in the open state, and the transistor 2-E is closed;. This peKKivi is ensured by supplying the required bias Ец, to input 13, which opens transistor 9. Transistors 2 and 9 form a kind of trigger with a source connection, in which transistor 1 plays the role of source resistor 1. Open pe-f of bench press of transistor 1 is supported by transistor 6 and the voltage at the input 12 voltage. The whole level of the voltage from the stack of the transistor 9 is transmitted through a resistor divider of resistors 7, 8 to the best; the transistor burn 2, the most reliable locking of it. To overturn the circuit ({Zantlstroi in a quasi-stable state, it is necessary to apply 14 impulses of negative amplitude of amplitude to the input, sufficient to unlock transistor 2). When a short control arrives. 2 and 6. Current transistor 2 jumps through the time setpoint; or capacitor 4 to drain transistor 6. This current has a reverse direction as compared to the rest of transistor 6, but it is much more powerful than magnitude. Transistor 6 transmits this current jump through T. Internal resistance, since MOS transistors have the property of i: verxonity, and thus decreases C :(. a consistently potential. transistor transistor 2 terminal. Potential jumps on the drain of transistor 2 and the gate of transistor 1 are equal each other, and their value is determined by the value of the mixing voltage E, at the input 12 of transistor 2. Next is the process of the small discharge of the capacitor 4 through the parallel resistor 5 and, in considerable measure, the resistance of the internal resistors 1 and 2. Pa.zr d condenser Lroisheed .lineynomu .zakonu by a factor nonlinearity 1%. During the discharge time, when the capacitor is charging, the drain potential of transistor 1 slowly decreases. When it reaches a certain value, it is removed from the transistor 9. and the fadron circuit returns to its original state. The load capacitor 4 capacitance recovers .. its charge through the resistor 3 and the small internal resistance of the transistor b474 L) the return path is times less compared with the forward running speed. To enable the described fadron generator to operate in self-excitation mode instead of resistor 7 it is necessary to turn on a capacitor, and resistor 8 noTiy eK should be connected to an additional mixing source. The invention makes it possible to perform a pulse generator,; a drop voltage voltage, independent of a certain range of the duration of the input pulses. A fantastroc can work with forward drive durations of the order of a few de seconds, seconds with a short return time. Fo rumula and 3 a b e and the Fantastic pulse generator containing the integrator Mül.lera, consisting of two 7 consecutively connected MOS-type transistors. a load resistor and a time reference circuit from a capacitor and a resistor connected to the output of the integrator Muller, and an active MTPtype transistor. the drain of which is connected through a resistor with a power source and through a transition circuit with a gate of the corresponding transistor of the integrator Muller, the substrate is connected to the common bus, and its drain is connected to the source of the second transistor of the integrator Muller, and the gate is connected to the bias source, about tl and ch and y with the fact that. in order to increase the duration of the generated pulses with decreasing time. In the Müller integrator, an additional MOS type transistor is inserted, the substrate of which is connected to a common iiBi, the source is connected to an additional bias source, and the drain and the gate are connected to each other and the subcategory to the gate of the Second one of the integrated transistors of the Mulo® Muller, Information taken into account during the examination: 1. Authorship certificate of the USSR certificate. № 326714, M.kl. 03 К 3/18, оОЭ.Об. 197 About d. 2. Stepanenko I.P. Fundamentals of the theory of transistors and transistor circuits, 1973, p. 5.5.3 (prototype).