SU478999A1 - Recording device - Google Patents

Description

clock signals, clock signal distributor 8 per t - (- 1 states, generator 9 of information conversion pulses, -shift generator of 10 shift pulses, driver 11 pulses) in shift, generator of 12 polling pulses, distributor of 13 polling pulses from + 1 states and “And 14” circuits linking the input-output registers. Elements 8-13 form the control device 15.

The recording line (Represented as an aggregate of tons of ordinates. At the same time, the entire range of signal variation from zero to maximum value is divided into n discrete levels. As a result, the continuous curve of signal variation along one line (single line realization) is replaced by a set of tons of points, each of which It is characterized by two parameters: the ordinate level and the discrete level of the signal value for the given ordinate.

There are t shift registers in the device, each of which corresponds to a specific ordinate of the string. One register contains bits that are numbered in discrete signal levels. Thus, the implementation of a single line can be displayed in natural form, in the form of units written into those bits of registers that correspond to discrete values of the signals for each of the τ ordinates.

The amplitude registration of the signals of one line is divided into two consecutive lines. At the nerve stage, the operation of receiving and converting discrete values of signals takes place at the nerve stage, placing the units in the corresponding register bits, i.e., a discrete graphical representation of the string is reproduced in accordance with the principle shown above. At the second stage, linear expansion of the line is performed n times using the registering authority, and synchronously with i-M the sequential interrogation of the i-bit of all the registers takes place from the beginning to the end of the line. If there is a unit in the i-M deregister on paper, the dot is located at the point of the line that corresponds to the given register.

Thus, when i-u expands the line, all points of the curve are displayed on the paper, in which the discrete value of the signal is i, and after the end of the η unfolding cycles, all m points are recorded, reflecting the change in signal level along one line.

The device works as follows.

The clock signals from the generator 7 are fed to the distributor 8, having l + 1 states. The distributor 8 is used to separate the two stages, the first state being used to convert one-line information (1st stage), and the subsequent n states to output information on electrically sensitive paper (2nd stage). To do this, the first synchronization signal through the first output of the distributor 8 starts the generator 9, which produces a series of m pulses. Each next pulse of generator 8 controls the operation of switch 5, which non-switches the last bits of register 4 to the output of converter 6, starts generator 10 and controls the restart circuit to converter 6 of the signal values on the computer in digital form.

Converter b is a binary counter with a conversion factor of p, in which, under the action of the control signal of the generator 9, the inverse code of the number in the output register is set.

computing machine. At the same time, the generator 10 is turned on, which generates n clock cycles that are not arriving at the counting input of the converter 6, as well as through the driver 11 for the shift of the registers 4.

Let the inverted code of the number I be set in the converter 6. Then, at the output of the converter, an overflow pulse appears, which coincides with the IM shift cycle, which via the switch 5 records the last digit of the corresponding register 4. Since thereafter, more (p-i ) shift cycles from generator 10, one, shifting one bit to the right with each shift stroke, ultimately turns into

t-M bit de. Similarly, the recorded m values of the signals for all registers 4.

The subsequent clock signals of the generator 7 relate to the second step of recording the signals and use the information written in the shift registers 4 to output the paper. For this, the clock signals through the second output of the distributor 8 are fed to the input of the generator 12, which produces

a series of (t + 1) pulses synchronized in time with the movement of the registering authority from the beginning to the end of the line.

The first t pulses through the distributor 13 control the operation of the switch 3, which synchronously with the linear sweep switches the first bits of the registers to the input of the amplifier 2 records. In this case, if there is a unit, the amplifier 2 receives a pulse amplifying to the required level and ensures the registration of a point in the place of the line that corresponds to a specific register. Thus, at the i-th line unfolding, all points of the curve in which the discrete value of the signals is equal to i are output to paper.

At the end of the survey of all the registers, the last (t, + 1) pulse of the generator 12 through the distributor 13 is fed to the second input of the driver 11, as a result of which the registers are shifted by one bit to the right. After that, with the beginning of the new sweep, the registers are sequentially polled again and the points corresponding to the next discrete level appear on the paper.

signal.

Continuous movement of the paper perpendicular to the recording line is selected so that one scan line is separated from the other by the size of the selected slot (it is also possible to start and stop the paper after the end of one linden; 1p scan). Thus, at the end of the sweep cycles, all m points are reproduced on paper that reproduce the implementation of a single line.

With the amplitude registration of signals according to the above method, one recording line is separated from the other by the value of the selected recording scale (Fig. 3, a). Since it is impractical to take less than 10-15 mm to reproduce all the details of a signal, this can be inconvenient when it is required that as much information as possible is found in the field of view of the operator, and the size of the viewing window is limited. In this case, information can be compacted by k times, where k is the ratio of the recording scale to the distance between adjacent lines (Fig. 3.6).

For this purpose, the distributor 8 must

be performed on - +1 states, and how to

and in the previous case, the first clock signal of the generator 7 is used for converting information and entering into registers, and the rest of the clock signals nJK for recording on paper. Even before the end of the output of the preceding statement, the lines in the registers 4 are entered into it by the implementation of the subsequent line. In order for the old information in registers 4 not to be destroyed, when the new information is entered, the shift registers must be closed into a ring for the time of the first transformation. For this, the first bits of the registers 4 are connected to the last bits by the AND 14 circuits, the second input of which is connected to the output of the generator 10. Then during the ft-shift shift in the first conversion stage, the old information circulates around the ring and is not erased.

To reduce the amount of hardware, it is advisable to use dynamic registers in a microchip design as shift registers, where a large number of bits are located in one chip package.

6

Subject invention

Claims (3)

1. A registering device containing a registering authority, for example, a donation with pinned, paired, recording amplifier, clock generator, characterized in that, in order to ensure the registration of the amplitude of the signal represented in digital form, it is equipped a group of shift registers with two switches at the input and output, the code-number converter of the discharge, the control device and the AND circuits, and the output of the clock signal generator is connected to the input control devices whose output buses are connected to the control circuits of the switches, the converter and the register shift terminal, the output of the converter is connected to the input of the first switch, and the output of the second A switch is connected to a recording amplifier. 2. A registering device according to claim 1, wherein the control device includes a clock distributor, transform and interrogation pulse generators, a shift pulse generator, a shift pulse shaper, and a polling pulse distributor, the register shift circuit through the driver is connected to the output of the shift pulse generator and one output of the interrogation pulse distributor, the output of the sync signal generator is connected to the input of the conversion and interrogation pulse generator, the output of the conversion pulse generator is connected to the control circuit of the first switch, the input of the shift pulse generator and the control circuit of the converter, signal output which is connected to the output of the generator of the pulse pulses; the control circuit of the second switch through the distributor is connected to the output of the polling pulse generator. 3. The registering device for PP. 1 and 2, characterized in that, in order to compact the record, the first bits of the registers are connected to the last ones through the AND circuits connected by second inputs to the output of the shift pulse generator. .fo of the zvm 1 "......,"., 0LG. " .... s, .. 0 ,,,.: /:.-... “...; o /: ..v.-in ,,,, .... in .... %%, ,, ",. , ...  ...- .. p. "..., .. ,,". 4:, / .....: ;; ,,, .. ,,,.",about,. .. ,,,,, ..:;. four-/ t registers figure 2 I in "l