SU463064A1 - Probe pulse generator for ultrasonic multichannel flaw detector - Google Patents

Description

Of the keys 2, the pulse is paused between two synchronization pulses. The key 2 opens, and the charge of the capacitor 4 on the circuit begins: voltage source E - public key 10 - key 13 - capacitance 4 - inductor 8. Capacity 4 is charged to voltage E with a constant time determined by the value of the charge capacitance and resistance of public keys 10 and 2. In the absence of inductance 8, capacitance 4 and capacitance of piezo sensor 6 are charged. At the same time, the voltage between them is inversely proportional to their capacitance. During the charging of the capacitor 4, the switch 3 is closed, and the capacitor 5 is not charged, since the diodes 11 and 12 are switched opposite to the other. When the clock pulse arrives, key 1 opens quickly, and capacitance 4 is discharged along the circuit: ground - inductance 8 - capacitance 4 - diode 11-key 1-ground. At the same time, a high-frequency voltage appears on the piezo sensor 6, which excites it. With the arrival of this sync pulse, the second key 3 opens, and the key 2 closes, and the charge on the circuit 5 begins: the voltage source E is the key 3 - the capacitance 5, the inductance 9 is the ground. When the next clock pulse arrives, capacitance 5 is discharged along the circuit: ground - inductance 9, capacitance 5 - diode 12 - switch 1-ground In this case, the piezo-sensor 7 is excited. From the moment of arrival of this sync pulse, the charge of the capacitance 4 begins and the cycle repeats. Simultaneously with the arrival of the synchronization pulses, the locking pulses with a duration sufficient to restore the reverse resistance of the key 1 arrive at the input of the key 10. This allows the circuit to operate with a small amount of charge resistance, i.e., at high tracking frequencies (50 kHz or more) . When operating at low repetition frequencies (5-6 kHz), the key 10 may be replaced by a current-limiting resistance. The value of this resistance should provide in the circuit: resistance - public key 2 or 3 - diode 11 or 12 - key 1, a current less than the release current of the key I. If there are more than two channels, the circuit operates as described above. In the period between the sync pulses, only one of the capacitors is charged through one public key, and at the time of the sync pulse, the charged capacity of the previous channel is discharged. Pulses for charging a sequence come in from the pulse distributor according to known circuits (for example, trigger-diode decoders, ring shift registers). The subject of the invention The probe pulse generator for an ultrasonic multichannel flaw detector, contains a discharge switch and a charge circuit connected to it, including a diode, a charge capacitor, and a charge resistance that differs in that it is equipped with additional charging circuits connected to the bit switch, the number of which is equal to the number of channels used, and the charge resistance is made in the form of a controlled transistor switch.

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