SU444985A1 - Integrating Voltmeter - Google Patents

Description

I

The invention relates to a digital measuring instrument and can be used in voltage transmitters in code n digital voltmeters.

Integrated voltmeters are known to contain a comparison node, an integrator, measurement keys, a reference voltage source, a meter, a coincidence circuit, control and start-up nodes.

The aim of the image is in the; 1x1x: higher speed when working in conditions of the i set. out and random clutter

This is achieved by addition of a logical node, an error setting node, AND and OR circuits, ipeaepCHBHbie time counters and integration error, the corner input of the last and directly, and the count input through one of the OR inputs and the AND circuit connected with | by the corresponding Bt-hkhoda of the node at | {raBlennv; counting input | h & pea second vzhod scheme OR connected to | the output node of the task is an error, the input of which is. go is connected to the knot &management; u | the course of the reverse error counter

tvgrirovann associated with one of the inputs of the logical node, the second control input

which is connected to the control unit; Vioi yy logical node associated with the abrasive

and the counting inputs of the reverse integration time counter, the control input

the readout of which is connected to the node (control, and parsh / ale outputs with a part of

ralleanny inputs of the counter.

In the drawing there is a diagram of a proposed voltmeter voltmeter.

The voltmeter includes a start-up node 1, measuring fjivfut 2 n 3, intoritor 4, counter 5, control node 6, comparing 11 node 7, circuit 8, revision control error 9 integrated circuit, circuit 1 O, circuit OR 11, aaol ishnbki 12, a logic node 13, a reversible time counter for 14nr.

According to the Start-up signal, two steps are used to convert the measured value into a code. Not the first step, the counter determines the time of the introgree, and, at the second, the code of the intended signal. At the step of determining the code for a parallele with a counter, a reversible error counter operates, integrating into which, simultaneously with the counter, immersions of the code of the measured value Ux are received. 4epej3 schocks and OR at the end of the second tag of integration, the digital value of the value of y is determined with some error. Then the whole process is repeated; except that in the cimHOM reverser of the error counter HHTeipHpOBaHH, the result of the previous measurement (1) is memorized, and the record of the new measurement result is entered with the opposite sign. After measurements on a reversible counter, the error is integrated with a zero-zero value of t. . . , i- (nu / W, u, .r | {t)., 5jt Ш where T is the intrinsic period, ft is the cycle number. B. If the value of the measured water is measured. H1gchi) 1y for the time of two screenings / 1 / fwiBiia ivjnuocTH of the two most natural values of the f (t) disturbance, both random and sinusoidal. The time t, between two successive measurement cycles, is chosen to be equal to or Kj (rn) UM per charge number of half periods 1a | mpiic interference using the start-up signal - 1. Hjcjie О1Гре / 1 LO P1 on reversible: counter ii iptpeiJniuerK integration of the difference () oriodi1x; its scoop with some given ипСЛ1р ipoi, corresponding to a buoy pogroiii) C1-izmeni}) eni and fixed in u11 |} pc form in the node of the task of an error. / Uti tog pulses from the node lt) absent NIN iioorynuKxr f (a) a live counter of 11 11c /; so ifjji. If {yuvani with the sign, iif) o-THuoiiojiOyJiHbiM is the difference sign D, and it is oddly mapp.) The same NMT pulses are not valid / g for the reference node of the error, which is black and determines the number of impulses, CDO is liyyioee given error. This is the number of impulses, and the number of readings from the testimony of the detector (from the grayness of the integrator4) to the head from the state of the error meter of the ingerryShIN error with the reference device that has the value of the input value of the input error value from the input device to the frame size and the input device. | 0 9-M (o, | L | H (| 1 $ 0 Then, depending on the value of the value, the readings of the versative time counter are integrated; T1i, followed by about 5I, yyyg | yy schrlday form), hlo;,. , -At3, e. If the difference L exceeds the given value of Q, then there is a waviness of the integration time by a small small h.ifo possible value of ut In the case when the rampness of the EI is specified, then the integration time decreases. integration time counter with pulse from control device readjusting the code of the reverse integration time counter into the counter so that the integration time on the next cycle equals the integration time recorded in the reverse counter.Then the described cycle consisting of two digital transformations of the measured value, determining the difference between the conversion results, comparing the difference with a predetermined admissible lead chip and a corresponding change in the readings of the recursive counter, h) momoni integrated; 1) s. 1 and 14, is repeated. In the initial state of the integral time counter in the revolutionary time counter (1 {14 and 14), the maximum possible integration interval T and the first nicl always decrease the value of one for several similar cycles on the reverse integration time counter 14 and 14 The integration period T (j, corresponding to the equality of the probabilities of the inequalities of the expressions (2), around which, with some disney, the readout of the integration time oscillates 14. The value nef.n and the integration Tj, for example) is determined by the variance of the random noise and the amplitude; the Tuda sinusoidal interference, as well as the magnitude of the interference (J), depending on the ET1 X factors, it automatically sets and may change depending on the selected error. An integrating voltmeter, "containing a moving node, an integrator, measuring keys, a source of samples of the control panel, a counter, a matching circuit, and an automatic trigger and trigger, characterized in that, in order to increase the speed -: tvn at slave in those conditions setepyh and eaten at yypyh interference introduced therein logichgch kly node u.eol specifying errors UGS-NIL and n, f eBept, -KRKbf with etchp.ki-pp-jNtoyn L n; rfteiiiHocTH mirerpHi are called, and the “1NY input-the last one is directly, and the sch.e-pgy input through one of the inputs of the OR circuit and the AND circuit is connected to, respectively. khtsimi vygho.ami site of proclamation; the counting input through the second input of the OR circuit is connected to the output of the node for specifying an error, the input of which is connected to the output of the control node; the output of the reverse integration error is connected with one of the inputs of the logical node, the second control of which is connected to the control node; the outputs of the logical node are associated with unravl. and a reversible integration time counter, a control, the read input of which is connected to the control unit, and parallel outputs with part of the parallel inputs of the counter.