SU430371A1 - SENSOR RANDOM NUMBERS - Google Patents

Description

one

The invention relates to the field of computer technology and can be used to form the luminalities of equal multi-digit random numbers.

Random number sensors are known, which contain a recurrent shift register and a pulse generator, providing an equally random sample of any code combination from a sequence of maximum length.

However, in some cases, it is necessary to equally sample the iV-pastoral factors that make up a certain subset in the full set of device-generated combinations.

The aim of the invention is to provide the possibility of equal sampling of L-bit numbers constituting a definite subset in the full set of code combinations and thereby expanding the class of tasks to be solved.

This is achieved by the fact that in the proposed sensor, the outputs of the recurrent shift register are connected to the inputs of the code combination analyzer and the information inputs of the gates, the first and second control inputs of which are connected respectively to the outputs of the code combination analyzer and the nerve of the match circuit, the output of the code combination analyzer match the second circuit input, the second circuit inputs

coincidences connected to the output of the control circuit, the output of the second coincidence circuit is connected to the inhibit input of the trigger connected to the first input

the first coincidence circuit, the output of the pulse generator is connected with the first input of the inhibit circuit, the second input of which is connected to the output of the first coincidence circuit 1 and the output to the control input of the recurrent register

shear.

In the drawing, Irivedep functional diagram of the proposed sensor.

The sensor contains a pulse generator, which generates a periodic pulse sequence, which enters the first input of the inhibit circuit 2 and from the output of the inhibit circuit and the control input of the recurrent shift register 3. A linear sequence of maximum length is generated in the register. The parallel outputs of the register 3 are connected to the information inputs of the valves 4 and at the same time to the inputs of the analyzer 5 code combinations. The control inputs of the valves are received respectively from the output of the analyzer 5 and the matching circuit 6. The valves are opened when there are permissive signals at both control inputs. The input of the joint scheme 6 is connected to the output of trigger 7, which stores

the time of arrival at the sensor signal zirosa. At the second input of the coincidence circuit 6, polling signals are received with the frequency FQ from the output of the control circuit 8. The output of coincidence circuit 6 is connected to the inhibit input of prohibition circuit 2. The inhibit input of the trigger 7 receives signals from the output of the coincidence circuit 9, the inputs of which are connected to the outputs of the analyzer 5 and the control circuit 8.

In the initial state, trigger 7 is skipped, generator signals / produce periodic shifts in the recurrent register 3, output valves 4 are closed. When a request signal sensor is received at input / t, trigger 7 is transferred, and an enable signal is given from its output to coincidence circuit 6. In the presence of an enable signal, polling pulse pulses -Fo from control circuit 8 are transmitted through a coincidence circuit 6 to the prohibitory input of prohibition circuit 2 and the control input of gates 4. A register is created in the register, which was generated by the time the polling pulse arrives. If this combination is included in the analyzed subset, analyzer 5 outputs a signal to another control input of the valves. In this L-bit pattern, the combination is read from a random number sensor. At the same time, the coincidence circuit 9 issues the trigger trigger command.

If the combination recorded in the register is not included in the analyzed subset, the shift in the register is resumed before the arrival of the polling pulse queue. Register state polls are repeated until the polling pulse coincides in time with the flicker in the register of the allowed combination. In this case, the circuit returns to its original state before the arrival of the next request signal.

With faithfulness, it can be argued that the number of / C polls needed to form the next random number will not exceed the number

in 1-P, v-m,

where n is the total number of combinations in the V-bit dpom register; m is the number of combinations in the subset.

Nredmet of the invention

. A random number sensor that contains a pulse generator, a recursive shift register, characterized in that, in order to expand the class of problems to be solved, it contains a inhibit circuit, gates, a code combination analyzer, a cert and a second coincidence circuit, a control circuit and a trigger, with the outputs of the output the shift register is connected to the inputs of the code combination analyzer and to the information inputs of the gates, the first and second control inputs of which are connected respectively to the outputs of the code combination and the first circuit with The output of the code combination analyzer is connected to the first input of the second matching circuit, the second inputs of the matching circuit are connected to the output of the control circuit, the output of the second circuit is connected to the trigger input, the output of the first generator of the first matching circuit, the output of the pulse generator is connected to the first input a prohibition circuit, the second input of which is connected to the output of the first coincidence circuit, and the output is connected to the control input of the recurrent shift register.

Request