SU429546A1 - DISCRETE INFORMATION TRANSFER LINE ON TRACT WITH VARIABLE PARAMETERS - Google Patents

Description

one

The invention relates to radio engineering, in particular to signal transmission in multipath propagation of radio waves.

Transmission lines are known in which the transmission of each bit of binary information is conducted sequentially on several frequencies with a constant level of the envelope of the signal emitted by the transmitter, information is transmitted by sending one of two (or several) signals differing from each other in the order of frequencies.

Reception is performed using a single receiving antenna and a broadband receiver that carries the transfer of the received yoke signals to the intermediate frequency and gain. The output of the broadband path includes second frequency converters, the purpose of which is the frequency separation of the elements of the received signal. In each of the subchannels, the signal element is weighted using linear detectors and a local AGC circuit, as well as quadratic detection. The detected signals are gated with an analog-testing matrix and summed on integrators. The operation of the matrix and the integrators is synchronized by the synchronizer, which is controlled by the detected

signals combined in time by delay lines.

However, the known transmission line is not sufficiently robust due to incoherent signal element processing and the inability to improve robustness due to the use of relative phase shift manipulation with coherent reception.

The aim of the invention is to improve noise immunity.

For this, a phase modulator is connected between the multifrequency shaper a and the transmitter at the transmitting station, and element-sum multipliers are included at the receiving station, and the outputs through the serially connected additional integrators, blocking oscillators and counting triggers are connected to one from the inputs of the sign multipliers, the other inputs of which are connected to the outputs of demodulators, made in the form of phase telegraphy demodulators, and the outputs of the sign multipliers cheny to the inputs of the adder to the output of the latter is also connected to the decoder relative phase shift keying, the outputs of the blocking oscillator is also connected to the second inputs of the additional integrators.

The invention is illustrated in trait.

FIG. 1 shows a block diagram of a transmitting station; in fig. 2 is a block diagram of a receiving station; in fig. 3 and 4 - time diagrams.

The transmitting station (see Fig. 1) contains synchronizer 1 connected to encoder 2 relative phase shift keying (OFM) and shift register 3, whose outputs are connected to control inputs of time selectors 4. Main inputs of time selectors 4 are connected to carrier oscillator generators 5. The outputs of the time selectors 4 are connected by an adder 6, the output of which is connected via a phase manipulator 7 to a broadband transmitter 8. The control input of a phase manipulator 7 is connected to the output of an encoder 2, the input of which is the input of a line connection.

The receiving station (see FIG. 2) contains a wideband receiver 9, the output of which is connected to the OFM 10 coherent signal demodulators. The outputs of the OFM 10 demodulators are connected to two-loop rectifier 11 and the main inputs of the time selectors 12.

The outputs of the rectifiers 11 through the phase-shifting circuits 13 and the adder 14 are connected to the synchronizer and the AGC signal conditioner 15, which is connected to the receiver 9 and the shift register 16, the outputs of which are connected to the control inputs of the time selectors 12. The outputs of the time selectors 12 through sign multipliers 17 and memory integrators 18 are combined by an adder 19, and also connect with one of the inputs of the element-sum multipliers

20, the second inputs of which are connected to the output of the adder 19 through the time selector

21. The output of each of the multipliers “element-sum 20 through additional integrators 22 with forced reset is connected to blocking generators 23, the outputs of which are fed to the corresponding reset input of the integrators 22, and to the corresponding counting triggers 24. Triggers 24 are connected to the second inputs of the sign multipliers 17. In addition to the multipliers 20 Element Sum 20, an OFM 26 decoder is connected to the time selector 21 through solving circuit 25, the output of which is the output of the communication line.

Lini works as follows.

The synchronizer 1, which operates on its own clock generator, generates clock pulses, which follow at a frequency equal to the information transmission rate, and controls the operation of the encoder 2, to the input of which a sequence of binary symbols to be transmitted is input. The information is intended to be synchronous in time with the phase of the synchronizer reference generator.

In addition to the clock pulses, the synchronizer 1 generates a sequence of pulses, following with a frequency greater than the clock

a number of times equal to the selected number of diversity branches, which goes to the waste bus of shift register 3. Shift register 3 generates pulses at its outputs with a number equal to the number of diversity branches and a duration equal to the clock interval divided by the number of branches. These pulses control the time selectors 4, which transmit signals from

oscillations subcarrier generators 5 only at the moment of the impulse of the register 3.

Oscillation subcarrier generators 5 are stable sources of sinusoidal oscillations whose frequencies are evenly distributed in the broadband path. The number of branches depends on the ratio between the path bandwidth and its frequency correlation radius in the interest of time.

The radio pulses of the corresponding frequencies, which are obtained as a result of gating by the time selectors 4 of the voltages of the oscillator subcarrier 5, are summed by the adder 6.

The signal at the output of the adder 6 is a constant amplitude radio pulse, of a duration equal to a clock interval, with discrete frequency shift keying. This signal is subject to

phase manipulation by manipulator 7 controlled by encoder 2. The resulting signal is transferred across the spectrum to the desired part of the range, amplified and radiated by transmitter 8.

FIG. 3a shows the type of information transmitted, which is a sequence of zeros and ones; FIG. 36 - the same information recoded by the OFM encoder. FIG. Sv, d, d displays the type of signals at the outputs of the time selectors, and in FIG. Ze - at the output of the OFM manipulator.

The symbols “+ and“ - in a conventional form show the phase of the resulting wideband signal in each clock cycle.

The signal emitted by a broadband transmitter and having a discontinuous spectrum, having passed through a variable parameter path, is subjected to selective fading, which are common for each frequency component (due to their narrow bandwidth compared to the frequency correlation interval of the path), after which to the input of the broadband receiver 9 receiving station (see Fig. 2). Receiver 9 amplifies the reception signal and transfers it to an intermediate frequency. The OFM 10 demodulators connected to the output of receiver 9, for which any

of the known correlation coherent reception scheme for a narrowband OFM signal (for example, the well-known Pistolcourse scheme). Each of the demodulators 10 operates at a frequency corresponding to one of the subcarriers of the received signal. The output voltages of OF1CH 10 demodulators, which are video pulses of different polarities, are fed to full-wave rectifiers 11, which pick up the phase shift keying, and 5 to the time selector 12, which is similar to the time selector 4 (see Fig. 1) of the transmitting station lines. The time selector is also controlled by a register 16, which operates in accordance with the control pulses of the cyclo-siphon and the AGC signal generator 15, which is controlled by the incoming signal. For this, the output voltages of the rectifiers 11, which are video pulses of the same polarity, are fed to 15 phase-shifting circuits 13, such as delay lines of different lengths, for matching the pulses of different subchannels over time. The outputs of the circuits 13 are combined by an adder 14 connected to the synchronizer and the AGC signal generator 15. In the synchronizer, the sum signal proportional to the power of the received signal is filtered from the sound by a narrowband filter tuned to a clock frequency. The output voltage of the filter 25 serves to synchronize and, after rectification, to form an AGC signal. Signals gated by time selector 12 pass through sign 30 switches 17 and are fed to integrators 18, controlled by a synchronizer and an AGC signal generator 15. Integrators 18 accumulate signals and constitute a filter matched with a received 35 coping the signal with remembering it to the end of the bar. The output voltages of the integrator are fed to the adder 19 and to the inputs of the multipliers "element-sum 20. After the adder 40 19 the signal is selected again in time by the selector 21. The output voltage of the selector goes to the second inputs of the multipliers" element-sum 20. multiplying elements signal with the sum. During operation of the OFM 10 coherent demodulators, the ambiguity of the output voltages of their output voltages arises, which is a known fundamental disadvantage of all the OFR coherent demodulators 50. The possibility for this ambiguity arises when the incoming signal is reduced in branches x below a certain threshold. In other words, the output voltage of each of the demodulators after the fading pass 55 in this branch may be in antiphase with the signals of the other branches. To determine the state of each of the branches, an element-sum 20 multiplier is used, the output voltage of which has a go positive value in the case of coincidence of the signal of the branch with the sum and negative in the case of different polarity. The output voltages of the multipliers "element-sum 20 are accumulated by an additional 65 integrator 22, the output of which includes a blocking generator, which is triggered when the voltage reaches the integrator threshold. The pulse of the blocking-heprator discharges the integrator 22 and flips the trigger 24. The trigger 24 controls the sign multiplier 17. In this case, the polarity of the voltage of the corresponding branch is inverted. The output voltage of the temporary selector 21 is supplied to a solver circuit 25, which is a limiting double-sided limiter. The output voltage of the reloading circuit is supplied to the OFM decoder 26, which performs the final decoding of the received information. The output of the decoder 26 is the output of the link. FIG. Zj shows an approximate view of the signal at the input of the receiver 9 with selective fading. FIG. 3 h, and to the voltage at the outputs of the integrators 18. In this case, the branch corresponding to the signal of the diagram of FIG. 3k, is in antiphase with the other branches. FIG. 3 l shows the output voltage of the temporary selector 21 and FIG. 4 - the voltage at the output of the multiplier "element-sum of the antiphase channel. The diagrams in FIG. 4 n and o show the accumulation of negative voltage on the integrator 22, the pulse of the activated blocking generator 23 and the reset of the integrator 22. The dotted line indicates the threshold level of the blocking generator. The subject of the invention of the line of discrete information transmission over paths with variable parameters, containing at the transmitting station a shaper of a multi-frequency signal and a transmitter, and at a receiving station a receiver connected through series-connected filters, demodulators and integrators to the adder, characterized in that noise immunity, at the transmitting station between the shaper of the multi-frequency signal and the transmitter the phase modulator is switched on, and at the receiving station between the inputs and the output of the adder included the multipliers "elemept-sum, the outputs of which are connected in series through additional ones. -integrators. blocking generators and counting triggers are connected to one of the inputs of the sign multipliers, the other inputs of which are connected to the outputs of demodulators made in the form of phase telegraphy demodulators, and the outputs of the sign multipliers are connected to the inputs of the adder, and a decoder of relative phase manipulation is also connected to the output of the last multiplier , while the outputs of the blocking generators are also connected to the second inputs of additional integrators. r- I -r f b- m i Ij LJO piw

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