SU389510A1 - DEVICE FOR DETERMINATION OF PARAMETRIC RELIABILITY OF RADIO ELECTRONIC DEVICES - Google Patents

Description

The invention relates to automation and computational techniques. The device can be “used in analyzing and predicting the reliability with respect to the gradual failures (measurement reliability) of radionic electronic devices.

Known analytical methods for determining the parameter, which is not widely used, are not widely used in practice due to the large amount of computation and the impossibility in the overwhelming majority of cases to establish analytical relations between changes in the parameters of circuit elements.

Therefore, attention has been drawn to the experimental definition of parametric reliability by means of physical or simulated modeling.

A device for determining the parametric reliability of electronic devices, containing iHai6opHoe zero, is associated with an implementation search unit, a control unit, a clock generator and a model model block, and the control unit is associated with a test signal block, a clock generator, and a block iterating over the implementation, and the output of the block of test signals is connected to the input of the block of physical models.

The test of the reliability of the device under test consists in the successive tests of its individual variants, made up of elements whose parameters lie within the limits of the chosen nLI given a new dolus.

The purpose of psnity. For a prototype, determine the number of failed options when. elements are entered into the schema. other than nominal. BUT lay1.imn within tolerance. The specified goal in the known device is reached and by the sampling 1, from the protocol, having tested the new refusal measures: 1; 1x options and manual counting of their number. The disadvantages of the prototype are the determination of the number of failed options only by laborious non-automatic automated processing of test report data; the impossibility of directly obtaining the distribution functions of the output characteristics of the test product; Comparison of the operation in the application is a line for testing the operability of two-stable logical circuits on magnetic elements with a rectangular hysteresis loop. The purpose of the invention is to expand the functionality of a known device by providing direct and automatic it: obtaining as a result of testing a differential or integral distribution function.) Output parameters of the device under investigation, or the number of failed realizations. In addition, the organization of research should include a study of the parametric reliability of a wide class of radioelectronic devices, including devices of a single (low-volume) production.

The proposed device differs from the fact that the control unit is connected to the output of a block of physical models of the tested circuit, a clock generator, a control unit, a dial-in field and an input of the implementation analyzer, and the output of the implementation analyzer is connected to one, The accumulator, the number of implementations, and the other inputs of the coincidence circuit are connected to the control unit. The listed blocks and the connections between them provide the differential distribution function of one of the output parameters of the device under test.

The block diagram of the device is presented on f, i. one.

To obtain the integral distribution function, the control and analyzer of implementations are excluded from the block diagram of the device, and the coincidence circuits are replaced by threshold elements, | Connected to the output of the physical model block by the clock generator and the control block. The block diagram of the device for this case is shown in FIG. 2

In order to obtain the accumulated number of failed implementations in the block diagram of the device, the tolerance node is connected to the output of the physical model block, the control block, the clock generator and the drive. The block diagram of the device for this mode is shown in FIG. 3

The device contains a keypad /, a search enumeration unit 2, a control unit 3, a clock pulse generator 4, a test signal block 5, a block of physical models of the device under test 6, a control block 7, an analyzer of implementations 8, coincidence circuit 9, accumulators 10, threshold elements // , node tolerances 12.

The block diagram can be a -BBecTn switching unit (work type selection unit), giving the possibility of switching from one of the above types of tests to another.

The dial pad 1 is a group of relays that are controlled by the brute force block 2, commutating with their contacts the physical models of the device under test in block 6.

The brute force block implementation serves to control the switching relays. The control unit 3, built according to the circuit of the looped-in shift register, controls the unit for iterating over the implementations and coordinates the operation of the individual units of the device.

The generator 4 generates clock pulses to synchronize the operation of the individual units of the device with the control unit 3 according to a predetermined rhythm.

The block of test signals 5 generates a set of input signals specified for each specific device under test.

The block of physical models 6 is a board, which is sequentially connected to the contacts of the corresponding keyboards / paddles of the physical model block, preselected so that the parameter tolerance of each element of the tested device is represented by a certain number of elements within the possible range of parameter variation.

The control unit 7 converts any output signal of the tested device into a form and value convenient for processing and analysis in block 8 - the analyzer of implementations.

The analyzer of implementations 8 is a counter that, after the end of the next implementation, records the number (for example, the number of pulses) corresponding to the signal received in this next realization of the physical model in block 6.

Coincidence circuits 9, presented in an amount determined by a given number of output deviation levels, cover the entire possible range of measurement of this output signal (of course, in digital equivalent).

Blocks 10 are designed to accumulate the number of implementations in which the magnitude of the output signal: (in digital equivalent) coincides with the setting of the corresponding coincidence circuit 9.

Threshold elements // can be performed, for example, on relay-type elements with different levels of operation, but if I denote the level of operation of the j-ro threshold element by means of I, then to obtain an integral distribution function, the relation

I, I, I:, ... Yag ... / 7 ".

The node tolerances 12 can be performed, for example, on two elements of the relay type with - different levels of operation 1-: n ("minimally permissible and" maximally permissible).

The device operates as follows (Fig. 1).

In the initial state with the help of a dial-up FIELD 1, one is switched; Among the possible implementations of the physical model of the device under test 6. After starting, the pulses from the generator of clock pulses 4 are sent to the control unit 3. Unit 3 issues a command to close the contacts of the dial floor relay / to start operation of this implementation of the popped-up device in the block simultaneously with the command of the block 3, the test signal from block 5 is fed to the input of the device under test. Then, in the control block 7, the output signal of any kind is converted into a countable value directly proportional to it, fixed by the analyzer of implementations 8. Then block 3 gives permission for the parallel reading of the result from the accelerator of implementations 8 to a group of coincidence schemes 9. Schemes 9 are set up for a specific number, numerically equivalent to the corresponding qua tam, "ai which, all possible range of output signal of the device under test.

At the output of the coincidence circuit, in which in this regular implementation, the number coexists with the implementation 8, received from the analyzer, it appears nr: Izna | K, coincides, and allowing the addition of one to the drive associated with this circuit ten.

At this, the test of the next implementation of the test-radially-electric device is ordered, and the following implementation is switched with the help of a dial-up floor. The scheme works automatically.

As a result of all the test cycles (enumeration of all POSSIBLE real-worlds), numbers representing the whole histogram, i.e., the differential function, are distributed to the output of the test device (Fig. 1).

The versatility of the device. The possibility of an automatic 1-received and integral distribution function of the output signal of the device under test (Fig. 2), or the accumulated number of failed implementations (Fig. 3).

The device shown in FIG. 2, fictions the following pattern.

Blocks / -6 and 10 perform the same functions as np | and derive a differential distribution function.

Instead of blocks 9 (coincidence circuits), threshold elements // are connected, the input of which is connected directly to the output of the block φ: practical models 6 and the generator raiKTOBy .pulses 4, and the output is connected to the accumulators W. Blocks 7 And (S and their connections are not appropriately needed.

As a result, numbers are accumulated in the chips 10, representing in general the integral distribution function of the output signal signal of the device under test.

Presented in FIG. 3 The device functions as follows.

Blocks / -6. And 10 perform the same functions. Blocks 7-9 and their connections are accordingly excluded.

The node tolerances 12 is connected directly to the output of the block of physical models 6 and the input. However, the power supply 10, as well as the clock generator 4 and the control unit 3.

As a result of all the test cycles (enumeration of all possible implementations), the failed implementations are filled into the accumulator 10, i.e., cases of deviation of the output signal of the device under test beyond the limits of the maximum and maximum settings of the tolerances node 12.

Subject invention

A device for determining the parametric endowment of radio-electronic devices, containing a control unit, connected directly and through a unit for selection of implementations to the field field, and directly through a block of test signals — to a block of physical models and .m clock pulses, another output of which is connected to a dial-in field, characterized in that it contains, for the purpose of expanding its functionality, an analyzer of implementations, a coincidence circuit, accumulators and a control unit connected to the output of the unit physical models, a clock pulse generator, with an implementation analyzer implementation input and a control unit, an implementation implementation analyzer output connected to one of the match circuit output engines, the other inputs of which are connected to the control unit, and the outputs connected to the corresponding accumulators .

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