SU369718A1 - MAGNETIC ACCUMULATING COUNTER - Google Patents

Description

one

The invention relates to the field of radio engineering, in particular to integrating time counters, based on the joint use of magnetic cores and switching transistors.

A magnetic storage counter is known, which contains a driver, integrated and read circuits made on a transformer and transistors.

However, the known device is not characterized by high accuracy of counting and thermal stability of operation.

In order to improve the thermal stability of the proposed counter, the output windings of the transformer driver and the integration and readout circuits are counter-connected and a diode connected to the input of the transistor of the readout circuit integration.

The drawing shows a schematic diagram of the proposed device.

The device contains an input signal source (static converter) on transistors / and 2 and transformer 3, an input driver on transistors 4 and 5, and integration schemes on transistor 6.

and the windings 7 and 8 of the transformer 9 and the readout circuit on the transistor 10 and the windings // and 12 of the transformer 9.

An output pulse of negative polarity, obtained by differentiating the voltage from the collector of transistor 2, is fed to the input of the input signal shaper, the transistor 4 of which operates in the key mode.

In the integration circuit, the normal state of the transistor 6 is the saturation state.

The output pulse of the driver through the diode 13 and the open transistor 6 is fed to

integrating winding 7 and contributes to the magnetization reversal of the core. If the core of the transformer 9 does not reach the deep saturation mode during the reversal time, the voltage transformed by

in its winding 8, disconnects the -connector consisting of resistor 14 and diode 15 from the output of transistor 6.

At the end of the magnetization of the pulse shaper emf. self-induction, induced from the winding 7 of the transformer 9 with the non-rectangular core hysteresis loop, is shunted through the diode 13 and the open transistor 6. The diode 15 remains closed in the intervals between the pulses of the driver

due to shunting the diode-resistor circuit

transition base-emitter open transistor.

If there is no input: the sitnal transistor 10 is in cut-off mode. The difference between the output voltages of the driver and the integration circuit is supplied to the input of the transistor 10. The resulting positive polarity of the voltage is cut off by the diode 16 and does not pass to the input of the transistor 10, the control of which by means of differential voltage ensures the cut-off of the positive peaks in the integrator voltage.

The circuit MTIS with saturation of the core of the transformer 9 works as follows.

The base current of the transistor 6 is chosen such that when the core of the transformer 9 is working on the gently sloping section of the characteristic, the transistor 6 remains in saturation mode. When the next p-th pulse arrives from the driver circuit and when it acts, a deep saturation of the core 9 reaches the collector current of the transistor 6 reaches the maximum value at which the transistor 6 switches to working on the linear portion of the current-voltage characteristic. This is accompanied by the redistribution of the voltage of the driver between the transistor 6 and the integration winding and, accordingly, a sharp decrease in the voltage across all the windings of the integrating transformer 9.

This violates the balance between the voltage of the driver and the integrator at the input of the transistor 10 of the readout circuit and leads to unlocking of the specified transistor due to the negative voltage from the output winding 17 not compensated for by the reduced voltage from the winding 18. The opening of the transistor 10 causes a regenerative process that ends its full unlocking and closing of the transistor 6 by the voltage supplied from the winding 8 of the transformer 9 through the open diode 15.

Upon completion of the passage of the pulse of the driver, the transistor 10 is maintained in the open state by positive feedback from the windings 11 applied to the input of the transistor 10. At a certain point in time, the core of the transformer 9 reaches saturation in the opposite direction, the voltage on the windings of the transformer 9 decreases by

magnitude, which leads to the locking of the transistor 10 and the unlocking of the transistor 6.

The work of transistors 6 and 10, the integrator and and the accumulator in antiphase and the galvanic isolation of the circuits of the transistor 6 from the source

a constant voltage allows the transistor 6 to be used to bypass the read winding 12, thereby preventing the core from demagnetizing partially by the collector current of the closed transistor 10. To this end, the transistor 6 is connected in parallel with the winding 12 of the transformer 9.

The inclusion of diode 19 (germanium type with low direct resistance) eliminates the mutual influence of the integrator circuit and readout in all modes of operation.

Subject invention

Claims (2)

1. Magnetic storage meter containing a driver, an integration and readout node, made on a transformer and transistors, characterized in that, in order to improve the accuracy of counting and stability of operation, the output windings of the transformer of the integration node and a driver are connected counter and through a diode connected to the input of the transistor reading unit. 2. Magnetic storage meter according to claim 1, characterized in that, in order to increase thermal stability, an integrating node transducer is connected through the diode parallel to the read winding between the collector transistor of the readout node.