SU278869A1 - DIGITAL PHASOMETER - Google Patents

Description

The invention relates to an information processing technique and is intended for use in conjunction with control computers in process control. Devices are known for converting the phase shift of two sinusoidal voltages into a digital code for input into a computer. Basically auth. St. No. 211655 describes a full-wave digital phase meter that contains a two-channel shaping device connected to a coincidence circuit, the other inputs of which are connected to the outputs of a trigger controlled by pulses of the master oscillator through a differentiating chain, connected to the outputs of the coincidence circuit, a pulse divider trigger and fan for controlling the pulses of the master oscillator. This phase meter has a significant drawback, which is the lack of accuracy in converting the phase shift to a digital code, since random fluctuations in the frequency of the signals under study change the time shift between the signals that are considered to be phase shifts in this device. The aim of the invention is to improve the accuracy of the phase meter. in addition, it contains match schemes, an amendment code counter, a measurement time counter, triggers, a zero-body, differentiating circuits and a delay line, the outputs of the coincidence circuits are connected to the summing and subtracting inputs of the correction code counter, and the first inputs of some coincidence circuits are connected to the output another coincidence circuit, the first input of which is connected with the master oscillator, and the second with a trigger, the single input of which is connected via a null organ to the reference signal bus; the second inputs of some coincidence circuits are connected to the trigger outputs, the counting input of which is connected to the null organ, and the zero output of the trigger is connected to a differentiating target, the output of which is connected to the single input of another trigger, whose output through the differentiating circuit is connected to the output bus of the value of the first half-period, and the zero input of the trigger is connected to the counter of the correction code and the measuring time counter, the input of which is connected to the null organ, and the output through the delay line is connected to the output of the zero setting reset. Tata measurements. FIG. 1 shows the described full-wave digital phase meter; in fig. 2- time diagrams.

3, differentiating circuits 4 and 5, trigger 6, circuit ILR1 7, counter 8, master oscillator 9, coincidence circuit 10, trigger 11, null organ 12, trigger 13, differentiating circuit 14, coincidence circuits 15 and 16, trigger 17, 5 a differentiation circuit 18, a correction code counter 19, a measurement time counter 20 and a delay line 21.

The operation of the phase meter is as follows.

The stresses under study and Xs are supplied to the input of the forming device 1 (the voltage x is considered to be the reference voltage). At the output of the forming device, rectangular pulses with a duration, an early 15-time shift between the beginnings of the positive half-waves arriving at the input of the coincidence circuit 2, and pulses of a duration equal to the temporal displacement between the beginnings of the negative half-waves 3

The master oscillator 9 generates counting impulses with a high frequency following, going to the input of the trigger 6. The rectangular voltage pulses taken from the outputs of the trigger 6, are differentiated by the differentiating circuits 4 5, - to the inputs of the coincidence circuits 2 i 3, sequences of pointed pulses are shifted relative to each other by a half period, with a frequency of half the frequency of the master oscillator. Impulses driving through 2 v. Match schemes. 3, are combined by the circuit "P1LI 7" and are fed to the counter 8. The pulses of the zero-organ 12 are fed to the counting input of the trigger 13, the outputs of which control the passage of the pulses of the generator 9 to the summing and subtracting inputs of the counter 19. After the second tipping of the trigger differentiating circuit 14 generates a pulse, which is fed to the single input of trigger 17. In this. The time of the differentiating circuit 18 outputs a pulse to the value output value bar of the first half period. After the end of one period, the counter 19 shows the difference in pulses corresponding to positive and negative half-periods of the reference voltage. This difference is accumulated during the measurement time and is issued simultaneously with a total value of 50 time intervals for correcting the value of the measured phase according to a change in the frequency of the reference voltage. The measurement time is determined by a counter 20, which counts the number of half periods of 55 porous voltage. After receiving a certain number of periods, the counter 20 sends a pulse to the "end of measurement" bar to receive the total values of time intervals and frequency changes, respectively, by counters 8 and 19. A pulse delayed by delay line 21 sets the counter 8 to the initial state, and the phase meter is prepared for the next measurement . The plots in FIG. 2 illustrates the principle of operation of the phase meter being described. Diagrams a-g show the shape of the junctions at various points of the circuit when measuring angles less than 180 °. At the same time, only one of the coincidence schemes .2 and 5 is open at the same time. Diagrams g - and show the form of stresses at the same points when measuring angles above 180 °. At those times when both coincidence circuits are open, pulses with double frequency arrive at the counter of 8 pulses as compared with the moments when one of the coincidences circuits is opened. This allows you to summarize the measurement results for both half-periods, regardless of the magnitude of the measured angle, the diagram shows the pulses at the input of the zero-body 12, corresponding to the reference voltage transitions through zero, and the diagram plot shows the voltage form at the single output of the trigger 13. Plots m and nkakazyvayu packs of pulses, arriving respectively at the summing and subtracting inputs of the meter 19.

Subject invention

Digital phase meter auth. St. No. 211655, dated by the fact that, in order to increase accuracy, it contains match schemes, a correction code counter, a measurement time counter, triggers, a zero-body, differentiating circuits and a delay line, the outputs of the coincidence circuits are connected to the summing and subtracting the inputs of the counter correction code, and the first inputs of one matching circuit are connected to the output of another matching circuit, the first input of which is connected to the master oscillator, and the second one is connected to a trigger, the single input of which is connected to the reference signal bus through the null organ; the second inputs of one matching circuit are connected to the trigger outputs, the counting input of which is connected to the null organ, and the zero output of the trigger is connected to a differential circuit. The output of which is connected to the single input of another trigger, whose output through the differentiating circuit is connected to the first value output half-cycle, and the zero input of the trigger is connected to the counter code of the amendment "measurement time counter, the input of which is connected to the zero-body, and the output through the delay line is connected to the output of the zero setting reset acetate measurement.

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