SU1767673A2 - Constant-to-alternating three-phase quasisinusoidal voltage transformer - Google Patents

Abstract

Use: Conversion of a direct voltage to an alternating three-phase cusic-sinusoidal voltage for secondary power supply and electric drive systems. The essence of the invention: the main single-phase inverter on the keys 1-4 and the auxiliary single-phase inverter on the keys 5-8 generate an alternating voltage of high frequency with zero pauses. With the help of the main transformer 9 with three secondary windings 11-13 and an auxiliary transformer with two secondary windings 14 and 15, the indicated voltages are summed up using alternating current switches 16-27 and a 15-step phase voltage is generated at the output of the converter. 4 il. §

Description

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The invention relates to electrical engineering and can be used in secondary power supply and electric drive systems.

According to the main author's certificate No. 1545311, a voltage converter to a three-phase quasi-sinusoidal voltage is known. It contains the main and auxiliary single-phase inverters, loaded on the main and auxiliary transformers. The main transformer contains three secondary windings connected in series. The outermost leads of these windings are connected via AC switches, and the common intermediate leads of the windings are connected via the secondary windings of the auxiliary transformer and AC switches to the output terminals of the converter. The numbers of turns of the secondary windings of the main and auxiliary transformers are related to each other as 2: 3: 2.1: 1. Both inverters operate at different higher frequencies. The voltages of the secondary windings of the transformers are algebraically summed and are demodulated with alternating current keys to three-phase 11-step voltage,

The disadvantage of this converter is the non-sinusoidal shape of the output voltage curve.

The purpose of the invention is to improve the quality of the output voltage by reducing higher harmonics,

The essence of the invention is that the DC / DC converter to the three-phase quasi-sinusoidal voltage contains the main and auxiliary single-phase inverters, the outputs connected to the primary windings of the main and auxiliary transformers, the first of which contains three secondary windings, and the second two, as well as four groups of alternating current keys, three keys each, one power outputs of which are connected to the corresponding output terminals of the converter, and the other power outputs of the keys each group are united and form four common points, of which the first and the fourth are connected with the beginning of the first and the end of the third secondary windings of the main transformer, the combined beginning of the second and the end of the first, and the beginning of the third and end of the second secondary windings of the main transformer are connected separately through the secondary winding auxiliary transformer with common points of the second and third groups of keys

AC, respectively, with the number of turns of the first, second and third secondary windings of the main transformer and the secondary windings of the auxiliary transformer being related to each other as 4: 3: 3: 2: 2.

Figure 1 shows the circuit diagram of the power section of the converter; Fig. 2 is a schematic diagram of a converter control unit; FIG. 3 are diagrams for explaining the principle of operation of the converter; FIG. 4 shows a truth table of a programmable read-only memory.

The power part of the inverter (figure 1) contains the main and auxiliary single-phase inverters, performed respectively on the keys 1-4 and 5-8. The outputs of the inverters are loaded on the primary windings of the main and auxiliary transformers 9,10. The secondary windings 11-13 of the main transformer 9 and the secondary windings 14.15 of the auxiliary transformer 10 are interconnected and connected via AC switches 16-27 to the output terminals A, B, C of the converter.

The converter control unit of FIG. 2 contains a master oscillator 28, the output of which is connected to the input of a binary pulse counter 29 with a scaling factor of 30. The outputs of the counter 29 are loaded on the address inputs of the programmable permanent memory 30, the outputs 31-46 of which are connected through trigger 47, logic elements NOT 48-53, elements 2-2И-2ИЛИ 54-56, and a block of buffer amplifiers 57 with control inputs of the power switches of the converter, and the output numbers of the block 57 correspond to the numbers of the keys to which they are connected .

In FIG. 3, diagrams 58-79 represent the pulse shapes at the outputs of the following elements:

58 - master oscillator 28,

59-64 - at the outputs of elements 54-56 and 51-53 (key control pulses of 1-8 inverters),

65.66 - transformers 9,10,

67-78 - at the outputs 35-46 of the element 30 (key control pulses 16-27),

79 - converter (output phase voltage form).

The device works as follows.

The master oscillator 28 generates a sequence of pulses 58 (FIG. 3), which is fed to the input of the binary counter 29. From the output of the counter 29, the pulses go to the address inputs of the programmable permanent memory 30, the logical states of the outputs 31-46 of which, depending on the address code presented in the table in figure 4. The outputs of the element 30 are loaded to the inputs of the block of buffer amplifiers 57, and the logic zero level at its input provides the closed state of the power switch of the converter, and the level of the logical unit is open. The half-period of the output voltage 79 of the converter can be divided into 30 equal intervals, which corresponds to 30 logical states of the element 30.

In the first interval from the output 31 of the element 30, the signal of the logical unit of the table. Fig. 4 sets the trigger 47 to a logic state 1, which is maintained during the first half period of the output voltage of the converter. The output signals of the trigger 47 control the operation of the elements 54-56, through which the signals from the outputs 32-34 to the control inputs of the switches 1-8 of the inverters pass. From the outputs 32.33 of element 30, the logic unit signals pass through a trigger open by the signal, 47 elements 54.55 are amplified by block 57 and the keys 1,4,5 are unlocked. From the output 34, the logical zero signal locks the element 56, and hence the key 7. The output signals of the elements 54-56 are inverted by the elements 51-53, the key 8 is unlocked and the power keys 2,3,6 are locked. The signals of logical units from the outputs 38,39.42 of the element 30 unlock the keys 19,20,23. The remaining AC keys 16-18, 21, 22.24-27 are locked with logic zero signals from the outputs 35-37,40,41,43-46 of element 30. The generation of control pulses of the power switches at the following intervals is similar to that described in accordance with diagrams 58-78 Fig.Z and the truth table of the element 30, Fig.4.

As a result of the operation of inverters, voltages 65.66 of FIG. 3 are formed on the windings of transformers 9, 10, and a 15-step voltage 79 is connected to the load phase connected by a star. In order to obtain the shape of the output voltage shown in diagram 79, the number of turns of the secondary The windings 11-13 of the main transformer 9 and the secondary windings 14.15 of the auxiliary transformer 10 should be related to each other as 4: 3: 3: 2: 2.

The power circuit of the converter works as follows.

In the first interval, the keys 1,4,5.8,19,20,23 are closed (diagrams 59,61,64,70,71,74). Through closed keys

0

23.19 The sum of the voltages of the windings of 13.15 transformers 9.10 is equal to 5U to the output terminals A, B of the converter. To conclusions B, C through the keys 19,20 - the sum of the voltages of the windings 11-13 is equal to (-10U), and to the conclusions C, A through the keys 20, 23 the algebraic sum of the voltages of the windings 11,12,15, is equal to 5U. In this case, the phase voltages of the load connected by a star are respectively equal to:

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UBC -UAB -10 U -5 U

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Uc - (JA + UB) 5U

those. the zero, the tenth are negative, and the tenth are the positive phase voltages UA, UB, Uc.

In the second interval, the keys 1,4,5,7,19,20,22 close the voltage on the windings 14.15 of the auxiliary transformer 10 disappears. Through the keys 22,19 the sum of the voltages 12, 13 is applied to the terminals A, B and 6 The sum of the voltages of the windings 11-13 is equal to (-10U) again applied to the terminals B, C through the keys 19,20, the voltage of the winding 11, pvBnoe4U, to the terminals C, A through the keys 20,22. Phase voltages

0

become equal

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16 U 14 U

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the first positive, negative, and 9 positive degrees of phase voltages UA, UB, Uc are formed,

At the following intervals, the operation of the preformer occurs in a manner similar to that described and in accordance with diagrams 58-78, fig.

Connecting any circuit via a controlled key with double-sided conductivity provides the possibility of current flow in two directions and the constant potential difference of the phases during each interval.

5 This determines the efficiency of the converter at any load power factor with a constant output voltage waveform.

The proposed converter provides the following advantages:

1. The best shape of the output voltage curve (30 steps in half period instead of 21).

2. Increase of efficiency, reliability, service life 5

losses from higher harmonics.

3. Increase of speed, elimination of self-oscillations in the system frequency converter - asynchronous motor for

by reducing or eliminating output filters.

4. Improving the accuracy and uniformity of rotation of asynchronous motors powered by a converter, reducing the effect on the supply network by reducing the amplitudes of higher harmonics.

 5. Reduction of input and output filters, i.e. reducing the mass and dimensions of the converter due to better compensation of the reactive power of the load and the best form of the output voltage, respectively.

Claims (1)

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