SU1758875A1 - Shaft rotation angle-to-code converter - Google Patents

Abstract

The invention relates to the field of automation and computer technology. The aim of the invention is to improve the accuracy of the converter by increasing its noise immunity and reducing the influence of higher harmonics. To achieve this goal, a shaft rotation angle converter into a code containing SSCT, excitation voltage source, analog switch, ADC, octant determinant, ROM, three registers, block of EXCLUSIVE OR, program-time block, shift register, output register, digital switch, dividing unit, two digital quadrature low-pass filters, an adder and a clock generator. 1 hp ff, 6 ill. (Ls

Description

The invention relates to the field of auto-, matic, measuring and computing equipment, namely, devices for converting the angle of rotation of a shaft into a digital angle code with sine-cosine rotating transformers (SCRT) operating in amplitude mode, or other sensors in which information about angle presented in the form of two quadrature harmonic components, and can be used to connect analog information sources with a digital computing device, as well as in software systems for controlling machine tools and in radio and optical telescope control systems.

The aim of the invention is to improve the accuracy of the converter by increasing its noise immunity and reducing the influence of higher harmonics.

FIG. 1 shows the flow chart of the proposed converter; Fig. 2 is a block diagram of an excitation voltage generator; FIG. 3 is a block diagram of an analog switch; 4 is a block diagram of a digital switch; 5 is a block diagram of a digital quadrature low-pass filter; Fig 6 is a sequence diagram of the software-time block of the converter.

The converter of the angle of rotation of the shaft into a code contains a sine-chosinus rotate

00 00

1 ate

The common transformer (SSCT) 1. generator 2 of the excitation voltage, analog switch 3, ADC 4, register 5, digital quadrature filters 6, 7 low frequencies (CGFNC). determinant 8 octants, output register 9, block 10 of EXCLUSIVE OR elements, digital switch 11, block 12 division, ROM 13, shift register 14, adder 15, program-time block 16 and clock generator 17, voltage registers 18, 19.

The excitation voltage generator 2 (Fig. 2) contains an RC harmonic oscillator 21 and a comparator 21.

The analog switch 3 (FIG. 3) contains first 22 and second 23 sampling-storage devices and two analog switches 24.

Digital switch 11 (figure 4) contains multiplexers 25 - 27, elements 28, 29 EXCLUSIVE OR, registers 30, 31.

Each digital quadrature lowpass filter contains blocks 32 - 35 delay elements, adders 36, 37, multipliers 38 - 49.

Converter angle of rotation of the shaft in the code works as follows. From the generator 2, the excitation voltage to the primary winding of the ACS 1 is supplied with the excitation voltage frequency (tk and amplitude Vn:

V0 (t) V0 cos (MB t)

Secondary ACS windings are used to remove AC signals modulated in amplitude as a function of sine and cosine of rotation angle1

Vc (a) K V0 cos a. Vs (a) K V0 sin a.

where K is the transformation ratio of SQUT. The information signals Vc and Vs are processed by an analog switch unit 3. Devices 22. Sampling-storage devices 23 here perform the following functions. First, they allocate the amplitudes of the signals from the secondary windings of the SBCT, at the moment the START signal arrives (Fig. B) at the first control input of the analog switch from generator 2. Secondly, they temporarily store the samples of signals conversion of the ADC successive approximation. Dedicated VHD signals Vc and Vs are fed to the input of analog switch 24, which alternately connects information signals cos and sin.

control signals UVH cos and UVH sin, respectively, to the input of the ADC 4.

The information signals Vc and Vs are converted into ADC 4 into digital codes Vc and Vs, which serve as the basis for calculating the angle of rotation of the shaft, and are fed to the inputs of registers 18 and 19, which connect the cosine signal Vc to the first return of FCTF 6 by control signal 0 block 16 READ ADC cos (Fig.6), and a sine signal Vs - to the second input of the same filter on the control signal READ ADC sin block 16.

Digital filtering is carried out by 5 first-order filters synthesized from an analog Butterworth low-pass filter with the introduction of complex weights, the so-called digital low-pass quadrature 0 filters.

CCFNC works as follows. The counters of the cosine input of the quadrature signal Vc are fed simultaneously to the inputs of the block 32 delay elements, multiples of 5 inhabitants 38, 40, which are the first input of the NFFCs From the output of the block 32 delay elements, the counts arrive at the inputs of the multipliers 42, 44. The counts weighted at the multiplier 38 , arrive at the first non-0 inverting input of the adder 36, the second non-inverting input of which receives the samples weighted on the multiplier 42, the third inverting input receives the samples of the sinus input 5 weighted on the multiplier 41, the fourth inverted tune input, sine input samples are weighted at multiplier 45, counts are weighted at the fifth inverting input, weighted at the smart switch 78 from the output of the delay elements 35, counts at the sixth non-inverting input, weighted at multiplier 48 from the output of the 35 elements block delays, to the input of which samples are received, summed in adder 36 and arriving at the first CCFNC, where the cosine quadrature output samples are formed.

The second input of the FNCNF receives from-0 counts from the sine input of the quadrature signal Vs, from where they are fed simultaneously to the input of the block 33 delay elements, multipliers 39, 41. The samples weighted on the multiplier 39 are fed to the first non-inverting input of the adder 37, the second non-inverting input of which receives the samples weighed by the multiplier 43 to the third

non-inverting input; cosine input samples are weighted at multiplier 40; cosine input samples are weighted at the fourth, non-inverting input; weighted at multiplier 44; fifth, non-inverting inputs are received; weighted at multiplier 48 are output from block 34 delay elements, at the sixth non-inverting input the samples are weighted on the multiplier 47 from the output of the block 35 of the delay elements, to the input of which there are readings summarized on the adder 37 and arriving at the second output of the CHFR, where the samples are formed sine quadrature output

The quadrature output signal is formed according to the transfer characteristic n ,,. (L, - |.). 1 ± 4

1- (B, -JB ™) Z

one

)

where Hell, AM, Wd, Vm - filter coefficients, which are a function of the cutoff frequency and complexity factor

The information signals Vi and / 2 filtered by the first CFTF 6 simultaneously arrive at the inputs of the octant determiner, the second CTFAL 7 and the digital switch 11. The 8 octant determiner is a block whose block diagram is equivalent to the analogue variant of its implementation. This is based on the signs of the filtered Vc and Vs codes, while the octant code is generated by comparing the magnitudes of these signals. The first to accept is an octant in which sin and O, cos alpha O, I sm a | I cos a. The octant number increases counterclockwise. The formation of the three most significant bits of the angle code from the octant number is carried out in the determinant of 8 octants. The use of the digital implementation of the determinant 8 octants instead of the analog one and its inclusion after the first CCFNC increases the noise immunity of the entire structure.

Signals proportional to the sine and cosine of the angle given in the first octant are determined from the known octant number by the expression

 Isin a I, cos / 7 lcos "| - in 1, 4, 5 and 8 octants

sin / | cos a, smal - in 2, 3, 6, and 7 octants

This is done in a digital switch 11, where on the first and second control

the inputs come in two low-order bits from the output of the determinant 8 octants. By the signal the FILTER SELECT signal coming from the block 16 to the third control input

5 switch 11, the latter processes the quadrature signal from the first 6 or from the second 7 CCFNC, the low level of this signal connects the outputs of the first CCFNC, and its high level - the second

10 CCFNC (6).

On arrival of signals of the SNP of the LESS and the RFP. Most of the fourth and fifth control inputs of the switch, respectively, from the control unit 16

15, a smaller one from the filtered signals is written to the first register 30, and a larger one to the second register 31. Thus, "and the first output of the switch 11 is always (i.e., to open their filters) the code of the smaller one is formed, and its second output is the largest in modulus of the quadrature signal

The filtered signals Vi and Vs thus processed from the first filter, and then (according to the sequence diagram, see fig 6) and Va and V / j from the second filter are fed to the inputs of dividing unit 12, where the code is generated,

V2 Sin /. , f) .h

). (/ + 2G7y)

V3 cos u u / j

(2)

35

which is used as the address for accessing the ROM 13

ROM 13 is programmed according to the arctangent law in the range of angles (0 ° - 45 °) and performs the functional conversion of the input value:

arctgftg /) Dt e generates the code for the angle of rotation to the Zero input code tg / corresponds to the zero code of the angle D and to the maximum input code tg / corresponds to the maximum code of the angle / Number of bits in the input and output codes provide the necessary accuracy of the representation of continuous values / and tg / discrete quantum levels

Thus, the signals filtered by the first CCFNC 6, with their own error introduced, are fed to a functional converter, including block 12 and ROM 13. The output of which forms the first value of the angle of rotation code with some error:

Ј f (AV), i.e. ,

Information signals that have passed through both CCFNC 6 and 7 acquire a double own error (with full identity of the filtering links):

V ± 2 AV.

And they also arrive at the functional converter, at the output of which the second value of the rotation angle code is formed:

/ ± 2 7. A functional converter, organized from one dividing unit and one ROM, reduces processing time of information signals and saves memory space. The code arriving at the gateway of the switch 11 when the ROM 13 is first read is fed to the input of the shift register 14 via the control signal / unit 16, and the code from the second reading of the ROM 13 is fed to the input of the register 5 via the control signal /%. The same signal shifts the data in shift register 14 by one bit to the left, which is equivalent to multiplying a number by two. Thus, at the output of the shift register, the double value of the first code of the angle of rotation obtained from the first CCFNC 6 is formed together with its own error, and the inverse outputs of the register 5 form the inverse value of the second code of the angle of rotation obtained from the second CCFNC 7, together with its own error of .

Further, these codes are fed to the input of the adder 15. At the output of which the value of the code of the angle of rotation of the ACS shaft will be formed with compensation for the intrinsic error of the entered filtering. From the output of the adder 15, the compensated rotation angle code arrives at the first input of a block of 10 EXCLUSIVE OR elements, the other input of which is controlled by the low-order code of the determinant of 8 octants. Thus, in odd octants, when the low-order bit of the octant code is zero, the output of the block 10 elements EXCLUSIVE OR 10 passes through the direct angle code, and in even octants, when the low-order bit of the octant code is one, the output of this circuit is inverse angle code that complements the angle / up to 45 °, i.e. the equal to (jr / 4 0С output of block 10 code of angle p or (тг / 4 - / 3) is fed to the first input of the storage register of code 9, to the second input of which from the block of octant determinant 8 receives the octant code. on the control input of the output register 9, an integrated angle code is generated at its output,

Claims (2)

Claim 1. Inverter angle of rotation of the shaft in the code containing sine-cosine 0 rotary transformer, the inputs of which are connected to one output of the generator voltage, and the outputs are connected to the information inputs of an analog switch, analog-to-digital converter, octant determinant, read only memory, three registers, block of elements EXCLUSIVE OR, program-time block characterized in that. In order to increase the accuracy of the converter, a shift register, a digital switch, a dividing unit, a pre-digital quadrature low-pass filter, an output register, an adder and a clock generator, the output of which is connected to the clock inputs of the software-time block and the analog-digital converter, are entered into it , another output of the excitation voltage generator is connected to the first control input of the analog switch and the Start input of the program-time block, the first output of which is connected to the analog-digital trigger input th transducer, and the second and third outputs - with the corresponding 5 control inputs of the analog switch, the output of which is connected to the information input of the analog-digital converter, the outputs of which are connected to the inputs of the first and second registers, the control inputs of which are connected to the fourth and fifth outputs of the software-time block, respectively, and the outputs are connected to the inputs of the first digital quadrature filter 5 low frequencies, the outputs of which are connected to the inputs of the determinant of octants and the inputs of the second digital quadrature low-pass filter, the outputs of which are connected to one group of information inputs 0 of a digital switch, another group of information inputs of which are connected to the outputs of the first digital quadrature low-pass filter, and the outputs are connected to the inputs of the division unit, the outputs 5 of which through a permanent memory device is connected to the inputs of the third register and shift register, the outputs of which and the inverse outputs of the third register are connected to the inputs of the adder, the outputs of which are connected to the group of inputs of the block the elements EXCLUSIVE OR. the control input of which is connected to the low-end output of the determinant octants, and the outputs are connected to one group of inputs of the output register, the other group of inputs of which is connected to the outputs of the octant determinant, the outputs of the high-level bits of which are connected to the first and second control inputs digital switch, the third, fourth and fifth control inputs of which are connected respectively to the outputs of the software-temporary unit from the sixth to the eighth, the ninth output of which is connected to the input systematic way record shift register, tenth - a write control input of the third register and a control input of the shift register shift and eleventh output - to the control input of the input register entry, 2. Converter according to claim. 1, from l and h a torn, and and so. that the digital switchboard contains three multiplexers, two registers 0 five 0 five and two EXCLUSIVE OR elements, the first inputs of the first and second multiplexers are one group of inputs, and the second inputs of the first and second multiplexers are another group of inputs of the digital switch, the control inputs of the first and second multiplexers are combined and are the third control input of the digital switch and the outputs are connected to the inputs of the third multiplexer, the first and second inputs of the first element EXCLUSIVE OR are the first and second inputs of the digital switch, and the output is connected to one input the second element EXCLUSIVE OR, the output of which is connected to the control input of the third multiplexer, whose outputs are connected to the inputs of registers, the control input of the first register is connected to another input of the second element EXCLUSIVE OR, which is the fourth, and the control input of the second register n control inputs of the digital switch.  -i l  i . 3 - 27 U. prZga n 1 angle L-gy l9 CtW. J oYZ CDnr-. five -Gr  N Th I-o 1 Th "1o vr p С О «h A. “with FIG. 6 J mi S. 4M-CH b  about and ft with - and “I“ j