SU1750041A1 - Threshold device - Google Patents

Abstract

The use of automation and impulse technology when building an automation device with hysteresis and pulse-width characteristics. The essence of the threshold device contains two comparators, reference signal buses, an analysis unit. In order to expand the field of use by providing adjustment of the type of transfer characteristic, the analysis unit contains the first and second D-triggers, two resistors, two capacitors and a diode 2

Description

The invention relates to automation and pulse technology and can be used in the construction of an automation device with hysteresis-and pulse-width characteristics.

The purpose of the invention is to expand the field of use by providing adjustment of the type of transfer characteristics.

FIG. 1 shows a diagram of the device; in fig. 2 - input-output characteristic.

The device contains an input terminal 1, a voltage source 2, variable resistors 3 and 4, comparators 5 and 6, resistors 7 and 9, capacitors 8 and 10, D-flip-flops 11 and 12. diode 13, output terminal 14.

Input terminal 1 is connected to the inverting input of the comparator 6 and the non-inverting input of the comparator 5. Variable resistors 3 and 4 are connected between the positive bus of source 2 and the common bus. The middle terminal of the resistor 3 is connected to the inverting input of the comparator 5, the middle terminal of the resistor 4 is connected to the non-inverting input of the comparator 6. The output of the comparator 5 is connected to the counting input of the trigger 11, the output

the comparator 6 is connected to the counting input of the trigger 12. The information inputs of the trigger 11 and 12 are interconnected with the power bus En The information input of the trigger 11 is connected in series with the resistor 7 and the capacitor 8 connected to the common bus, and the common connection point of elements 7 and 8 is connected to the input the trigger 11, the information input of the trigger 12 through the resistor 9 connected in series and the capacitor 10 is connected to a common bus, and the connection point of elements 9 and 10 is connected to the trigger installation input 12. The diode 13 is connected to the input of the anode trigger 11, and the cathode with the inverse output of trigger 12. Direct output of trigger 11 is connected to the output terminal 14 of the device.

The device works as follows.

When the power is turned on, the flip-flops 11 and 12 are set to the zero position, since at the input R at the first moment after switching on the capacitors 8 and 10 are discharged. The diode 13 is closed by a signal from the inverse output of the trigger 12 (on which it sets 4 SLO

2

c signal logic 1) Consider the case when the Uni switch-on voltage of a device is less than the trip voltage of Pack 2 (Fig 2a)

As long as the input voltage 1) I does not exceed the level set by the resistor 3, the voltage at the output of the comparator 5 corresponds to the level of logic O. At this, the state at the output 14 of the device does not change. As soon as the input voltage exceeds the Uni level, the output of the comparator

5points the signal of logical 1, which will lead to the installation of a high level signal at the output 14 of the device and the formation of the leading edge of the output pulse (Fig. 2a, o). When the output of the comparator

6 will be a logical 1 signal that will change to a logical 0 signal when the input voltage reaches a level. However, changing the signal from 1 to O at the output of the comparator 6 does not trigger the trigger 12, and at the output of the device 14, the signal of logical 1 remains, for. When the decrease of the input signal changes, the comparator b is triggered and the output signal equal to the logical 1 sets the D-trigger to the state O to the logical O

The appearance of zero at its inverse output Q opens diode 13, which in turn leads to the installation of trigger 11 in the position of logic O at output 14 (FIG. 2a). The case where the turn-on voltage is determined by the voltage Uni is greater than the turn-off voltage Un2. passes as in the case of Ut) at the output of the comparator 6, the signal is equal to logical O, trigger 12 does not work. With a further increase in the input signal and when it is reached, the comparator 5 is triggered and a D-flip-flop 11 triggers on the front of the output signal of the logical 1 of the comparator 5, at the output 14 of which a logical 1 signal is set

When the input signal changes and decreases to UBx Un2, the comparator b is triggered and the logical 1 signal sets the D-trigger to

the input C is in the zero state at the output Q, which leads to the opening of the diode 13 and installation at the R input of the L flip-flop 11 to the desired position. The transient response for the case in question is shown in FIG.

26

Voltage variation. at the output of resistor 4, the input-output characteristic of the device can be changed, which expands its scope

Claims (1)

Invention Formula Threshold device containing two the comparator, the direct input of the first and the inverse input of the second are connected to the input shmno, the second inputs of the comparators are respectively connected to the first and second buses of the reference signals and the outputs Comparators are connected to an analysis unit whose output is an output of a device, characterized in that, with the aim of expanding the field of use by providing adjustment of the type of transfer characteristic, the analysis unit contains first and second D triggers, first and second resistors, first and second capacitors and A diode, with a cathode diode connected to the inverse output of the second D trigger, and an anode with the installation input of the first D-trigger, the D inputs of the first and second D-trigger connected to the power supply bus, the installation inputs D-flip-flops respectively through the first and The second resistors are connected to the power bus and through the first and second capacitors to the common bus, the counting inputs of the D-flip-flops are connected respectively to the first and second outputs of the comparator 1C Yu FIG. / B2 un, U FIG. 2