SU1707554A1 - Pulse amplitude-to-dc voltage converter - Google Patents

Abstract

The invention relates to electrical measuring equipment and can be used to convert the amplitude of pulses into a constant voltage in devices for monitoring parameters of pulsed signals, the purpose of the invention. - simplification of the converter - achieved by using the voltage limiter 2; the converter also contains the comparator .1, the integrator 3. 1 sludge.

Description

The invention relates to electrical engineering and can be used to convert the amplitude of the pulses to a constant voltage, for example, in control devices

The pulses with amplitude and _og r arrive at the inverting input of integrator 3,

When U _BX ? '- ^ ogr " ^{t, e} · ^P R ^I Chz' ¹ ' ^L o” voltage U _{6b (x} at the output of the integrator 3 increases with each pulse input parameters of the pulse signals ”

The aim of the invention is to simplify the Converter.

The drawing shows a functional diagram of the proposed Converter.

The pulse amplitude-to-DC converter contains a comparator · 1, a voltage limiter 2, an integrator 3, input 4 and output 5 buses. The non-inverting input of the comparator 1 is connected to the bus 4 and the non-inverting input of the integrator 3 / the inverting input to the common bus, and the output to the signal input of the limiter 2. The inverting input of the integrator 3 is connected to the output of the limiter 2, and the output to the bus 5 and the control input limiter 2.

The converter operates as follows.

The pulses of the input signal with an amplitude of U _6X from bus 4 are fed to the non-inverting inputs of the comparator 1 and integrator 3. At the output of the comparator 1, pulses of a constant level E exceeding the maximum possible pulse amplitude of the input signal are generated simultaneously with the pulses of the input signal. These pulses are fed to the signal input of the limiter 2, the limiting level of which is set by the voltage U _{6b |) (} from the output of the integrator 3 at the control input of the limiter 2, At the output of the latter, pulses are formed simultaneously with the pulses of the input signal with the amplitude U _orp determined by the equality UfcX НР ^{И Л} 6X ^L 5XX ” ^and ix with and _ix > and _b1X ,

Nogo signal, the extent of this rise is proportional to the difference ^and Sx ^and ogre ^_ · When U6X <Uorp, ie, "at 10 ^{and Rin-singular, and"} the integrator output voltage i6tna 3 decreases with each pulse of the input signal, wherein the degree of this decrease is proportional to the difference between U _BWX - U _6X . When U _6K = U _{0b [x} Ha15, the voltage U _{Bb | X} at the output of integrator 3 does not change.

Thus, in steady-state mode, the constant voltage level U _Bwx at the output of the integrator 3, and therefore, on bus 5, is equal to the amplitude U _{BX of the} pulses on bus 4, The steady-state level U _{Bb (X of the} output voltage in the inverter is kept constant in pauses 25 between the input pulses, since there are no signals at the inputs of the integrator in the pauses between the input pulses,

Claims (1)

3Q The claims, the Converter of the amplitude of the pulses in a constant voltage containing a comparator, integrator, the output of $ 3 which is the output of the device, the first input of the comparator is the input of the device, distinguishing and with the fact that, in order to simplify, introduced a voltage limiter, ₄ 0 the signal input of which is connected to the output of the comparator, the control input is connected to the output of the integrator, and the output of the voltage limiter is connected to the first input of the integrator, 45 the second input of which is connected to the first • input of the comparator, the second input of which is connected to the common bus.